From 90c7be8fb390e399708856d303ba05b1f9e75171 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Thu, 16 Jun 2022 20:12:09 +0100
Subject: [PATCH]

---
 openpower/sv/setvl.mdwn | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 984c59f34..87f8080e4 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -168,6 +168,13 @@ Sub-vector elements are not be considered "Vertical". The vec2/3/4
 is to be considered as if the "single element".  Caveats exist for
 [[sv/mv.swizzle]] and [[sv/mv.vec]] when Pack/Unpack is enabled.
 
+**Predicate Masks**
+
+Registers used as Predicate Masks must *never* be altered by *any*
+instruction when Vertical-First is active.  If more than the available
+predicate registers are required (r3, r10, r30, CR Fields) then
+a simple branch-conditional test should be used instead.
+
 # Pseudocode
 
     // instruction fields:
-- 
2.30.2