From 91a53d800157aeb5e528fe351360d659cabf7e2a Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Mon, 15 Mar 2021 20:03:45 +1100 Subject: [PATCH] Allow SPI BOOT_CLOCKS to be overridden by top level Our SPI controller sends 8 dummy clocks at boot which Ben added for some Xilinx boards. This should be harmless but it is confusing the flash testbench in the Caravel project. Add a parameter so it can be overridden at the top level. Signed-off-by: Anton Blanchard --- soc.vhdl | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/soc.vhdl b/soc.vhdl index 88249bf..28b03dc 100644 --- a/soc.vhdl +++ b/soc.vhdl @@ -63,6 +63,7 @@ entity soc is SPI_FLASH_OFFSET : integer := 0; SPI_FLASH_DEF_CKDV : natural := 2; SPI_FLASH_DEF_QUAD : boolean := false; + SPI_BOOT_CLOCKS : boolean := true; LOG_LENGTH : natural := 512; HAS_LITEETH : boolean := false; UART0_IS_16550 : boolean := true; @@ -764,7 +765,8 @@ begin generic map ( DATA_LINES => SPI_FLASH_DLINES, DEF_CLK_DIV => SPI_FLASH_DEF_CKDV, - DEF_QUAD_READ => SPI_FLASH_DEF_QUAD + DEF_QUAD_READ => SPI_FLASH_DEF_QUAD, + BOOT_CLOCKS => SPI_BOOT_CLOCKS ) port map( rst => rst_spi, -- 2.30.2