From 91a8be54b9a388387709599631a0ff052e7de2be Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 14 Oct 2018 05:44:36 +0100 Subject: [PATCH] replace & operator with rv_and --- riscv/insns/and.h | 2 +- riscv/insns/andi.h | 2 +- riscv/sv_insn_redirect.cc | 5 +++++ riscv/sv_insn_redirect.h | 1 + 4 files changed, 8 insertions(+), 2 deletions(-) diff --git a/riscv/insns/and.h b/riscv/insns/and.h index 86b4883..ff50df2 100644 --- a/riscv/insns/and.h +++ b/riscv/insns/and.h @@ -1 +1 @@ -WRITE_RD(RS1 & RS2); +WRITE_RD(rv_and(RS1, RS2)); diff --git a/riscv/insns/andi.h b/riscv/insns/andi.h index bcc51e4..8cbd03b 100644 --- a/riscv/insns/andi.h +++ b/riscv/insns/andi.h @@ -1 +1 @@ -WRITE_RD(insn.i_imm() & RS1); +WRITE_RD(rv_and(insn.i_imm(), RS1)); diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index e5be643..34ee0ca 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -242,3 +242,8 @@ reg_t sv_proc_t::rv_mul(reg_t lhs, reg_t rhs) return lhs * rhs; } +reg_t sv_proc_t::rv_and(reg_t lhs, reg_t rhs) +{ + return lhs & rhs; +} + diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index 7112dd5..71b9801 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -99,6 +99,7 @@ public: reg_t rv_div(reg_t lhs, reg_t rhs); sreg_t rv_div(sreg_t lhs, sreg_t rhs); reg_t rv_mul(reg_t lhs, reg_t rhs); + reg_t rv_and(reg_t lhs, reg_t rhs); #include "sv_insn_decl.h" }; -- 2.30.2