From 91d83cc8a12883f2d7493b37f50487cd7f03a9e6 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 7 Oct 2020 06:49:23 -0700 Subject: [PATCH] misc: Standardize the way create() constructs SimObjects. The create() method on Params structs usually instantiate SimObjects using a constructor which takes the Params struct as a parameter somehow. There has been a lot of needless variation in how that was done, making it annoying to pass Params down to base classes. Some of the different forms were: const Params & Params & Params * const Params * Params const* This change goes through and fixes up every constructor and every create() method to use the const Params & form. We use a reference because the Params struct should never be null. We use const because neither the create method nor the consuming object should modify the record of the parameters as they came in from the config. That would make consuming them not idempotent, and make it impossible to tell what the actual simulation configuration was since it would change from any user visible form (config script, config.ini, dot pdf output). Change-Id: I77453cba52fdcfd5f4eec92dfb0bddb5a9945f31 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35938 Reviewed-by: Gabe Black Reviewed-by: Daniel Carvalho Maintainer: Gabe Black Tested-by: kokoro --- .../arm/fastmodel/CortexA76/cortex_a76.cc | 4 +- src/arch/arm/fastmodel/CortexA76/evs.cc | 8 +- .../arm/fastmodel/CortexR52/cortex_r52.cc | 6 +- .../arm/fastmodel/CortexR52/cortex_r52.hh | 6 +- src/arch/arm/fastmodel/CortexR52/evs.cc | 8 +- src/arch/arm/fastmodel/GIC/gic.cc | 4 +- .../arm/fastmodel/amba_from_tlm_bridge.cc | 2 +- src/arch/arm/fastmodel/amba_to_tlm_bridge.cc | 2 +- src/arch/arm/fastmodel/iris/cpu.cc | 2 +- src/arch/arm/fastmodel/iris/cpu.hh | 15 +- src/arch/arm/fastmodel/iris/interrupts.cc | 4 +- src/arch/arm/fastmodel/iris/interrupts.hh | 6 +- src/arch/arm/fastmodel/iris/isa.cc | 4 +- src/arch/arm/fastmodel/iris/isa.hh | 2 +- src/arch/arm/fastmodel/iris/mmu.cc | 4 +- src/arch/arm/fastmodel/iris/mmu.hh | 2 +- src/arch/arm/fastmodel/iris/tlb.cc | 4 +- src/arch/arm/fastmodel/iris/tlb.hh | 2 +- src/arch/arm/freebsd/fs_workload.cc | 30 +-- src/arch/arm/freebsd/fs_workload.hh | 6 +- src/arch/arm/freebsd/process.cc | 6 +- src/arch/arm/freebsd/process.hh | 8 +- src/arch/arm/fs_workload.cc | 18 +- src/arch/arm/fs_workload.hh | 6 +- src/arch/arm/interrupts.cc | 4 +- src/arch/arm/interrupts.hh | 6 +- src/arch/arm/isa.cc | 76 ++++---- src/arch/arm/isa.hh | 12 +- src/arch/arm/kvm/arm_cpu.cc | 6 +- src/arch/arm/kvm/arm_cpu.hh | 2 +- src/arch/arm/kvm/armv8_cpu.cc | 6 +- src/arch/arm/kvm/armv8_cpu.hh | 2 +- src/arch/arm/kvm/base_cpu.cc | 4 +- src/arch/arm/kvm/base_cpu.hh | 2 +- src/arch/arm/kvm/gic.cc | 12 +- src/arch/arm/kvm/gic.hh | 2 +- src/arch/arm/linux/fs_workload.cc | 32 +-- src/arch/arm/linux/fs_workload.hh | 6 +- src/arch/arm/linux/process.cc | 6 +- src/arch/arm/linux/process.hh | 8 +- src/arch/arm/mmu.cc | 4 +- src/arch/arm/mmu.hh | 2 +- src/arch/arm/nativetrace.cc | 4 +- src/arch/arm/nativetrace.hh | 8 +- src/arch/arm/pmu.cc | 20 +- src/arch/arm/pmu.hh | 2 +- src/arch/arm/process.cc | 12 +- src/arch/arm/process.hh | 6 +- src/arch/arm/semihosting.cc | 28 +-- src/arch/arm/semihosting.hh | 2 +- src/arch/arm/stage2_mmu.cc | 12 +- src/arch/arm/stage2_mmu.hh | 2 +- src/arch/arm/system.cc | 42 ++-- src/arch/arm/system.hh | 6 +- src/arch/arm/table_walker.cc | 14 +- src/arch/arm/table_walker.hh | 6 +- src/arch/arm/tlb.cc | 14 +- src/arch/arm/tlb.hh | 8 +- src/arch/arm/tracers/tarmac_parser.cc | 4 +- src/arch/arm/tracers/tarmac_parser.hh | 14 +- src/arch/arm/tracers/tarmac_tracer.cc | 10 +- src/arch/arm/tracers/tarmac_tracer.hh | 2 +- src/arch/generic/interrupts.hh | 6 +- src/arch/generic/mmu.hh | 4 +- src/arch/generic/tlb.hh | 2 +- src/arch/mips/interrupts.cc | 4 +- src/arch/mips/interrupts.hh | 6 +- src/arch/mips/isa.cc | 12 +- src/arch/mips/isa.hh | 4 +- src/arch/mips/linux/process.cc | 4 +- src/arch/mips/linux/process.hh | 3 +- src/arch/mips/mmu.cc | 4 +- src/arch/mips/mmu.hh | 2 +- src/arch/mips/process.cc | 7 +- src/arch/mips/process.hh | 2 +- src/arch/mips/tlb.cc | 7 +- src/arch/mips/tlb.hh | 2 +- src/arch/power/interrupts.cc | 4 +- src/arch/power/interrupts.hh | 6 +- src/arch/power/isa.cc | 10 +- src/arch/power/isa.hh | 4 +- src/arch/power/linux/process.cc | 6 +- src/arch/power/linux/process.hh | 3 +- src/arch/power/mmu.cc | 4 +- src/arch/power/mmu.hh | 2 +- src/arch/power/process.cc | 6 +- src/arch/power/process.hh | 2 +- src/arch/power/tlb.cc | 7 +- src/arch/power/tlb.hh | 2 +- src/arch/riscv/bare_metal/fs_workload.cc | 10 +- src/arch/riscv/bare_metal/fs_workload.hh | 2 +- src/arch/riscv/fs_workload.hh | 4 +- src/arch/riscv/interrupts.cc | 4 +- src/arch/riscv/interrupts.hh | 6 +- src/arch/riscv/isa.cc | 10 +- src/arch/riscv/isa.hh | 4 +- src/arch/riscv/linux/process.cc | 6 +- src/arch/riscv/linux/process.hh | 6 +- src/arch/riscv/mmu.cc | 4 +- src/arch/riscv/mmu.hh | 2 +- src/arch/riscv/pagetable_walker.cc | 4 +- src/arch/riscv/pagetable_walker.hh | 10 +- src/arch/riscv/process.cc | 10 +- src/arch/riscv/process.hh | 6 +- src/arch/riscv/tlb.cc | 10 +- src/arch/riscv/tlb.hh | 2 +- src/arch/sparc/fs_workload.cc | 4 +- src/arch/sparc/fs_workload.hh | 2 +- src/arch/sparc/interrupts.cc | 4 +- src/arch/sparc/interrupts.hh | 6 +- src/arch/sparc/isa.cc | 10 +- src/arch/sparc/isa.hh | 4 +- src/arch/sparc/linux/process.cc | 6 +- src/arch/sparc/linux/process.hh | 6 +- src/arch/sparc/mmu.cc | 4 +- src/arch/sparc/mmu.hh | 2 +- src/arch/sparc/nativetrace.cc | 4 +- src/arch/sparc/nativetrace.hh | 2 +- src/arch/sparc/process.cc | 6 +- src/arch/sparc/process.hh | 6 +- src/arch/sparc/solaris/process.cc | 4 +- src/arch/sparc/solaris/process.hh | 3 +- src/arch/sparc/tlb.cc | 8 +- src/arch/sparc/tlb.hh | 2 +- src/arch/x86/bios/acpi.cc | 32 +-- src/arch/x86/bios/acpi.hh | 8 +- src/arch/x86/bios/e820.cc | 8 +- src/arch/x86/bios/e820.hh | 6 +- src/arch/x86/bios/intelmp.cc | 121 ++++++------ src/arch/x86/bios/intelmp.hh | 26 +-- src/arch/x86/bios/smbios.cc | 58 +++--- src/arch/x86/bios/smbios.hh | 10 +- src/arch/x86/fs_workload.cc | 14 +- src/arch/x86/fs_workload.hh | 4 +- src/arch/x86/interrupts.cc | 15 +- src/arch/x86/interrupts.hh | 6 +- src/arch/x86/isa.cc | 10 +- src/arch/x86/isa.hh | 4 +- src/arch/x86/linux/fs_workload.cc | 7 +- src/arch/x86/linux/fs_workload.hh | 2 +- src/arch/x86/linux/process.cc | 2 +- src/arch/x86/mmu.cc | 4 +- src/arch/x86/mmu.hh | 2 +- src/arch/x86/nativetrace.cc | 7 +- src/arch/x86/nativetrace.hh | 2 +- src/arch/x86/pagetable_walker.cc | 4 +- src/arch/x86/pagetable_walker.hh | 10 +- src/arch/x86/process.cc | 15 +- src/arch/x86/process.hh | 8 +- src/arch/x86/tlb.cc | 12 +- src/arch/x86/tlb.hh | 2 +- src/base/filters/base.hh | 8 +- src/base/filters/block_bloom_filter.cc | 10 +- src/base/filters/block_bloom_filter.hh | 2 +- src/base/filters/bulk_bloom_filter.cc | 6 +- src/base/filters/bulk_bloom_filter.hh | 2 +- src/base/filters/h3_bloom_filter.cc | 6 +- src/base/filters/h3_bloom_filter.hh | 2 +- .../filters/multi_bit_sel_bloom_filter.cc | 16 +- .../filters/multi_bit_sel_bloom_filter.hh | 2 +- src/base/filters/multi_bloom_filter.cc | 8 +- src/base/filters/multi_bloom_filter.hh | 2 +- src/base/filters/perfect_bloom_filter.cc | 6 +- src/base/filters/perfect_bloom_filter.hh | 2 +- src/base/vnc/vncinput.cc | 10 +- src/base/vnc/vncinput.hh | 2 +- src/base/vnc/vncserver.cc | 14 +- src/base/vnc/vncserver.hh | 2 +- src/cpu/base.cc | 56 +++--- src/cpu/base.hh | 9 +- src/cpu/checker/cpu.cc | 18 +- src/cpu/checker/cpu.hh | 4 +- src/cpu/dummy_checker.cc | 4 +- src/cpu/dummy_checker.hh | 2 +- src/cpu/exetrace.cc | 4 +- src/cpu/exetrace.hh | 2 +- src/cpu/func_unit.cc | 8 +- src/cpu/func_unit.hh | 10 +- src/cpu/inst_pb_trace.cc | 8 +- src/cpu/inst_pb_trace.hh | 2 +- src/cpu/inteltrace.cc | 4 +- src/cpu/inteltrace.hh | 2 +- src/cpu/intr_control.cc | 8 +- src/cpu/intr_control.hh | 2 +- src/cpu/intr_control_noisa.cc | 8 +- src/cpu/kvm/base.cc | 51 ++--- src/cpu/kvm/base.hh | 2 +- src/cpu/kvm/vm.cc | 10 +- src/cpu/kvm/vm.hh | 2 +- src/cpu/kvm/x86_cpu.cc | 8 +- src/cpu/kvm/x86_cpu.hh | 2 +- src/cpu/minor/cpu.cc | 24 +-- src/cpu/minor/cpu.hh | 2 +- src/cpu/minor/decode.cc | 2 +- src/cpu/minor/decode.hh | 2 +- src/cpu/minor/execute.cc | 2 +- src/cpu/minor/execute.hh | 2 +- src/cpu/minor/fetch1.cc | 2 +- src/cpu/minor/fetch1.hh | 2 +- src/cpu/minor/fetch2.cc | 2 +- src/cpu/minor/fetch2.hh | 2 +- src/cpu/minor/func_unit.cc | 44 ++--- src/cpu/minor/func_unit.hh | 24 +-- src/cpu/minor/pipeline.cc | 2 +- src/cpu/minor/pipeline.hh | 2 +- src/cpu/nativetrace.cc | 2 +- src/cpu/nativetrace.hh | 2 +- src/cpu/o3/checker.cc | 4 +- src/cpu/o3/checker.hh | 4 +- src/cpu/o3/commit.hh | 2 +- src/cpu/o3/commit_impl.hh | 20 +- src/cpu/o3/cpu.cc | 72 +++---- src/cpu/o3/cpu.hh | 4 +- src/cpu/o3/decode.hh | 2 +- src/cpu/o3/decode_impl.hh | 16 +- src/cpu/o3/deriv.cc | 4 +- src/cpu/o3/deriv.hh | 4 +- src/cpu/o3/fetch.hh | 2 +- src/cpu/o3/fetch_impl.hh | 29 ++- src/cpu/o3/fu_pool.cc | 8 +- src/cpu/o3/fu_pool.hh | 2 +- src/cpu/o3/iew.hh | 2 +- src/cpu/o3/iew_impl.hh | 22 +-- src/cpu/o3/inst_queue.hh | 3 +- src/cpu/o3/inst_queue_impl.hh | 26 +-- src/cpu/o3/lsq.hh | 2 +- src/cpu/o3/lsq_impl.hh | 32 +-- src/cpu/o3/lsq_unit.hh | 2 +- src/cpu/o3/lsq_unit_impl.hh | 10 +- src/cpu/o3/mem_dep_unit.hh | 4 +- src/cpu/o3/mem_dep_unit_impl.hh | 17 +- src/cpu/o3/probe/elastic_trace.cc | 22 +-- src/cpu/o3/probe/elastic_trace.hh | 2 +- src/cpu/o3/probe/simple_trace.cc | 4 +- src/cpu/o3/probe/simple_trace.hh | 2 +- src/cpu/o3/rename.hh | 2 +- src/cpu/o3/rename_impl.hh | 16 +- src/cpu/o3/rob.hh | 2 +- src/cpu/o3/rob_impl.hh | 12 +- src/cpu/pred/2bit_local.cc | 10 +- src/cpu/pred/2bit_local.hh | 2 +- src/cpu/pred/bi_mode.cc | 18 +- src/cpu/pred/bi_mode.hh | 2 +- src/cpu/pred/bpred_unit.cc | 18 +- src/cpu/pred/bpred_unit.hh | 2 +- src/cpu/pred/indirect.hh | 2 +- src/cpu/pred/loop_predictor.cc | 34 ++-- src/cpu/pred/loop_predictor.hh | 2 +- src/cpu/pred/ltage.cc | 8 +- src/cpu/pred/ltage.hh | 2 +- src/cpu/pred/multiperspective_perceptron.cc | 40 ++-- src/cpu/pred/multiperspective_perceptron.hh | 2 +- .../pred/multiperspective_perceptron_64KB.cc | 8 +- .../pred/multiperspective_perceptron_64KB.hh | 2 +- .../pred/multiperspective_perceptron_8KB.cc | 6 +- .../pred/multiperspective_perceptron_8KB.hh | 2 +- .../pred/multiperspective_perceptron_tage.cc | 22 +-- .../pred/multiperspective_perceptron_tage.hh | 10 +- .../multiperspective_perceptron_tage_64KB.cc | 28 +-- .../multiperspective_perceptron_tage_64KB.hh | 4 +- .../multiperspective_perceptron_tage_8KB.cc | 20 +- .../multiperspective_perceptron_tage_8KB.hh | 20 +- src/cpu/pred/simple_indirect.cc | 28 +-- src/cpu/pred/simple_indirect.hh | 2 +- src/cpu/pred/statistical_corrector.cc | 44 ++--- src/cpu/pred/statistical_corrector.hh | 2 +- src/cpu/pred/tage.cc | 6 +- src/cpu/pred/tage.hh | 2 +- src/cpu/pred/tage_base.cc | 44 ++--- src/cpu/pred/tage_base.hh | 2 +- src/cpu/pred/tage_sc_l.cc | 8 +- src/cpu/pred/tage_sc_l.hh | 20 +- src/cpu/pred/tage_sc_l_64KB.cc | 44 ++--- src/cpu/pred/tage_sc_l_64KB.hh | 6 +- src/cpu/pred/tage_sc_l_8KB.cc | 22 +-- src/cpu/pred/tage_sc_l_8KB.hh | 6 +- src/cpu/pred/tournament.cc | 32 +-- src/cpu/pred/tournament.hh | 2 +- src/cpu/simple/NonCachingSimpleCPU.py | 3 +- src/cpu/simple/atomic.cc | 12 +- src/cpu/simple/atomic.hh | 2 +- src/cpu/simple/base.cc | 18 +- src/cpu/simple/base.hh | 2 +- src/cpu/simple/noncaching.cc | 10 +- src/cpu/simple/noncaching.hh | 2 +- src/cpu/simple/probes/simpoint.cc | 10 +- src/cpu/simple/probes/simpoint.hh | 2 +- src/cpu/simple/timing.cc | 6 +- src/cpu/simple/timing.hh | 2 +- .../testers/directedtest/DirectedGenerator.cc | 6 +- .../testers/directedtest/DirectedGenerator.hh | 2 +- .../directedtest/InvalidateGenerator.cc | 8 +- .../directedtest/InvalidateGenerator.hh | 2 +- .../directedtest/RubyDirectedTester.cc | 12 +- .../directedtest/RubyDirectedTester.hh | 2 +- .../directedtest/SeriesRequestGenerator.cc | 10 +- .../directedtest/SeriesRequestGenerator.hh | 2 +- .../GarnetSyntheticTraffic.cc | 32 +-- .../GarnetSyntheticTraffic.hh | 2 +- src/cpu/testers/memtest/memtest.cc | 32 +-- src/cpu/testers/memtest/memtest.hh | 2 +- src/cpu/testers/rubytest/RubyTester.cc | 28 +-- src/cpu/testers/rubytest/RubyTester.hh | 2 +- src/cpu/testers/traffic_gen/base.cc | 10 +- src/cpu/testers/traffic_gen/base.hh | 2 +- src/cpu/testers/traffic_gen/pygen.cc | 6 +- src/cpu/testers/traffic_gen/pygen.hh | 2 +- src/cpu/testers/traffic_gen/stream_gen.cc | 4 +- src/cpu/testers/traffic_gen/stream_gen.hh | 10 +- src/cpu/testers/traffic_gen/traffic_gen.cc | 8 +- src/cpu/testers/traffic_gen/traffic_gen.hh | 2 +- src/cpu/timing_expr.cc | 32 +-- src/cpu/timing_expr.hh | 46 ++--- src/cpu/trace/trace_cpu.cc | 32 +-- src/cpu/trace/trace_cpu.hh | 10 +- src/dev/arm/a9scu.cc | 6 +- src/dev/arm/a9scu.hh | 2 +- src/dev/arm/abstract_nvm.hh | 2 +- src/dev/arm/amba_device.cc | 16 +- src/dev/arm/amba_device.hh | 6 +- src/dev/arm/amba_fake.cc | 10 +- src/dev/arm/amba_fake.hh | 8 +- src/dev/arm/base_gic.cc | 30 +-- src/dev/arm/base_gic.hh | 10 +- src/dev/arm/display.cc | 6 +- src/dev/arm/display.hh | 2 +- src/dev/arm/energy_ctrl.cc | 11 +- src/dev/arm/energy_ctrl.hh | 2 +- src/dev/arm/flash_device.cc | 22 +-- src/dev/arm/flash_device.hh | 2 +- src/dev/arm/fvp_base_pwr_ctrl.cc | 6 +- src/dev/arm/fvp_base_pwr_ctrl.hh | 2 +- src/dev/arm/generic_timer.cc | 76 ++++---- src/dev/arm/generic_timer.hh | 10 +- src/dev/arm/gic_v2.cc | 24 +-- src/dev/arm/gic_v2.hh | 6 +- src/dev/arm/gic_v2m.cc | 12 +- src/dev/arm/gic_v2m.hh | 6 +- src/dev/arm/gic_v3.cc | 28 +-- src/dev/arm/gic_v3.hh | 6 +- src/dev/arm/gic_v3_cpu_interface.cc | 2 +- src/dev/arm/gic_v3_its.cc | 12 +- src/dev/arm/gic_v3_its.hh | 2 +- src/dev/arm/gic_v3_redistributor.cc | 2 +- src/dev/arm/gpu_nomali.cc | 86 ++++---- src/dev/arm/gpu_nomali.hh | 4 +- src/dev/arm/hdlcd.cc | 22 +-- src/dev/arm/hdlcd.hh | 2 +- src/dev/arm/kmi.cc | 8 +- src/dev/arm/kmi.hh | 2 +- src/dev/arm/pci_host.cc | 10 +- src/dev/arm/pci_host.hh | 2 +- src/dev/arm/pl011.cc | 10 +- src/dev/arm/pl011.hh | 2 +- src/dev/arm/pl111.cc | 12 +- src/dev/arm/pl111.hh | 6 +- src/dev/arm/realview.cc | 8 +- src/dev/arm/realview.hh | 6 +- src/dev/arm/rtc_pl031.cc | 12 +- src/dev/arm/rtc_pl031.hh | 6 +- src/dev/arm/rv_ctrl.cc | 34 ++-- src/dev/arm/rv_ctrl.hh | 16 +- src/dev/arm/smmu_v3.cc | 88 ++++----- src/dev/arm/smmu_v3.hh | 2 +- src/dev/arm/smmu_v3_deviceifc.cc | 42 ++-- src/dev/arm/smmu_v3_deviceifc.hh | 6 +- src/dev/arm/timer_a9global.cc | 10 +- src/dev/arm/timer_a9global.hh | 6 +- src/dev/arm/timer_cpulocal.cc | 12 +- src/dev/arm/timer_cpulocal.hh | 6 +- src/dev/arm/timer_sp804.cc | 10 +- src/dev/arm/timer_sp804.hh | 6 +- src/dev/arm/ufs_device.cc | 28 +-- src/dev/arm/ufs_device.hh | 4 +- src/dev/arm/vgic.cc | 12 +- src/dev/arm/vgic.hh | 8 +- src/dev/arm/vio_mmio.cc | 12 +- src/dev/arm/vio_mmio.hh | 2 +- src/dev/arm/watchdog_sp805.cc | 6 +- src/dev/arm/watchdog_sp805.hh | 2 +- src/dev/baddev.cc | 8 +- src/dev/baddev.hh | 6 +- src/dev/dma_device.cc | 4 +- src/dev/dma_device.hh | 2 +- src/dev/hsa/hsa_device.hh | 2 +- src/dev/hsa/hsa_driver.cc | 4 +- src/dev/hsa/hsa_driver.hh | 2 +- src/dev/hsa/hsa_packet_processor.cc | 12 +- src/dev/hsa/hsa_packet_processor.hh | 2 +- src/dev/i2c/bus.cc | 10 +- src/dev/i2c/bus.hh | 2 +- src/dev/i2c/device.hh | 4 +- src/dev/io_device.cc | 10 +- src/dev/io_device.hh | 12 +- src/dev/isa_fake.cc | 28 +-- src/dev/isa_fake.hh | 6 +- src/dev/mips/malta.cc | 8 +- src/dev/mips/malta.hh | 2 +- src/dev/mips/malta_cchip.cc | 8 +- src/dev/mips/malta_cchip.hh | 6 +- src/dev/mips/malta_io.cc | 18 +- src/dev/mips/malta_io.hh | 8 +- src/dev/net/dist_etherlink.cc | 36 ++-- src/dev/net/dist_etherlink.hh | 6 +- src/dev/net/etherbus.cc | 10 +- src/dev/net/etherbus.hh | 6 +- src/dev/net/etherdevice.hh | 12 +- src/dev/net/etherdump.cc | 10 +- src/dev/net/etherdump.hh | 2 +- src/dev/net/etherlink.cc | 14 +- src/dev/net/etherlink.hh | 6 +- src/dev/net/etherswitch.cc | 14 +- src/dev/net/etherswitch.hh | 7 +- src/dev/net/ethertap.cc | 24 +-- src/dev/net/ethertap.hh | 18 +- src/dev/net/i8254xGBe.cc | 26 +-- src/dev/net/i8254xGBe.hh | 9 +- src/dev/net/ns_gige.cc | 28 +-- src/dev/net/ns_gige.hh | 8 +- src/dev/net/sinic.cc | 59 +++--- src/dev/net/sinic.hh | 6 +- src/dev/pci/copy_engine.cc | 20 +- src/dev/pci/copy_engine.hh | 6 +- src/dev/pci/device.cc | 184 +++++++++--------- src/dev/pci/device.hh | 2 +- src/dev/pci/host.cc | 18 +- src/dev/pci/host.hh | 4 +- src/dev/platform.cc | 4 +- src/dev/platform.hh | 2 +- src/dev/ps2/device.cc | 2 +- src/dev/ps2/device.hh | 2 +- src/dev/ps2/keyboard.cc | 10 +- src/dev/ps2/keyboard.hh | 2 +- src/dev/ps2/mouse.cc | 6 +- src/dev/ps2/mouse.hh | 2 +- src/dev/ps2/touchkit.cc | 8 +- src/dev/ps2/touchkit.hh | 2 +- src/dev/serial/serial.cc | 8 +- src/dev/serial/serial.hh | 4 +- src/dev/serial/simple.cc | 8 +- src/dev/serial/simple.hh | 2 +- src/dev/serial/terminal.cc | 18 +- src/dev/serial/terminal.hh | 4 +- src/dev/serial/uart.cc | 4 +- src/dev/serial/uart.hh | 6 +- src/dev/serial/uart8250.cc | 6 +- src/dev/serial/uart8250.hh | 6 +- src/dev/sparc/dtod.cc | 8 +- src/dev/sparc/dtod.hh | 6 +- src/dev/sparc/iob.cc | 12 +- src/dev/sparc/iob.hh | 6 +- src/dev/sparc/mm_disk.cc | 10 +- src/dev/sparc/mm_disk.hh | 6 +- src/dev/sparc/t1000.cc | 8 +- src/dev/sparc/t1000.hh | 2 +- src/dev/storage/disk_image.cc | 36 ++-- src/dev/storage/disk_image.hh | 6 +- src/dev/storage/ide_ctrl.cc | 22 +-- src/dev/storage/ide_ctrl.hh | 4 +- src/dev/storage/ide_disk.cc | 10 +- src/dev/storage/ide_disk.hh | 2 +- src/dev/storage/simple_disk.cc | 8 +- src/dev/storage/simple_disk.hh | 2 +- src/dev/virtio/base.cc | 10 +- src/dev/virtio/base.hh | 4 +- src/dev/virtio/block.cc | 12 +- src/dev/virtio/block.hh | 2 +- src/dev/virtio/console.cc | 12 +- src/dev/virtio/console.hh | 2 +- src/dev/virtio/fs9p.cc | 36 ++-- src/dev/virtio/fs9p.hh | 8 +- src/dev/virtio/pci.cc | 8 +- src/dev/virtio/pci.hh | 2 +- src/dev/x86/cmos.cc | 4 +- src/dev/x86/cmos.hh | 6 +- src/dev/x86/i8042.cc | 16 +- src/dev/x86/i8042.hh | 6 +- src/dev/x86/i82094aa.cc | 16 +- src/dev/x86/i82094aa.hh | 6 +- src/dev/x86/i8237.cc | 4 +- src/dev/x86/i8237.hh | 12 +- src/dev/x86/i8254.cc | 4 +- src/dev/x86/i8254.hh | 12 +- src/dev/x86/i8259.cc | 14 +- src/dev/x86/i8259.hh | 6 +- src/dev/x86/pc.cc | 8 +- src/dev/x86/pc.hh | 2 +- src/dev/x86/south_bridge.cc | 10 +- src/dev/x86/south_bridge.hh | 6 +- src/dev/x86/speaker.cc | 4 +- src/dev/x86/speaker.hh | 8 +- src/gpu-compute/comm.cc | 18 +- src/gpu-compute/comm.hh | 4 +- src/gpu-compute/compute_unit.cc | 94 ++++----- src/gpu-compute/compute_unit.hh | 2 +- src/gpu-compute/dispatcher.cc | 7 +- src/gpu-compute/dispatcher.hh | 2 +- src/gpu-compute/exec_stage.cc | 2 +- src/gpu-compute/exec_stage.hh | 2 +- src/gpu-compute/fetch_stage.cc | 4 +- src/gpu-compute/fetch_stage.hh | 2 +- src/gpu-compute/fetch_unit.cc | 4 +- src/gpu-compute/fetch_unit.hh | 2 +- src/gpu-compute/global_memory_pipeline.cc | 6 +- src/gpu-compute/global_memory_pipeline.hh | 2 +- src/gpu-compute/gpu_command_processor.cc | 8 +- src/gpu-compute/gpu_command_processor.hh | 2 +- src/gpu-compute/gpu_compute_driver.cc | 6 +- src/gpu-compute/gpu_compute_driver.hh | 2 +- src/gpu-compute/gpu_tlb.cc | 26 +-- src/gpu-compute/gpu_tlb.hh | 2 +- src/gpu-compute/lds_state.cc | 22 +-- src/gpu-compute/lds_state.hh | 6 +- src/gpu-compute/local_memory_pipeline.cc | 4 +- src/gpu-compute/local_memory_pipeline.hh | 2 +- src/gpu-compute/pool_manager.cc | 4 +- src/gpu-compute/pool_manager.hh | 2 +- src/gpu-compute/register_file.cc | 8 +- src/gpu-compute/register_file.hh | 2 +- src/gpu-compute/register_manager.cc | 12 +- src/gpu-compute/register_manager.hh | 2 +- src/gpu-compute/scalar_memory_pipeline.cc | 4 +- src/gpu-compute/scalar_memory_pipeline.hh | 2 +- src/gpu-compute/scalar_register_file.cc | 6 +- src/gpu-compute/scalar_register_file.hh | 2 +- src/gpu-compute/schedule_stage.cc | 2 +- src/gpu-compute/schedule_stage.hh | 2 +- src/gpu-compute/scheduler.cc | 6 +- src/gpu-compute/scheduler.hh | 2 +- src/gpu-compute/scoreboard_check_stage.cc | 2 +- src/gpu-compute/scoreboard_check_stage.hh | 2 +- src/gpu-compute/shader.cc | 28 +-- src/gpu-compute/shader.hh | 2 +- src/gpu-compute/simple_pool_manager.cc | 4 +- src/gpu-compute/simple_pool_manager.hh | 2 +- src/gpu-compute/tlb_coalescer.cc | 16 +- src/gpu-compute/tlb_coalescer.hh | 2 +- src/gpu-compute/vector_register_file.cc | 6 +- src/gpu-compute/vector_register_file.hh | 2 +- src/gpu-compute/wavefront.cc | 20 +- src/gpu-compute/wavefront.hh | 2 +- src/learning_gem5/part2/goodbye_object.cc | 8 +- src/learning_gem5/part2/goodbye_object.hh | 2 +- src/learning_gem5/part2/hello_object.cc | 14 +- src/learning_gem5/part2/hello_object.hh | 2 +- src/learning_gem5/part2/simple_cache.cc | 19 +- src/learning_gem5/part2/simple_cache.hh | 2 +- src/learning_gem5/part2/simple_memobj.cc | 12 +- src/learning_gem5/part2/simple_memobj.hh | 2 +- src/learning_gem5/part2/simple_object.cc | 6 +- src/learning_gem5/part2/simple_object.hh | 2 +- src/mem/abstract_mem.cc | 12 +- src/mem/abstract_mem.hh | 8 +- src/mem/addr_mapper.cc | 12 +- src/mem/addr_mapper.hh | 4 +- src/mem/bridge.cc | 14 +- src/mem/bridge.hh | 2 +- src/mem/cache/base.cc | 48 ++--- src/mem/cache/base.hh | 10 +- src/mem/cache/cache.cc | 8 +- src/mem/cache/cache.hh | 2 +- src/mem/cache/compressors/base.cc | 6 +- src/mem/cache/compressors/base.hh | 2 +- src/mem/cache/compressors/base_delta.cc | 36 ++-- src/mem/cache/compressors/base_delta.hh | 14 +- src/mem/cache/compressors/base_delta_impl.hh | 2 +- .../compressors/base_dictionary_compressor.cc | 4 +- src/mem/cache/compressors/cpack.cc | 6 +- src/mem/cache/compressors/cpack.hh | 2 +- .../compressors/dictionary_compressor.hh | 4 +- .../compressors/dictionary_compressor_impl.hh | 2 +- src/mem/cache/compressors/fpcd.cc | 6 +- src/mem/cache/compressors/fpcd.hh | 2 +- src/mem/cache/compressors/multi.cc | 12 +- src/mem/cache/compressors/multi.hh | 2 +- src/mem/cache/compressors/perfect.cc | 12 +- src/mem/cache/compressors/perfect.hh | 2 +- src/mem/cache/compressors/repeated_qwords.cc | 6 +- src/mem/cache/compressors/repeated_qwords.hh | 2 +- src/mem/cache/compressors/zero.cc | 6 +- src/mem/cache/compressors/zero.hh | 2 +- src/mem/cache/noncoherent_cache.cc | 8 +- src/mem/cache/noncoherent_cache.hh | 2 +- .../prefetch/access_map_pattern_matching.cc | 40 ++-- .../prefetch/access_map_pattern_matching.hh | 4 +- src/mem/cache/prefetch/base.cc | 16 +- src/mem/cache/prefetch/base.hh | 2 +- src/mem/cache/prefetch/bop.cc | 24 +-- src/mem/cache/prefetch/bop.hh | 2 +- .../delta_correlating_prediction_tables.cc | 20 +- .../delta_correlating_prediction_tables.hh | 4 +- src/mem/cache/prefetch/indirect_memory.cc | 28 +-- src/mem/cache/prefetch/indirect_memory.hh | 2 +- .../cache/prefetch/irregular_stream_buffer.cc | 38 ++-- .../cache/prefetch/irregular_stream_buffer.hh | 2 +- src/mem/cache/prefetch/multi.cc | 8 +- src/mem/cache/prefetch/multi.hh | 2 +- src/mem/cache/prefetch/pif.cc | 20 +- src/mem/cache/prefetch/pif.hh | 2 +- src/mem/cache/prefetch/queued.cc | 14 +- src/mem/cache/prefetch/queued.hh | 2 +- src/mem/cache/prefetch/sbooe.cc | 14 +- src/mem/cache/prefetch/sbooe.hh | 2 +- src/mem/cache/prefetch/signature_path.cc | 30 +-- src/mem/cache/prefetch/signature_path.hh | 2 +- src/mem/cache/prefetch/signature_path_v2.cc | 14 +- src/mem/cache/prefetch/signature_path_v2.hh | 2 +- src/mem/cache/prefetch/slim_ampm.cc | 8 +- src/mem/cache/prefetch/slim_ampm.hh | 2 +- .../spatio_temporal_memory_streaming.cc | 30 +-- .../spatio_temporal_memory_streaming.hh | 2 +- src/mem/cache/prefetch/stride.cc | 22 +-- src/mem/cache/prefetch/stride.hh | 4 +- src/mem/cache/prefetch/tagged.cc | 8 +- src/mem/cache/prefetch/tagged.hh | 2 +- src/mem/cache/replacement_policies/base.hh | 2 +- src/mem/cache/replacement_policies/bip_rp.cc | 8 +- src/mem/cache/replacement_policies/bip_rp.hh | 2 +- .../cache/replacement_policies/brrip_rp.cc | 10 +- .../cache/replacement_policies/brrip_rp.hh | 2 +- src/mem/cache/replacement_policies/fifo_rp.cc | 6 +- src/mem/cache/replacement_policies/fifo_rp.hh | 2 +- src/mem/cache/replacement_policies/lfu_rp.cc | 6 +- src/mem/cache/replacement_policies/lfu_rp.hh | 2 +- src/mem/cache/replacement_policies/lru_rp.cc | 6 +- src/mem/cache/replacement_policies/lru_rp.hh | 2 +- src/mem/cache/replacement_policies/mru_rp.cc | 6 +- src/mem/cache/replacement_policies/mru_rp.hh | 2 +- .../cache/replacement_policies/random_rp.cc | 6 +- .../cache/replacement_policies/random_rp.hh | 2 +- .../replacement_policies/second_chance_rp.cc | 6 +- .../replacement_policies/second_chance_rp.hh | 2 +- .../replacement_policies/tree_plru_rp.cc | 8 +- .../replacement_policies/tree_plru_rp.hh | 2 +- .../replacement_policies/weighted_lru_rp.cc | 6 +- .../replacement_policies/weighted_lru_rp.hh | 2 +- src/mem/cache/tags/base.cc | 14 +- src/mem/cache/tags/base.hh | 2 +- src/mem/cache/tags/base_set_assoc.cc | 12 +- src/mem/cache/tags/base_set_assoc.hh | 2 +- src/mem/cache/tags/compressed_tags.cc | 6 +- src/mem/cache/tags/compressed_tags.hh | 2 +- src/mem/cache/tags/fa_lru.cc | 8 +- src/mem/cache/tags/fa_lru.hh | 2 +- src/mem/cache/tags/indexing_policies/base.cc | 8 +- src/mem/cache/tags/indexing_policies/base.hh | 2 +- .../tags/indexing_policies/set_associative.cc | 6 +- .../tags/indexing_policies/set_associative.hh | 2 +- .../indexing_policies/skewed_associative.cc | 6 +- .../indexing_policies/skewed_associative.hh | 2 +- src/mem/cache/tags/sector_tags.cc | 14 +- src/mem/cache/tags/sector_tags.hh | 2 +- src/mem/coherent_xbar.cc | 24 +-- src/mem/coherent_xbar.hh | 2 +- src/mem/comm_monitor.cc | 62 +++--- src/mem/comm_monitor.hh | 11 +- src/mem/drampower.cc | 106 +++++----- src/mem/drampower.hh | 14 +- src/mem/dramsim2.cc | 10 +- src/mem/dramsim2.hh | 2 +- src/mem/dramsim3.cc | 8 +- src/mem/dramsim3.hh | 2 +- src/mem/external_master.cc | 14 +- src/mem/external_master.hh | 2 +- src/mem/external_slave.cc | 14 +- src/mem/external_slave.hh | 2 +- src/mem/hmc_controller.cc | 10 +- src/mem/hmc_controller.hh | 2 +- src/mem/mem_checker.cc | 4 +- src/mem/mem_checker.hh | 2 +- src/mem/mem_checker_monitor.cc | 10 +- src/mem/mem_checker_monitor.hh | 9 +- src/mem/mem_ctrl.cc | 32 +-- src/mem/mem_ctrl.hh | 2 +- src/mem/mem_delay.cc | 16 +- src/mem/mem_delay.hh | 4 +- src/mem/mem_interface.cc | 102 +++++----- src/mem/mem_interface.hh | 10 +- src/mem/mem_object.hh | 2 +- src/mem/noncoherent_xbar.cc | 12 +- src/mem/noncoherent_xbar.hh | 2 +- src/mem/probes/base.cc | 15 +- src/mem/probes/base.hh | 2 +- src/mem/probes/mem_footprint.cc | 18 +- src/mem/probes/mem_footprint.hh | 2 +- src/mem/probes/mem_trace.cc | 18 +- src/mem/probes/mem_trace.hh | 2 +- src/mem/probes/stack_dist.cc | 29 ++- src/mem/probes/stack_dist.hh | 2 +- src/mem/qos/mem_ctrl.cc | 14 +- src/mem/qos/mem_ctrl.hh | 2 +- src/mem/qos/mem_sink.cc | 24 +-- src/mem/qos/mem_sink.hh | 4 +- src/mem/qos/policy.cc | 2 +- src/mem/qos/policy.hh | 2 +- src/mem/qos/policy_fixed_prio.cc | 8 +- src/mem/qos/policy_fixed_prio.hh | 2 +- src/mem/qos/policy_pf.cc | 8 +- src/mem/qos/policy_pf.hh | 9 +- src/mem/qos/q_policy.cc | 4 +- src/mem/qos/q_policy.hh | 10 +- src/mem/qos/turnaround_policy.hh | 2 +- src/mem/qos/turnaround_policy_ideal.cc | 6 +- src/mem/qos/turnaround_policy_ideal.hh | 2 +- src/mem/ruby/network/BasicLink.cc | 26 +-- src/mem/ruby/network/BasicLink.hh | 12 +- src/mem/ruby/network/BasicRouter.cc | 10 +- src/mem/ruby/network/BasicRouter.hh | 4 +- src/mem/ruby/network/MessageBuffer.cc | 14 +- src/mem/ruby/network/MessageBuffer.hh | 2 +- src/mem/ruby/network/Network.cc | 32 +-- src/mem/ruby/network/Network.hh | 9 +- src/mem/ruby/network/Topology.cc | 18 +- .../ruby/network/fault_model/FaultModel.cc | 20 +- .../ruby/network/fault_model/FaultModel.hh | 4 +- src/mem/ruby/network/garnet/CreditLink.hh | 2 +- src/mem/ruby/network/garnet/GarnetLink.cc | 66 +++---- src/mem/ruby/network/garnet/GarnetLink.hh | 4 +- src/mem/ruby/network/garnet/GarnetNetwork.cc | 30 +-- src/mem/ruby/network/garnet/GarnetNetwork.hh | 2 +- src/mem/ruby/network/garnet/NetworkBridge.cc | 14 +- src/mem/ruby/network/garnet/NetworkBridge.hh | 2 +- .../ruby/network/garnet/NetworkInterface.cc | 12 +- .../ruby/network/garnet/NetworkInterface.hh | 2 +- src/mem/ruby/network/garnet/NetworkLink.cc | 22 +-- src/mem/ruby/network/garnet/NetworkLink.hh | 2 +- src/mem/ruby/network/garnet/Router.cc | 12 +- src/mem/ruby/network/garnet/Router.hh | 2 +- src/mem/ruby/network/simple/SimpleLink.cc | 16 +- src/mem/ruby/network/simple/SimpleLink.hh | 8 +- src/mem/ruby/network/simple/SimpleNetwork.cc | 18 +- src/mem/ruby/network/simple/SimpleNetwork.hh | 2 +- src/mem/ruby/network/simple/Switch.cc | 14 +- src/mem/ruby/network/simple/Switch.hh | 2 +- src/mem/ruby/profiler/Profiler.cc | 12 +- src/mem/ruby/profiler/Profiler.hh | 2 +- .../slicc_interface/AbstractController.cc | 20 +- .../slicc_interface/AbstractController.hh | 4 +- src/mem/ruby/structures/CacheMemory.cc | 30 +-- src/mem/ruby/structures/CacheMemory.hh | 2 +- src/mem/ruby/structures/DirectoryMemory.cc | 8 +- src/mem/ruby/structures/DirectoryMemory.hh | 2 +- src/mem/ruby/structures/RubyPrefetcher.cc | 22 +-- src/mem/ruby/structures/RubyPrefetcher.hh | 2 +- src/mem/ruby/structures/WireBuffer.cc | 6 +- src/mem/ruby/structures/WireBuffer.hh | 2 +- src/mem/ruby/system/DMASequencer.cc | 8 +- src/mem/ruby/system/DMASequencer.hh | 2 +- src/mem/ruby/system/GPUCoalescer.cc | 14 +- src/mem/ruby/system/GPUCoalescer.hh | 2 +- src/mem/ruby/system/HTMSequencer.cc | 6 +- src/mem/ruby/system/HTMSequencer.hh | 2 +- src/mem/ruby/system/RubyPort.cc | 22 +-- src/mem/ruby/system/RubyPort.hh | 2 +- src/mem/ruby/system/RubyPortProxy.cc | 9 +- src/mem/ruby/system/RubyPortProxy.hh | 2 +- src/mem/ruby/system/RubySystem.cc | 18 +- src/mem/ruby/system/RubySystem.hh | 4 +- src/mem/ruby/system/Sequencer.cc | 16 +- src/mem/ruby/system/Sequencer.hh | 2 +- src/mem/ruby/system/VIPERCoalescer.cc | 6 +- src/mem/ruby/system/VIPERCoalescer.hh | 2 +- src/mem/serial_link.cc | 19 +- src/mem/serial_link.hh | 2 +- src/mem/simple_mem.cc | 10 +- src/mem/simple_mem.hh | 2 +- src/mem/slicc/symbols/StateMachine.py | 22 +-- src/mem/snoop_filter.cc | 4 +- src/mem/snoop_filter.hh | 6 +- src/mem/xbar.cc | 18 +- src/mem/xbar.hh | 2 +- src/python/m5/SimObject.py | 2 +- src/sim/clock_domain.cc | 30 +-- src/sim/clock_domain.hh | 6 +- src/sim/clocked_object.cc | 6 +- src/sim/clocked_object.hh | 6 +- src/sim/dvfs_handler.cc | 14 +- src/sim/dvfs_handler.hh | 2 +- src/sim/emul_driver.hh | 4 +- src/sim/insttracer.hh | 2 +- src/sim/kernel_workload.cc | 4 +- src/sim/power/mathexpr_powermodel.cc | 8 +- src/sim/power/mathexpr_powermodel.hh | 2 +- src/sim/power/power_model.cc | 14 +- src/sim/power/power_model.hh | 12 +- src/sim/power/thermal_domain.cc | 10 +- src/sim/power/thermal_domain.hh | 2 +- src/sim/power/thermal_model.cc | 32 +-- src/sim/power/thermal_model.hh | 12 +- src/sim/power/thermal_node.cc | 6 +- src/sim/power/thermal_node.hh | 2 +- src/sim/power_domain.cc | 8 +- src/sim/power_domain.hh | 2 +- src/sim/power_state.cc | 21 +- src/sim/power_state.hh | 7 +- src/sim/probe/probe.cc | 9 +- src/sim/probe/probe.hh | 2 +- src/sim/process.cc | 47 +++-- src/sim/process.hh | 6 +- src/sim/pseudo_inst.cc | 46 ++--- src/sim/redirect_path.cc | 10 +- src/sim/redirect_path.hh | 2 +- src/sim/root.cc | 16 +- src/sim/root.hh | 6 +- src/sim/se_workload.cc | 4 +- src/sim/sim_object.cc | 4 +- src/sim/sim_object.hh | 8 +- src/sim/sub_system.cc | 10 +- src/sim/sub_system.hh | 2 +- src/sim/system.cc | 38 ++-- src/sim/system.hh | 8 +- src/sim/ticked_object.cc | 2 +- src/sim/ticked_object.hh | 2 +- src/sim/voltage_domain.cc | 8 +- src/sim/voltage_domain.hh | 2 +- src/sim/workload.hh | 2 +- src/systemc/core/kernel.cc | 6 +- src/systemc/core/kernel.hh | 2 +- src/systemc/tlm_bridge/gem5_to_tlm.cc | 14 +- src/systemc/tlm_bridge/gem5_to_tlm.hh | 2 +- src/systemc/tlm_bridge/tlm_to_gem5.cc | 14 +- src/systemc/tlm_bridge/tlm_to_gem5.hh | 2 +- 822 files changed, 4087 insertions(+), 4047 deletions(-) diff --git a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc index c723f60a7..a9206dec3 100644 --- a/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc +++ b/src/arch/arm/fastmodel/CortexA76/cortex_a76.cc @@ -204,13 +204,13 @@ CortexA76Cluster::getPort(const std::string &if_name, PortID idx) } // namespace FastModel FastModel::CortexA76 * -FastModelCortexA76Params::create() +FastModelCortexA76Params::create() const { return new FastModel::CortexA76(*this); } FastModel::CortexA76Cluster * -FastModelCortexA76ClusterParams::create() +FastModelCortexA76ClusterParams::create() const { return new FastModel::CortexA76Cluster(*this); } diff --git a/src/arch/arm/fastmodel/CortexA76/evs.cc b/src/arch/arm/fastmodel/CortexA76/evs.cc index ddeec3ad3..4828b2df7 100644 --- a/src/arch/arm/fastmodel/CortexA76/evs.cc +++ b/src/arch/arm/fastmodel/CortexA76/evs.cc @@ -155,25 +155,25 @@ template class ScxEvsCortexA76; } // namespace FastModel FastModel::ScxEvsCortexA76x1 * -FastModelScxEvsCortexA76x1Params::create() +FastModelScxEvsCortexA76x1Params::create() const { return new FastModel::ScxEvsCortexA76x1(name.c_str(), *this); } FastModel::ScxEvsCortexA76x2 * -FastModelScxEvsCortexA76x2Params::create() +FastModelScxEvsCortexA76x2Params::create() const { return new FastModel::ScxEvsCortexA76x2(name.c_str(), *this); } FastModel::ScxEvsCortexA76x3 * -FastModelScxEvsCortexA76x3Params::create() +FastModelScxEvsCortexA76x3Params::create() const { return new FastModel::ScxEvsCortexA76x3(name.c_str(), *this); } FastModel::ScxEvsCortexA76x4 * -FastModelScxEvsCortexA76x4Params::create() +FastModelScxEvsCortexA76x4Params::create() const { return new FastModel::ScxEvsCortexA76x4(name.c_str(), *this); } diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc index c246435d4..1936e2a69 100644 --- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc +++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.cc @@ -93,7 +93,7 @@ CortexR52::getPort(const std::string &if_name, PortID idx) } } -CortexR52Cluster::CortexR52Cluster(Params &p) : +CortexR52Cluster::CortexR52Cluster(const Params &p) : SimObject(&p), _params(p), cores(p.cores), evs(p.evs) { for (int i = 0; i < p.cores.size(); i++) @@ -162,13 +162,13 @@ CortexR52Cluster::getPort(const std::string &if_name, PortID idx) } // namespace FastModel FastModel::CortexR52 * -FastModelCortexR52Params::create() +FastModelCortexR52Params::create() const { return new FastModel::CortexR52(*this); } FastModel::CortexR52Cluster * -FastModelCortexR52ClusterParams::create() +FastModelCortexR52ClusterParams::create() const { return new FastModel::CortexR52Cluster(*this); } diff --git a/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh b/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh index 2e1700d88..9abf19463 100644 --- a/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh +++ b/src/arch/arm/fastmodel/CortexR52/cortex_r52.hh @@ -62,8 +62,8 @@ class CortexR52 : public Iris::CPU const Params ¶ms() { return _params; } public: - CortexR52(Params &p) : Base(&p, scx::scx_get_iris_connection_interface()), - _params(p) + CortexR52(const Params &p) : + Base(&p, scx::scx_get_iris_connection_interface()), _params(p) {} template @@ -95,7 +95,7 @@ class CortexR52Cluster : public SimObject CortexR52 *getCore(int num) const { return cores.at(num); } sc_core::sc_module *getEvs() const { return evs; } - CortexR52Cluster(Params &p); + CortexR52Cluster(const Params &p); const Params ¶ms() { return _params; } Port &getPort(const std::string &if_name, diff --git a/src/arch/arm/fastmodel/CortexR52/evs.cc b/src/arch/arm/fastmodel/CortexR52/evs.cc index 88812ee3b..403f3c3ed 100644 --- a/src/arch/arm/fastmodel/CortexR52/evs.cc +++ b/src/arch/arm/fastmodel/CortexR52/evs.cc @@ -131,25 +131,25 @@ template class ScxEvsCortexR52; } // namespace FastModel FastModel::ScxEvsCortexR52x1 * -FastModelScxEvsCortexR52x1Params::create() +FastModelScxEvsCortexR52x1Params::create() const { return new FastModel::ScxEvsCortexR52x1(name.c_str(), *this); } FastModel::ScxEvsCortexR52x2 * -FastModelScxEvsCortexR52x2Params::create() +FastModelScxEvsCortexR52x2Params::create() const { return new FastModel::ScxEvsCortexR52x2(name.c_str(), *this); } FastModel::ScxEvsCortexR52x3 * -FastModelScxEvsCortexR52x3Params::create() +FastModelScxEvsCortexR52x3Params::create() const { return new FastModel::ScxEvsCortexR52x3(name.c_str(), *this); } FastModel::ScxEvsCortexR52x4 * -FastModelScxEvsCortexR52x4Params::create() +FastModelScxEvsCortexR52x4Params::create() const { return new FastModel::ScxEvsCortexR52x4(name.c_str(), *this); } diff --git a/src/arch/arm/fastmodel/GIC/gic.cc b/src/arch/arm/fastmodel/GIC/gic.cc index c1670455a..97d015453 100644 --- a/src/arch/arm/fastmodel/GIC/gic.cc +++ b/src/arch/arm/fastmodel/GIC/gic.cc @@ -360,13 +360,13 @@ GIC::supportsVersion(GicVersion version) } // namespace FastModel FastModel::SCGIC * -SCFastModelGICParams::create() +SCFastModelGICParams::create() const { return new FastModel::SCGIC(*this, name.c_str()); } FastModel::GIC * -FastModelGICParams::create() +FastModelGICParams::create() const { return new FastModel::GIC(*this); } diff --git a/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc b/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc index 5ce494f15..fbabc7a15 100644 --- a/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc +++ b/src/arch/arm/fastmodel/amba_from_tlm_bridge.cc @@ -54,7 +54,7 @@ AmbaFromTlmBridge64::gem5_getPort(const std::string &if_name, int idx) } // namespace FastModel FastModel::AmbaFromTlmBridge64 * -AmbaFromTlmBridge64Params::create() +AmbaFromTlmBridge64Params::create() const { return new FastModel::AmbaFromTlmBridge64(name.c_str()); } diff --git a/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc b/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc index 0835c0bbc..a011e355d 100644 --- a/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc +++ b/src/arch/arm/fastmodel/amba_to_tlm_bridge.cc @@ -52,7 +52,7 @@ AmbaToTlmBridge64::gem5_getPort(const std::string &if_name, int idx) } // namespace FastModel FastModel::AmbaToTlmBridge64 * -AmbaToTlmBridge64Params::create() +AmbaToTlmBridge64Params::create() const { return new FastModel::AmbaToTlmBridge64(name.c_str()); } diff --git a/src/arch/arm/fastmodel/iris/cpu.cc b/src/arch/arm/fastmodel/iris/cpu.cc index 7d31a9b86..cf93c8cd5 100644 --- a/src/arch/arm/fastmodel/iris/cpu.cc +++ b/src/arch/arm/fastmodel/iris/cpu.cc @@ -34,7 +34,7 @@ namespace Iris { -BaseCPU::BaseCPU(BaseCPUParams *params, sc_core::sc_module *_evs) : +BaseCPU::BaseCPU(const BaseCPUParams ¶ms, sc_core::sc_module *_evs) : ::BaseCPU::BaseCPU(params), evs(_evs), clockEvent(nullptr), periodAttribute(nullptr) { diff --git a/src/arch/arm/fastmodel/iris/cpu.hh b/src/arch/arm/fastmodel/iris/cpu.hh index b0ba2c1ec..39d9a1395 100644 --- a/src/arch/arm/fastmodel/iris/cpu.hh +++ b/src/arch/arm/fastmodel/iris/cpu.hh @@ -58,7 +58,7 @@ static const std::string SendFunctionalAttributeName = "gem5_send_functional"; class BaseCPU : public ::BaseCPU { public: - BaseCPU(BaseCPUParams *params, sc_core::sc_module *_evs); + BaseCPU(const BaseCPUParams ¶ms, sc_core::sc_module *_evs); virtual ~BaseCPU(); Port & @@ -128,18 +128,19 @@ template class CPU : public Iris::BaseCPU { public: - CPU(IrisBaseCPUParams *params, iris::IrisConnectionInterface *iris_if) : - BaseCPU(params, params->evs) + CPU(const IrisBaseCPUParams ¶ms, + iris::IrisConnectionInterface *iris_if) : + BaseCPU(params, params.evs) { const std::string parent_path = evs->name(); - System *sys = params->system; + System *sys = params.system; int thread_id = 0; - for (const std::string &sub_path: params->thread_paths) { + for (const std::string &sub_path: params.thread_paths) { std::string path = parent_path + "." + sub_path; auto id = thread_id++; - auto *tc = new TC(this, id, sys, params->dtb, params->itb, - params->isa[id], iris_if, path); + auto *tc = new TC(this, id, sys, params.dtb, params.itb, + params.isa[id], iris_if, path); threadContexts.push_back(tc); } } diff --git a/src/arch/arm/fastmodel/iris/interrupts.cc b/src/arch/arm/fastmodel/iris/interrupts.cc index 197608901..a6cf6c03d 100644 --- a/src/arch/arm/fastmodel/iris/interrupts.cc +++ b/src/arch/arm/fastmodel/iris/interrupts.cc @@ -108,7 +108,7 @@ Iris::Interrupts::unserialize(CheckpointIn &cp) } Iris::Interrupts * -IrisInterruptsParams::create() +IrisInterruptsParams::create() const { - return new Iris::Interrupts(this); + return new Iris::Interrupts(*this); } diff --git a/src/arch/arm/fastmodel/iris/interrupts.hh b/src/arch/arm/fastmodel/iris/interrupts.hh index bb97e635c..3a5c20c11 100644 --- a/src/arch/arm/fastmodel/iris/interrupts.hh +++ b/src/arch/arm/fastmodel/iris/interrupts.hh @@ -40,13 +40,13 @@ class Interrupts : public BaseInterrupts public: typedef IrisInterruptsParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Interrupts(Params *p) : BaseInterrupts(p) {} + Interrupts(const Params &p) : BaseInterrupts(p) {} bool checkInterrupts() const override { return false; } Fault getInterrupt() override { return NoFault; } diff --git a/src/arch/arm/fastmodel/iris/isa.cc b/src/arch/arm/fastmodel/iris/isa.cc index 19b0d16e8..20ebf1c1d 100644 --- a/src/arch/arm/fastmodel/iris/isa.cc +++ b/src/arch/arm/fastmodel/iris/isa.cc @@ -42,7 +42,7 @@ Iris::ISA::serialize(CheckpointOut &cp) const } Iris::ISA * -IrisISAParams::create() +IrisISAParams::create() const { - return new Iris::ISA(this); + return new Iris::ISA(*this); } diff --git a/src/arch/arm/fastmodel/iris/isa.hh b/src/arch/arm/fastmodel/iris/isa.hh index 72f2c1c79..d9646df23 100644 --- a/src/arch/arm/fastmodel/iris/isa.hh +++ b/src/arch/arm/fastmodel/iris/isa.hh @@ -36,7 +36,7 @@ namespace Iris class ISA : public BaseISA { public: - ISA(const Params *p) : BaseISA(p) {} + ISA(const Params &p) : BaseISA(p) {} void serialize(CheckpointOut &cp) const; }; diff --git a/src/arch/arm/fastmodel/iris/mmu.cc b/src/arch/arm/fastmodel/iris/mmu.cc index 407c18a90..21d16015b 100644 --- a/src/arch/arm/fastmodel/iris/mmu.cc +++ b/src/arch/arm/fastmodel/iris/mmu.cc @@ -38,7 +38,7 @@ #include "arch/arm/fastmodel/iris/mmu.hh" Iris::MMU * -IrisMMUParams::create() +IrisMMUParams::create() const { - return new Iris::MMU(this); + return new Iris::MMU(*this); } diff --git a/src/arch/arm/fastmodel/iris/mmu.hh b/src/arch/arm/fastmodel/iris/mmu.hh index 19899511d..1a7c28997 100644 --- a/src/arch/arm/fastmodel/iris/mmu.hh +++ b/src/arch/arm/fastmodel/iris/mmu.hh @@ -48,7 +48,7 @@ namespace Iris class MMU : public BaseMMU { public: - MMU(const Params *p) : BaseMMU(p) {} + MMU(const Params &p) : BaseMMU(p) {} }; } // namespace Iris diff --git a/src/arch/arm/fastmodel/iris/tlb.cc b/src/arch/arm/fastmodel/iris/tlb.cc index e99c679ef..84dd59d46 100644 --- a/src/arch/arm/fastmodel/iris/tlb.cc +++ b/src/arch/arm/fastmodel/iris/tlb.cc @@ -67,7 +67,7 @@ Iris::TLB::translateTiming(const RequestPtr &req, ::ThreadContext *tc, } Iris::TLB * -IrisTLBParams::create() +IrisTLBParams::create() const { - return new Iris::TLB(this); + return new Iris::TLB(*this); } diff --git a/src/arch/arm/fastmodel/iris/tlb.hh b/src/arch/arm/fastmodel/iris/tlb.hh index 1d9c216bc..75d87436c 100644 --- a/src/arch/arm/fastmodel/iris/tlb.hh +++ b/src/arch/arm/fastmodel/iris/tlb.hh @@ -36,7 +36,7 @@ namespace Iris class TLB : public BaseTLB { public: - TLB(const Params *p) : BaseTLB(p) {} + TLB(const Params &p) : BaseTLB(p) {} void demapPage(Addr vaddr, uint64_t asn) override {} void flushAll() override {} diff --git a/src/arch/arm/freebsd/fs_workload.cc b/src/arch/arm/freebsd/fs_workload.cc index 080dc35e9..8beba8bf5 100644 --- a/src/arch/arm/freebsd/fs_workload.cc +++ b/src/arch/arm/freebsd/fs_workload.cc @@ -51,10 +51,10 @@ using namespace FreeBSD; namespace ArmISA { -FsFreebsd::FsFreebsd(Params *p) : ArmISA::FsWorkload(p), - enableContextSwitchStatsDump(p->enable_context_switch_stats_dump) +FsFreebsd::FsFreebsd(const Params &p) : ArmISA::FsWorkload(p), + enableContextSwitchStatsDump(p.enable_context_switch_stats_dump) { - if (p->panic_on_panic) { + if (p.panic_on_panic) { kernelPanic = addKernelFuncEventOrPanic( "panic", "Kernel panic in simulated kernel"); } else { @@ -63,7 +63,7 @@ FsFreebsd::FsFreebsd(Params *p) : ArmISA::FsWorkload(p), #endif } - if (p->panic_on_oops) { + if (p.panic_on_oops) { kernelOops = addKernelFuncEventOrPanic( "oops_exit", "Kernel oops in guest"); } @@ -80,7 +80,7 @@ FsFreebsd::initState() // Load symbols at physical address, we might not want // to do this permanently, for but early bootup work // it is helpful. - if (params()->early_kernel_symbols) { + if (params().early_kernel_symbols) { auto phys_globals = kernelObj->symtab().globals()->mask(_loadAddrMask); kernelSymtab.insert(*phys_globals); Loader::debugSymbolTable.insert(*phys_globals); @@ -90,33 +90,33 @@ FsFreebsd::initState() // device trees. fatal_if(kernelSymtab.find("fdt_get_range") == kernelSymtab.end(), "Kernel must have fdt support."); - fatal_if(params()->dtb_filename == "", "dtb file is not specified."); + fatal_if(params().dtb_filename == "", "dtb file is not specified."); // Kernel supports flattened device tree and dtb file specified. // Using Device Tree Blob to describe system configuration. - inform("Loading DTB file: %s at address %#x\n", params()->dtb_filename, - params()->atags_addr + _loadAddrOffset); + inform("Loading DTB file: %s at address %#x\n", params().dtb_filename, + params().atags_addr + _loadAddrOffset); - auto *dtb_file = new ::Loader::DtbFile(params()->dtb_filename); + auto *dtb_file = new ::Loader::DtbFile(params().dtb_filename); warn_if(!dtb_file->addBootCmdLine(commandLine.c_str(), commandLine.size()), "Couldn't append bootargs to DTB file: %s", - params()->dtb_filename); + params().dtb_filename); Addr ra = dtb_file->findReleaseAddr(); if (ra) bootReleaseAddr = ra & ~ULL(0x7F); dtb_file->buildImage(). - offset(params()->atags_addr + _loadAddrOffset). + offset(params().atags_addr + _loadAddrOffset). write(system->physProxy); delete dtb_file; // Kernel boot requirements to set up r0, r1 and r2 in ARMv7 for (auto *tc: system->threads) { tc->setIntReg(0, 0); - tc->setIntReg(1, params()->machine_type); - tc->setIntReg(2, params()->atags_addr + _loadAddrOffset); + tc->setIntReg(1, params().machine_type); + tc->setIntReg(2, params().atags_addr + _loadAddrOffset); } } @@ -128,7 +128,7 @@ FsFreebsd::~FsFreebsd() } // namespace ArmISA ArmISA::FsFreebsd * -ArmFsFreebsdParams::create() +ArmFsFreebsdParams::create() const { - return new ArmISA::FsFreebsd(this); + return new ArmISA::FsFreebsd(*this); } diff --git a/src/arch/arm/freebsd/fs_workload.hh b/src/arch/arm/freebsd/fs_workload.hh index eed1d09b5..67ac820d6 100644 --- a/src/arch/arm/freebsd/fs_workload.hh +++ b/src/arch/arm/freebsd/fs_workload.hh @@ -47,10 +47,10 @@ class FsFreebsd : public ArmISA::FsWorkload public: /** Boilerplate params code */ typedef ArmFsFreebsdParams Params; - const Params * + const Params & params() const { - return dynamic_cast(&_params); + return dynamic_cast(_params); } /** When enabled, dump stats/task info on context switches for @@ -67,7 +67,7 @@ class FsFreebsd : public ArmISA::FsWorkload * mappings between taskIds and OS process IDs */ std::ostream* taskFile; - FsFreebsd(Params *p); + FsFreebsd(const Params &p); ~FsFreebsd(); void initState() override; diff --git a/src/arch/arm/freebsd/process.cc b/src/arch/arm/freebsd/process.cc index 4bf6bcca6..ecdb8aab3 100644 --- a/src/arch/arm/freebsd/process.cc +++ b/src/arch/arm/freebsd/process.cc @@ -62,7 +62,7 @@ class ArmFreebsdObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { auto arch = obj_file->getArch(); auto opsys = obj_file->getOpSys(); @@ -150,12 +150,12 @@ static SyscallDescTable syscallDescs64 = { { 477, "mmap", mmapFunc } }; -ArmFreebsdProcess32::ArmFreebsdProcess32(ProcessParams * params, +ArmFreebsdProcess32::ArmFreebsdProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : ArmProcess32(params, objFile, _arch) {} -ArmFreebsdProcess64::ArmFreebsdProcess64(ProcessParams * params, +ArmFreebsdProcess64::ArmFreebsdProcess64(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : ArmProcess64(params, objFile, _arch) {} diff --git a/src/arch/arm/freebsd/process.hh b/src/arch/arm/freebsd/process.hh index b64a3a06b..de6539b40 100644 --- a/src/arch/arm/freebsd/process.hh +++ b/src/arch/arm/freebsd/process.hh @@ -77,8 +77,8 @@ struct ResultentryPoint() & loadAddrMask()) + loadAddrOffset(); } - bootLoaders.reserve(p->boot_loader.size()); - for (const auto &bl : p->boot_loader) { + bootLoaders.reserve(p.boot_loader.size()); + for (const auto &bl : p.boot_loader) { std::unique_ptr bl_obj; bl_obj.reset(Loader::createObjectFile(bl)); @@ -120,18 +120,18 @@ FsWorkload::initState() // Put the address of the boot loader into r7 so we know // where to branch to after the reset fault // All other values needed by the boot loader to know what to do - fatal_if(!arm_sys->params()->flags_addr, + fatal_if(!arm_sys->params().flags_addr, "flags_addr must be set with bootloader"); - fatal_if(!arm_sys->params()->gic_cpu_addr && is_gic_v2, + fatal_if(!arm_sys->params().gic_cpu_addr && is_gic_v2, "gic_cpu_addr must be set with bootloader"); for (auto *tc: arm_sys->threads) { if (!arm_sys->highestELIs64()) tc->setIntReg(3, kernelEntry); if (is_gic_v2) - tc->setIntReg(4, arm_sys->params()->gic_cpu_addr); - tc->setIntReg(5, arm_sys->params()->flags_addr); + tc->setIntReg(4, arm_sys->params().gic_cpu_addr); + tc->setIntReg(5, arm_sys->params().flags_addr); } inform("Using kernel entry physical address at %#x\n", kernelEntry); } else { @@ -159,7 +159,7 @@ FsWorkload::getBootLoader(Loader::ObjectFile *const obj) } // namespace ArmISA ArmISA::FsWorkload * -ArmFsWorkloadParams::create() +ArmFsWorkloadParams::create() const { - return new ArmISA::FsWorkload(this); + return new ArmISA::FsWorkload(*this); } diff --git a/src/arch/arm/fs_workload.hh b/src/arch/arm/fs_workload.hh index 0618b8a9d..446167047 100644 --- a/src/arch/arm/fs_workload.hh +++ b/src/arch/arm/fs_workload.hh @@ -88,10 +88,10 @@ class FsWorkload : public KernelWorkload public: typedef ArmFsWorkloadParams Params; - const Params * + const Params & params() const { - return dynamic_cast(&_params); + return dynamic_cast(_params); } Addr @@ -114,7 +114,7 @@ class FsWorkload : public KernelWorkload return Loader::Arm64; } - FsWorkload(Params *p); + FsWorkload(const Params &p); void initState() override; diff --git a/src/arch/arm/interrupts.cc b/src/arch/arm/interrupts.cc index 13c281e4d..f5e7782c1 100644 --- a/src/arch/arm/interrupts.cc +++ b/src/arch/arm/interrupts.cc @@ -40,9 +40,9 @@ #include "arch/arm/system.hh" ArmISA::Interrupts * -ArmInterruptsParams::create() +ArmInterruptsParams::create() const { - return new ArmISA::Interrupts(this); + return new ArmISA::Interrupts(*this); } bool diff --git a/src/arch/arm/interrupts.hh b/src/arch/arm/interrupts.hh index 5c42dd959..b9f6d6e15 100644 --- a/src/arch/arm/interrupts.hh +++ b/src/arch/arm/interrupts.hh @@ -76,13 +76,13 @@ class Interrupts : public BaseInterrupts typedef ArmInterruptsParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Interrupts(Params * p) : BaseInterrupts(p) + Interrupts(const Params &p) : BaseInterrupts(p) { clearAll(); } diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc index 8ec2dc6dd..c54220def 100644 --- a/src/arch/arm/isa.cc +++ b/src/arch/arm/isa.cc @@ -60,9 +60,9 @@ namespace ArmISA { -ISA::ISA(Params *p) : BaseISA(p), system(NULL), - _decoderFlavor(p->decoderFlavor), _vecRegRenameMode(Enums::Full), - pmu(p->pmu), impdefAsNop(p->impdef_nop), +ISA::ISA(const Params &p) : BaseISA(p), system(NULL), + _decoderFlavor(p.decoderFlavor), _vecRegRenameMode(Enums::Full), + pmu(p.pmu), impdefAsNop(p.impdef_nop), afterStartup(false) { miscRegs[MISCREG_SCTLR_RST] = 0; @@ -76,7 +76,7 @@ ISA::ISA(Params *p) : BaseISA(p), system(NULL), // Give all ISA devices a pointer to this ISA pmu->setISA(this); - system = dynamic_cast(p->system); + system = dynamic_cast(p.system); // Cache system-level properties if (FullSystem && system) { @@ -102,7 +102,7 @@ ISA::ISA(Params *p) : BaseISA(p), system(NULL), haveSVE = true; havePAN = false; haveSecEL2 = true; - sveVL = p->sve_vl_se; + sveVL = p.sve_vl_se; haveLSE = true; haveTME = true; } @@ -120,16 +120,16 @@ ISA::ISA(Params *p) : BaseISA(p), system(NULL), std::vector ISA::lookUpMiscReg(NUM_MISCREGS); -const ArmISAParams * +const ArmISAParams & ISA::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void ISA::clear() { - const Params *p(params()); + const Params &p(params()); // Invalidate cached copies of miscregs in the TLBs if (tc) { @@ -220,7 +220,7 @@ ISA::clear() } void -ISA::clear32(const ArmISAParams *p, const SCTLR &sctlr_rst) +ISA::clear32(const ArmISAParams &p, const SCTLR &sctlr_rst) { CPSR cpsr = 0; cpsr.mode = MODE_USER; @@ -249,7 +249,7 @@ ISA::clear32(const ArmISAParams *p, const SCTLR &sctlr_rst) miscRegs[MISCREG_CPACR] = 0; - miscRegs[MISCREG_FPSID] = p->fpsid; + miscRegs[MISCREG_FPSID] = p.fpsid; if (haveLPAE) { TTBCR ttbcr = miscRegs[MISCREG_TTBCR_NS]; @@ -272,7 +272,7 @@ ISA::clear32(const ArmISAParams *p, const SCTLR &sctlr_rst) } void -ISA::clear64(const ArmISAParams *p) +ISA::clear64(const ArmISAParams &p) { CPSR cpsr = 0; Addr rvbar = system->resetAddr(); @@ -321,13 +321,13 @@ ISA::clear64(const ArmISAParams *p) } void -ISA::initID32(const ArmISAParams *p) +ISA::initID32(const ArmISAParams &p) { // Initialize configurable default values uint32_t midr; - if (p->midr != 0x0) - midr = p->midr; + if (p.midr != 0x0) + midr = p.midr; else if (highestELIs64) // Cortex-A57 TRM r0p0 MIDR midr = 0x410fd070; @@ -339,17 +339,17 @@ ISA::initID32(const ArmISAParams *p) miscRegs[MISCREG_MIDR_EL1] = midr; miscRegs[MISCREG_VPIDR] = midr; - miscRegs[MISCREG_ID_ISAR0] = p->id_isar0; - miscRegs[MISCREG_ID_ISAR1] = p->id_isar1; - miscRegs[MISCREG_ID_ISAR2] = p->id_isar2; - miscRegs[MISCREG_ID_ISAR3] = p->id_isar3; - miscRegs[MISCREG_ID_ISAR4] = p->id_isar4; - miscRegs[MISCREG_ID_ISAR5] = p->id_isar5; + miscRegs[MISCREG_ID_ISAR0] = p.id_isar0; + miscRegs[MISCREG_ID_ISAR1] = p.id_isar1; + miscRegs[MISCREG_ID_ISAR2] = p.id_isar2; + miscRegs[MISCREG_ID_ISAR3] = p.id_isar3; + miscRegs[MISCREG_ID_ISAR4] = p.id_isar4; + miscRegs[MISCREG_ID_ISAR5] = p.id_isar5; - miscRegs[MISCREG_ID_MMFR0] = p->id_mmfr0; - miscRegs[MISCREG_ID_MMFR1] = p->id_mmfr1; - miscRegs[MISCREG_ID_MMFR2] = p->id_mmfr2; - miscRegs[MISCREG_ID_MMFR3] = p->id_mmfr3; + miscRegs[MISCREG_ID_MMFR0] = p.id_mmfr0; + miscRegs[MISCREG_ID_MMFR1] = p.id_mmfr1; + miscRegs[MISCREG_ID_MMFR2] = p.id_mmfr2; + miscRegs[MISCREG_ID_MMFR3] = p.id_mmfr3; miscRegs[MISCREG_ID_ISAR5] = insertBits( miscRegs[MISCREG_ID_ISAR5], 19, 4, @@ -357,24 +357,24 @@ ISA::initID32(const ArmISAParams *p) } void -ISA::initID64(const ArmISAParams *p) +ISA::initID64(const ArmISAParams &p) { // Initialize configurable id registers - miscRegs[MISCREG_ID_AA64AFR0_EL1] = p->id_aa64afr0_el1; - miscRegs[MISCREG_ID_AA64AFR1_EL1] = p->id_aa64afr1_el1; + miscRegs[MISCREG_ID_AA64AFR0_EL1] = p.id_aa64afr0_el1; + miscRegs[MISCREG_ID_AA64AFR1_EL1] = p.id_aa64afr1_el1; miscRegs[MISCREG_ID_AA64DFR0_EL1] = - (p->id_aa64dfr0_el1 & 0xfffffffffffff0ffULL) | - (p->pmu ? 0x0000000000000100ULL : 0); // Enable PMUv3 + (p.id_aa64dfr0_el1 & 0xfffffffffffff0ffULL) | + (p.pmu ? 0x0000000000000100ULL : 0); // Enable PMUv3 - miscRegs[MISCREG_ID_AA64DFR1_EL1] = p->id_aa64dfr1_el1; - miscRegs[MISCREG_ID_AA64ISAR0_EL1] = p->id_aa64isar0_el1; - miscRegs[MISCREG_ID_AA64ISAR1_EL1] = p->id_aa64isar1_el1; - miscRegs[MISCREG_ID_AA64MMFR0_EL1] = p->id_aa64mmfr0_el1; - miscRegs[MISCREG_ID_AA64MMFR1_EL1] = p->id_aa64mmfr1_el1; - miscRegs[MISCREG_ID_AA64MMFR2_EL1] = p->id_aa64mmfr2_el1; + miscRegs[MISCREG_ID_AA64DFR1_EL1] = p.id_aa64dfr1_el1; + miscRegs[MISCREG_ID_AA64ISAR0_EL1] = p.id_aa64isar0_el1; + miscRegs[MISCREG_ID_AA64ISAR1_EL1] = p.id_aa64isar1_el1; + miscRegs[MISCREG_ID_AA64MMFR0_EL1] = p.id_aa64mmfr0_el1; + miscRegs[MISCREG_ID_AA64MMFR1_EL1] = p.id_aa64mmfr1_el1; + miscRegs[MISCREG_ID_AA64MMFR2_EL1] = p.id_aa64mmfr2_el1; miscRegs[MISCREG_ID_DFR0_EL1] = - (p->pmu ? 0x03000000ULL : 0); // Enable PMUv3 + (p.pmu ? 0x03000000ULL : 0); // Enable PMUv3 miscRegs[MISCREG_ID_DFR0] = miscRegs[MISCREG_ID_DFR0_EL1]; @@ -2481,7 +2481,7 @@ ISA::MiscRegLUTEntryInitializer::highest(ArmSystem *const sys) const } // namespace ArmISA ArmISA::ISA * -ArmISAParams::create() +ArmISAParams::create() const { - return new ArmISA::ISA(this); + return new ArmISA::ISA(*this); } diff --git a/src/arch/arm/isa.hh b/src/arch/arm/isa.hh index 910dc2cc4..4a824edce 100644 --- a/src/arch/arm/isa.hh +++ b/src/arch/arm/isa.hh @@ -461,10 +461,10 @@ namespace ArmISA void clear(); protected: - void clear32(const ArmISAParams *p, const SCTLR &sctlr_rst); - void clear64(const ArmISAParams *p); - void initID32(const ArmISAParams *p); - void initID64(const ArmISAParams *p); + void clear32(const ArmISAParams &p, const SCTLR &sctlr_rst); + void clear64(const ArmISAParams &p); + void initID32(const ArmISAParams &p); + void initID64(const ArmISAParams &p); void addressTranslation(TLB::ArmTranslationType tran_type, BaseTLB::Mode mode, Request::Flags flags, RegVal val); @@ -853,9 +853,9 @@ namespace ArmISA typedef ArmISAParams Params; - const Params *params() const; + const Params ¶ms() const; - ISA(Params *p); + ISA(const Params &p); }; } diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc index a8b07b99f..0e5823e23 100644 --- a/src/arch/arm/kvm/arm_cpu.cc +++ b/src/arch/arm/kvm/arm_cpu.cc @@ -241,7 +241,7 @@ ArmKvmCPU::KvmCoreMiscRegInfo ArmKvmCPU::kvmCoreMiscRegs[] = { { 0, NUM_MISCREGS } }; -ArmKvmCPU::ArmKvmCPU(ArmKvmCPUParams *params) +ArmKvmCPU::ArmKvmCPU(const ArmKvmCPUParams ¶ms) : BaseKvmCPU(params), irqAsserted(false), fiqAsserted(false) { @@ -843,7 +843,7 @@ ArmKvmCPU::updateTCStateVFP(uint64_t id, bool show_warnings) } ArmKvmCPU * -ArmKvmCPUParams::create() +ArmKvmCPUParams::create() const { - return new ArmKvmCPU(this); + return new ArmKvmCPU(*this); } diff --git a/src/arch/arm/kvm/arm_cpu.hh b/src/arch/arm/kvm/arm_cpu.hh index cc3c93546..2bf9557b9 100644 --- a/src/arch/arm/kvm/arm_cpu.hh +++ b/src/arch/arm/kvm/arm_cpu.hh @@ -59,7 +59,7 @@ class ArmKvmCPU : public BaseKvmCPU { public: - ArmKvmCPU(ArmKvmCPUParams *params); + ArmKvmCPU(const ArmKvmCPUParams ¶ms); virtual ~ArmKvmCPU(); void startup(); diff --git a/src/arch/arm/kvm/armv8_cpu.cc b/src/arch/arm/kvm/armv8_cpu.cc index 1001f81d3..324507a2d 100644 --- a/src/arch/arm/kvm/armv8_cpu.cc +++ b/src/arch/arm/kvm/armv8_cpu.cc @@ -123,7 +123,7 @@ const std::vector ArmV8KvmCPU::miscRegIdMap = { MiscRegInfo(SYS_MPIDR_EL1, MISCREG_MPIDR_EL1, "MPIDR(EL1)"), }; -ArmV8KvmCPU::ArmV8KvmCPU(ArmV8KvmCPUParams *params) +ArmV8KvmCPU::ArmV8KvmCPU(const ArmV8KvmCPUParams ¶ms) : BaseArmKvmCPU(params) { } @@ -397,7 +397,7 @@ ArmV8KvmCPU::getSysRegMap() const } ArmV8KvmCPU * -ArmV8KvmCPUParams::create() +ArmV8KvmCPUParams::create() const { - return new ArmV8KvmCPU(this); + return new ArmV8KvmCPU(*this); } diff --git a/src/arch/arm/kvm/armv8_cpu.hh b/src/arch/arm/kvm/armv8_cpu.hh index dae9fe70c..8537bb5a1 100644 --- a/src/arch/arm/kvm/armv8_cpu.hh +++ b/src/arch/arm/kvm/armv8_cpu.hh @@ -79,7 +79,7 @@ struct ArmV8KvmCPUParams; class ArmV8KvmCPU : public BaseArmKvmCPU { public: - ArmV8KvmCPU(ArmV8KvmCPUParams *params); + ArmV8KvmCPU(const ArmV8KvmCPUParams ¶ms); virtual ~ArmV8KvmCPU(); void startup() override; diff --git a/src/arch/arm/kvm/base_cpu.cc b/src/arch/arm/kvm/base_cpu.cc index 6fd2651c6..2a948c72f 100644 --- a/src/arch/arm/kvm/base_cpu.cc +++ b/src/arch/arm/kvm/base_cpu.cc @@ -59,7 +59,7 @@ using namespace ArmISA; INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_FIQ) -BaseArmKvmCPU::BaseArmKvmCPU(BaseArmKvmCPUParams *params) +BaseArmKvmCPU::BaseArmKvmCPU(const BaseArmKvmCPUParams ¶ms) : BaseKvmCPU(params), irqAsserted(false), fiqAsserted(false), virtTimerPin(nullptr), prevDeviceIRQLevel(0) @@ -90,7 +90,7 @@ BaseArmKvmCPU::startup() if (!vm.hasKernelIRQChip()) virtTimerPin = static_cast(system)\ - ->getGenericTimer()->params()->int_virt->get(tc); + ->getGenericTimer()->params().int_virt->get(tc); } Tick diff --git a/src/arch/arm/kvm/base_cpu.hh b/src/arch/arm/kvm/base_cpu.hh index 028cd3903..641954711 100644 --- a/src/arch/arm/kvm/base_cpu.hh +++ b/src/arch/arm/kvm/base_cpu.hh @@ -48,7 +48,7 @@ struct BaseArmKvmCPUParams; class BaseArmKvmCPU : public BaseKvmCPU { public: - BaseArmKvmCPU(BaseArmKvmCPUParams *params); + BaseArmKvmCPU(const BaseArmKvmCPUParams ¶ms); virtual ~BaseArmKvmCPU(); void startup() override; diff --git a/src/arch/arm/kvm/gic.cc b/src/arch/arm/kvm/gic.cc index 97f0fa383..5f5cd14df 100644 --- a/src/arch/arm/kvm/gic.cc +++ b/src/arch/arm/kvm/gic.cc @@ -164,15 +164,15 @@ KvmKernelGicV2::writeCpu(ContextID ctx, Addr daddr, uint32_t data) -MuxingKvmGic::MuxingKvmGic(const MuxingKvmGicParams *p) +MuxingKvmGic::MuxingKvmGic(const MuxingKvmGicParams &p) : GicV2(p), - system(*p->system), + system(*p.system), kernelGic(nullptr), usingKvm(false) { if (auto vm = system.getKvmVM()) { - kernelGic = new KvmKernelGicV2(*vm, p->cpu_addr, p->dist_addr, - p->it_lines); + kernelGic = new KvmKernelGicV2(*vm, p.cpu_addr, p.dist_addr, + p.it_lines); } } @@ -427,7 +427,7 @@ MuxingKvmGic::fromKvmToGicV2() } MuxingKvmGic * -MuxingKvmGicParams::create() +MuxingKvmGicParams::create() const { - return new MuxingKvmGic(this); + return new MuxingKvmGic(*this); } diff --git a/src/arch/arm/kvm/gic.hh b/src/arch/arm/kvm/gic.hh index 9abd67ca9..79463b379 100644 --- a/src/arch/arm/kvm/gic.hh +++ b/src/arch/arm/kvm/gic.hh @@ -168,7 +168,7 @@ struct MuxingKvmGicParams; class MuxingKvmGic : public GicV2 { public: // SimObject / Serializable / Drainable - MuxingKvmGic(const MuxingKvmGicParams *p); + MuxingKvmGic(const MuxingKvmGicParams &p); ~MuxingKvmGic(); void startup() override; diff --git a/src/arch/arm/linux/fs_workload.cc b/src/arch/arm/linux/fs_workload.cc index 8aba285cb..ad68b22bf 100644 --- a/src/arch/arm/linux/fs_workload.cc +++ b/src/arch/arm/linux/fs_workload.cc @@ -63,8 +63,8 @@ using namespace Linux; namespace ArmISA { -FsLinux::FsLinux(Params *p) : ArmISA::FsWorkload(p), - enableContextSwitchStatsDump(p->enable_context_switch_stats_dump) +FsLinux::FsLinux(const Params &p) : ArmISA::FsWorkload(p), + enableContextSwitchStatsDump(p.enable_context_switch_stats_dump) {} void @@ -75,7 +75,7 @@ FsLinux::initState() // Load symbols at physical address, we might not want // to do this permanently, for but early bootup work // it is helpful. - if (params()->early_kernel_symbols) { + if (params().early_kernel_symbols) { auto phys_globals = kernelObj->symtab().globals()->mask(_loadAddrMask); kernelSymtab.insert(*phys_globals); Loader::debugSymbolTable.insert(*phys_globals); @@ -86,24 +86,24 @@ FsLinux::initState() // device trees. bool kernel_has_fdt_support = kernelSymtab.find("unflatten_device_tree") != kernelSymtab.end(); - bool dtb_file_specified = params()->dtb_filename != ""; + bool dtb_file_specified = params().dtb_filename != ""; if (kernel_has_fdt_support && dtb_file_specified) { // Kernel supports flattened device tree and dtb file specified. // Using Device Tree Blob to describe system configuration. - inform("Loading DTB file: %s at address %#x\n", params()->dtb_filename, - params()->atags_addr + _loadAddrOffset); + inform("Loading DTB file: %s at address %#x\n", params().dtb_filename, + params().atags_addr + _loadAddrOffset); - auto *dtb_file = new ::Loader::DtbFile(params()->dtb_filename); + auto *dtb_file = new ::Loader::DtbFile(params().dtb_filename); if (!dtb_file->addBootCmdLine( commandLine.c_str(), commandLine.size())) { warn("couldn't append bootargs to DTB file: %s\n", - params()->dtb_filename); + params().dtb_filename); } dtb_file->buildImage(). - offset(params()->atags_addr + _loadAddrOffset). + offset(params().atags_addr + _loadAddrOffset). write(system->physProxy); delete dtb_file; } else { @@ -152,7 +152,7 @@ FsLinux::initState() DPRINTF(Loader, "Boot atags was %d bytes in total\n", size << 2); DDUMP(Loader, boot_data, size << 2); - system->physProxy.writeBlob(params()->atags_addr + _loadAddrOffset, + system->physProxy.writeBlob(params().atags_addr + _loadAddrOffset, boot_data, size << 2); delete[] boot_data; @@ -161,8 +161,8 @@ FsLinux::initState() // Kernel boot requirements to set up r0, r1 and r2 in ARMv7 for (auto *tc: system->threads) { tc->setIntReg(0, 0); - tc->setIntReg(1, params()->machine_type); - tc->setIntReg(2, params()->atags_addr + _loadAddrOffset); + tc->setIntReg(1, params().machine_type); + tc->setIntReg(2, params().atags_addr + _loadAddrOffset); } } @@ -203,7 +203,7 @@ FsLinux::startup() } const std::string dmesg_output = name() + ".dmesg"; - if (params()->panic_on_panic) { + if (params().panic_on_panic) { kernelPanic = addKernelFuncEventOrPanic( "panic", "Kernel panic in simulated kernel", dmesg_output); } else { @@ -211,7 +211,7 @@ FsLinux::startup() "panic", "Kernel panic in simulated kernel", dmesg_output); } - if (params()->panic_on_oops) { + if (params().panic_on_oops) { kernelOops = addKernelFuncEventOrPanic( "oops_exit", "Kernel oops in guest", dmesg_output); } else { @@ -360,7 +360,7 @@ DumpStats::process(ThreadContext *tc) } // namespace ArmISA ArmISA::FsLinux * -ArmFsLinuxParams::create() +ArmFsLinuxParams::create() const { - return new ArmISA::FsLinux(this); + return new ArmISA::FsLinux(*this); } diff --git a/src/arch/arm/linux/fs_workload.hh b/src/arch/arm/linux/fs_workload.hh index 6ab3c6c3d..8939b067b 100644 --- a/src/arch/arm/linux/fs_workload.hh +++ b/src/arch/arm/linux/fs_workload.hh @@ -85,10 +85,10 @@ class FsLinux : public ArmISA::FsWorkload public: /** Boilerplate params code */ typedef ArmFsLinuxParams Params; - const Params * + const Params & params() const { - return dynamic_cast(&_params); + return dynamic_cast(_params); } /** When enabled, dump stats/task info on context switches for @@ -105,7 +105,7 @@ class FsLinux : public ArmISA::FsWorkload * mappings between taskIds and OS process IDs */ OutputStream *taskFile = nullptr; - FsLinux(Params *p); + FsLinux(const Params &p); ~FsLinux(); void initState() override; diff --git a/src/arch/arm/linux/process.cc b/src/arch/arm/linux/process.cc index c19016722..7110ee0b1 100644 --- a/src/arch/arm/linux/process.cc +++ b/src/arch/arm/linux/process.cc @@ -64,7 +64,7 @@ class ArmLinuxObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { auto arch = obj_file->getArch(); auto opsys = obj_file->getOpSys(); @@ -845,12 +845,12 @@ static SyscallDescTable privSyscallDescs64 = { { 0x1005, "set_tls", setTLSFunc64 } }; -ArmLinuxProcess32::ArmLinuxProcess32(ProcessParams * params, +ArmLinuxProcess32::ArmLinuxProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : ArmProcess32(params, objFile, _arch) {} -ArmLinuxProcess64::ArmLinuxProcess64(ProcessParams * params, +ArmLinuxProcess64::ArmLinuxProcess64(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : ArmProcess64(params, objFile, _arch) {} diff --git a/src/arch/arm/linux/process.hh b/src/arch/arm/linux/process.hh index 21c2a293c..57af06cc9 100644 --- a/src/arch/arm/linux/process.hh +++ b/src/arch/arm/linux/process.hh @@ -77,8 +77,8 @@ struct Result(_params); + return dynamic_cast(_params); } - ArmNativeTrace(const Params *p) : - NativeTrace(p), stopOnPCError(p->stop_on_pc_error) + ArmNativeTrace(const Params &p) : + NativeTrace(p), stopOnPCError(p.stop_on_pc_error) {} void check(NativeTraceRecord *record); diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc index 97c66d2e2..17764e022 100644 --- a/src/arch/arm/pmu.cc +++ b/src/arch/arm/pmu.cc @@ -51,15 +51,15 @@ namespace ArmISA { const RegVal PMU::reg_pmcr_wr_mask = 0x39; -PMU::PMU(const ArmPMUParams *p) +PMU::PMU(const ArmPMUParams &p) : SimObject(p), BaseISADevice(), reg_pmcnten(0), reg_pmcr(0), reg_pmselr(0), reg_pminten(0), reg_pmovsr(0), reg_pmceid0(0),reg_pmceid1(0), clock_remainder(0), - maximumCounterCount(p->eventCounters), + maximumCounterCount(p.eventCounters), cycleCounter(*this, maximumCounterCount), - cycleCounterEventId(p->cycleEventId), + cycleCounterEventId(p.cycleEventId), swIncrementEvent(nullptr), reg_pmcr_conf(0), interrupt(nullptr) @@ -71,13 +71,13 @@ PMU::PMU(const ArmPMUParams *p) maximumCounterCount); } - warn_if(!p->interrupt, "ARM PMU: No interrupt specified, interrupt " \ + warn_if(!p.interrupt, "ARM PMU: No interrupt specified, interrupt " \ "delivery disabled.\n"); /* Setup the performance counter ID registers */ reg_pmcr_conf.imp = 0x41; // ARM Ltd. reg_pmcr_conf.idcode = 0x00; - reg_pmcr_conf.n = p->eventCounters; + reg_pmcr_conf.n = p.eventCounters; // Setup the hard-coded cycle counter, which is equivalent to // architected counter event type 0x11. @@ -92,10 +92,10 @@ void PMU::setThreadContext(ThreadContext *tc) { DPRINTF(PMUVerbose, "Assigning PMU to ContextID %i.\n", tc->contextId()); - auto pmu_params = static_cast(params()); + const auto &pmu_params = static_cast(params()); - if (pmu_params->interrupt) - interrupt = pmu_params->interrupt->get(tc); + if (pmu_params.interrupt) + interrupt = pmu_params.interrupt->get(tc); } void @@ -809,7 +809,7 @@ PMU::SWIncrementEvent::write(uint64_t val) } // namespace ArmISA ArmISA::PMU * -ArmPMUParams::create() +ArmPMUParams::create() const { - return new ArmISA::PMU(this); + return new ArmISA::PMU(*this); } diff --git a/src/arch/arm/pmu.hh b/src/arch/arm/pmu.hh index 18fc57962..3cdcf1c0d 100644 --- a/src/arch/arm/pmu.hh +++ b/src/arch/arm/pmu.hh @@ -93,7 +93,7 @@ namespace ArmISA { */ class PMU : public SimObject, public ArmISA::BaseISADevice { public: - PMU(const ArmPMUParams *p); + PMU(const ArmPMUParams &p); ~PMU(); void addEventProbe(unsigned int id, SimObject *obj, const char *name); diff --git a/src/arch/arm/process.cc b/src/arch/arm/process.cc index 1734066cc..2174ae698 100644 --- a/src/arch/arm/process.cc +++ b/src/arch/arm/process.cc @@ -58,17 +58,17 @@ using namespace std; using namespace ArmISA; -ArmProcess::ArmProcess(ProcessParams *params, ::Loader::ObjectFile *objFile, - ::Loader::Arch _arch) +ArmProcess::ArmProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : Process(params, - new EmulationPageTable(params->name, params->pid, PageBytes), + new EmulationPageTable(params.name, params.pid, PageBytes), objFile), arch(_arch) { - fatal_if(params->useArchPT, "Arch page tables not implemented."); + fatal_if(params.useArchPT, "Arch page tables not implemented."); } -ArmProcess32::ArmProcess32(ProcessParams *params, +ArmProcess32::ArmProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : ArmProcess(params, objFile, _arch) { @@ -84,7 +84,7 @@ ArmProcess32::ArmProcess32(ProcessParams *params, } ArmProcess64::ArmProcess64( - ProcessParams *params, ::Loader::ObjectFile *objFile, + const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch) : ArmProcess(params, objFile, _arch) { diff --git a/src/arch/arm/process.hh b/src/arch/arm/process.hh index d06945462..bb9f0dbed 100644 --- a/src/arch/arm/process.hh +++ b/src/arch/arm/process.hh @@ -54,7 +54,7 @@ class ArmProcess : public Process { protected: ::Loader::Arch arch; - ArmProcess(ProcessParams * params, ::Loader::ObjectFile *objFile, + ArmProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch); template void argsInit(int pageSize, ArmISA::IntRegIndex spIndex); @@ -74,7 +74,7 @@ class ArmProcess : public Process class ArmProcess32 : public ArmProcess { protected: - ArmProcess32(ProcessParams * params, ::Loader::ObjectFile *objFile, + ArmProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, ::Loader::Arch _arch); void initState() override; @@ -117,7 +117,7 @@ struct Argument ArmSemihosting::stdioMap{ {"stderr", ::stderr}, }; -ArmSemihosting::ArmSemihosting(const ArmSemihostingParams *p) +ArmSemihosting::ArmSemihosting(const ArmSemihostingParams &p) : SimObject(p), - cmdLine(p->cmd_line), - memReserve(p->mem_reserve), - stackSize(p->stack_size), - timeBase([p]{ struct tm t = p->time; return mkutctime(&t); }()), + cmdLine(p.cmd_line), + memReserve(p.mem_reserve), + stackSize(p.stack_size), + timeBase([p]{ struct tm t = p.time; return mkutctime(&t); }()), tickShift(calcTickShift()), semiErrno(0), - filesRootDir(!p->files_root_dir.empty() && - p->files_root_dir.back() != '/' ? - p->files_root_dir + '/' : p->files_root_dir), - stdin(getSTDIO("stdin", p->stdin, "r")), - stdout(getSTDIO("stdout", p->stdout, "w")), - stderr(p->stderr == p->stdout ? - stdout : getSTDIO("stderr", p->stderr, "w")) + filesRootDir(!p.files_root_dir.empty() && + p.files_root_dir.back() != '/' ? + p.files_root_dir + '/' : p.files_root_dir), + stdin(getSTDIO("stdin", p.stdin, "r")), + stdout(getSTDIO("stdout", p.stdout, "w")), + stderr(p.stderr == p.stdout ? + stdout : getSTDIO("stderr", p.stderr, "w")) { // Create an empty place-holder file for position 0 as semi-hosting // calls typically expect non-zero file handles. @@ -1046,7 +1046,7 @@ operator << (std::ostream &os, const ArmSemihosting::InPlaceArg &ipa) ArmSemihosting * -ArmSemihostingParams::create() +ArmSemihostingParams::create() const { - return new ArmSemihosting(this); + return new ArmSemihosting(*this); } diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh index da0644fd8..fff969ffc 100644 --- a/src/arch/arm/semihosting.hh +++ b/src/arch/arm/semihosting.hh @@ -224,7 +224,7 @@ class ArmSemihosting : public SimObject SYS_GEM5_PSEUDO_OP = 0x100 }; - ArmSemihosting(const ArmSemihostingParams *p); + ArmSemihosting(const ArmSemihostingParams &p); /** Perform an Arm Semihosting call from aarch64 code. */ bool call64(ThreadContext *tc, bool gem5_ops); diff --git a/src/arch/arm/stage2_mmu.cc b/src/arch/arm/stage2_mmu.cc index 090c8c95f..2f3f81554 100644 --- a/src/arch/arm/stage2_mmu.cc +++ b/src/arch/arm/stage2_mmu.cc @@ -46,10 +46,10 @@ using namespace ArmISA; -Stage2MMU::Stage2MMU(const Params *p) - : SimObject(p), _stage1Tlb(p->tlb), _stage2Tlb(p->stage2_tlb), - port(_stage1Tlb->getTableWalker(), p->sys), - requestorId(p->sys->getRequestorId(_stage1Tlb->getTableWalker())) +Stage2MMU::Stage2MMU(const Params &p) + : SimObject(p), _stage1Tlb(p.tlb), _stage2Tlb(p.stage2_tlb), + port(_stage1Tlb->getTableWalker(), p.sys), + requestorId(p.sys->getRequestorId(_stage1Tlb->getTableWalker())) { // we use the stage-one table walker as the parent of the port, // and to get our requestor id, this is done to keep things @@ -142,7 +142,7 @@ Stage2MMU::Stage2Translation::finish(const Fault &_fault, } ArmISA::Stage2MMU * -ArmStage2MMUParams::create() +ArmStage2MMUParams::create() const { - return new ArmISA::Stage2MMU(this); + return new ArmISA::Stage2MMU(*this); } diff --git a/src/arch/arm/stage2_mmu.hh b/src/arch/arm/stage2_mmu.hh index ed9f59e1a..c416b15f6 100644 --- a/src/arch/arm/stage2_mmu.hh +++ b/src/arch/arm/stage2_mmu.hh @@ -102,7 +102,7 @@ class Stage2MMU : public SimObject }; typedef ArmStage2MMUParams Params; - Stage2MMU(const Params *p); + Stage2MMU(const Params &p); /** * Get the port that ultimately belongs to the stage-two MMU, but diff --git a/src/arch/arm/system.cc b/src/arch/arm/system.cc index 20ebee2df..d105fd44a 100644 --- a/src/arch/arm/system.cc +++ b/src/arch/arm/system.cc @@ -55,31 +55,31 @@ using namespace std; using namespace Linux; using namespace ArmISA; -ArmSystem::ArmSystem(Params *p) +ArmSystem::ArmSystem(const Params &p) : System(p), - _haveSecurity(p->have_security), - _haveLPAE(p->have_lpae), - _haveVirtualization(p->have_virtualization), - _haveCrypto(p->have_crypto), + _haveSecurity(p.have_security), + _haveLPAE(p.have_lpae), + _haveVirtualization(p.have_virtualization), + _haveCrypto(p.have_crypto), _genericTimer(nullptr), _gic(nullptr), _pwrCtrl(nullptr), - _highestELIs64(p->highest_el_is_64), - _physAddrRange64(p->phys_addr_range_64), - _haveLargeAsid64(p->have_large_asid_64), - _haveTME(p->have_tme), - _haveSVE(p->have_sve), - _sveVL(p->sve_vl), - _haveLSE(p->have_lse), - _havePAN(p->have_pan), - _haveSecEL2(p->have_secel2), - semihosting(p->semihosting), - multiProc(p->multi_proc) -{ - if (p->auto_reset_addr) { + _highestELIs64(p.highest_el_is_64), + _physAddrRange64(p.phys_addr_range_64), + _haveLargeAsid64(p.have_large_asid_64), + _haveTME(p.have_tme), + _haveSVE(p.have_sve), + _sveVL(p.sve_vl), + _haveLSE(p.have_lse), + _havePAN(p.have_pan), + _haveSecEL2(p.have_secel2), + semihosting(p.semihosting), + multiProc(p.multi_proc) +{ + if (p.auto_reset_addr) { _resetAddr = workload->getEntry(); } else { - _resetAddr = p->reset_addr; + _resetAddr = p.reset_addr; warn_if(workload->getEntry() != _resetAddr, "Workload entry point %#x and reset address %#x are different", workload->getEntry(), _resetAddr); @@ -236,7 +236,7 @@ ArmSystem::callClearWakeRequest(ThreadContext *tc) } ArmSystem * -ArmSystemParams::create() +ArmSystemParams::create() const { - return new ArmSystem(this); + return new ArmSystem(*this); } diff --git a/src/arch/arm/system.hh b/src/arch/arm/system.hh index 62dfe76e6..628f15ccd 100644 --- a/src/arch/arm/system.hh +++ b/src/arch/arm/system.hh @@ -146,13 +146,13 @@ class ArmSystem : public System static constexpr Addr PageShift = ArmISA::PageShift; typedef ArmSystemParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - ArmSystem(Params *p); + ArmSystem(const Params &p); /** true if this a multiprocessor system */ bool multiProc; diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc index 26e20b280..6e67dcd0b 100644 --- a/src/arch/arm/table_walker.cc +++ b/src/arch/arm/table_walker.cc @@ -53,12 +53,12 @@ using namespace ArmISA; -TableWalker::TableWalker(const Params *p) +TableWalker::TableWalker(const Params &p) : ClockedObject(p), stage2Mmu(NULL), port(NULL), requestorId(Request::invldRequestorId), - isStage2(p->is_stage2), tlb(NULL), + isStage2(p.is_stage2), tlb(NULL), currState(NULL), pending(false), - numSquashable(p->num_squash_per_cycle), + numSquashable(p.num_squash_per_cycle), stats(this), pendingReqs(0), pendingChangeTick(curTick()), @@ -76,7 +76,7 @@ TableWalker::TableWalker(const Params *p) // Cache system-level properties if (FullSystem) { - ArmSystem *armSys = dynamic_cast(p->sys); + ArmSystem *armSys = dynamic_cast(p.sys); assert(armSys); haveSecurity = armSys->haveSecurity(); _haveLPAE = armSys->haveLPAE(); @@ -178,7 +178,7 @@ TableWalker::drain() void TableWalker::drainResume() { - if (params()->sys->isTimingMode() && currState) { + if (params().sys->isTimingMode() && currState) { delete currState; currState = NULL; pendingChange(); @@ -2252,9 +2252,9 @@ TableWalker::insertTableEntry(DescriptorBase &descriptor, bool longDescriptor) } ArmISA::TableWalker * -ArmTableWalkerParams::create() +ArmTableWalkerParams::create() const { - return new ArmISA::TableWalker(this); + return new ArmISA::TableWalker(*this); } LookupLevel diff --git a/src/arch/arm/table_walker.hh b/src/arch/arm/table_walker.hh index 309c402af..dbb480e46 100644 --- a/src/arch/arm/table_walker.hh +++ b/src/arch/arm/table_walker.hh @@ -914,13 +914,13 @@ class TableWalker : public ClockedObject public: typedef ArmTableWalkerParams Params; - TableWalker(const Params *p); + TableWalker(const Params &p); virtual ~TableWalker(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void init() override; diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 700988e4b..0f9d7cde0 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -72,16 +72,16 @@ using namespace std; using namespace ArmISA; -TLB::TLB(const ArmTLBParams *p) - : BaseTLB(p), table(new TlbEntry[p->size]), size(p->size), - isStage2(p->is_stage2), stage2Req(false), stage2DescReq(false), _attr(0), - directToStage2(false), tableWalker(p->walker), stage2Tlb(NULL), +TLB::TLB(const ArmTLBParams &p) + : BaseTLB(p), table(new TlbEntry[p.size]), size(p.size), + isStage2(p.is_stage2), stage2Req(false), stage2DescReq(false), _attr(0), + directToStage2(false), tableWalker(p.walker), stage2Tlb(NULL), stage2Mmu(NULL), test(nullptr), stats(this), rangeMRU(1), aarch64(false), aarch64EL(EL0), isPriv(false), isSecure(false), isHyp(false), asid(0), vmid(0), hcr(0), dacr(0), miscRegValid(false), miscRegContext(0), curTranType(NormalTran) { - const ArmSystem *sys = dynamic_cast(p->sys); + const ArmSystem *sys = dynamic_cast(p.sys); tableWalker->setTlb(this); @@ -1641,7 +1641,7 @@ TLB::testWalk(Addr pa, Addr size, Addr va, bool is_secure, Mode mode, ArmISA::TLB * -ArmTLBParams::create() +ArmTLBParams::create() const { - return new ArmISA::TLB(this); + return new ArmISA::TLB(*this); } diff --git a/src/arch/arm/tlb.hh b/src/arch/arm/tlb.hh index e46d400a1..9576b20a1 100644 --- a/src/arch/arm/tlb.hh +++ b/src/arch/arm/tlb.hh @@ -195,8 +195,8 @@ class TLB : public BaseTLB int rangeMRU; //On lookup, only move entries ahead when outside rangeMRU public: - TLB(const ArmTLBParams *p); - TLB(const Params *p, int _size, TableWalker *_walker); + TLB(const ArmTLBParams &p); + TLB(const Params &p, int _size, TableWalker *_walker); /** Lookup an entry in the TLB * @param vpn virtual address @@ -439,10 +439,10 @@ protected: ArmTranslationType tranType = NormalTran); public: - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } inline void invalidateMiscReg() { miscRegValid = false; } diff --git a/src/arch/arm/tracers/tarmac_parser.cc b/src/arch/arm/tracers/tarmac_parser.cc index c7bf97703..dda3a884a 100644 --- a/src/arch/arm/tracers/tarmac_parser.cc +++ b/src/arch/arm/tracers/tarmac_parser.cc @@ -1365,7 +1365,7 @@ TarmacParserRecord::iSetStateToStr(ISetState isetstate) const } // namespace Trace Trace::TarmacParser * -TarmacParserParams::create() +TarmacParserParams::create() const { - return new Trace::TarmacParser(this); + return new Trace::TarmacParser(*this); } diff --git a/src/arch/arm/tracers/tarmac_parser.hh b/src/arch/arm/tracers/tarmac_parser.hh index ecfc6dee8..3486cb2fa 100644 --- a/src/arch/arm/tracers/tarmac_parser.hh +++ b/src/arch/arm/tracers/tarmac_parser.hh @@ -216,17 +216,17 @@ class TarmacParser : public InstTracer public: typedef TarmacParserParams Params; - TarmacParser(const Params *p) : InstTracer(p), startPc(p->start_pc), - exitOnDiff(p->exit_on_diff), - exitOnInsnDiff(p->exit_on_insn_diff), - memWrCheck(p->mem_wr_check), - ignoredAddrRange(p->ignore_mem_addr), - cpuId(p->cpu_id), + TarmacParser(const Params &p) : InstTracer(p), startPc(p.start_pc), + exitOnDiff(p.exit_on_diff), + exitOnInsnDiff(p.exit_on_insn_diff), + memWrCheck(p.mem_wr_check), + ignoredAddrRange(p.ignore_mem_addr), + cpuId(p.cpu_id), macroopInProgress(false) { assert(!(exitOnDiff && exitOnInsnDiff)); - trace.open(p->path_to_trace.c_str()); + trace.open(p.path_to_trace.c_str()); if (startPc == 0x0) { started = true; } else { diff --git a/src/arch/arm/tracers/tarmac_tracer.cc b/src/arch/arm/tracers/tarmac_tracer.cc index a3d4a1ecc..5d1b7120d 100644 --- a/src/arch/arm/tracers/tarmac_tracer.cc +++ b/src/arch/arm/tracers/tarmac_tracer.cc @@ -51,10 +51,10 @@ TarmacContext::tarmacCpuName() const return "cpu" + std::to_string(id); } -TarmacTracer::TarmacTracer(const Params *p) +TarmacTracer::TarmacTracer(const Params &p) : InstTracer(p), - startTick(p->start_tick), - endTick(p->end_tick) + startTick(p.start_tick), + endTick(p.end_tick) { // Wrong parameter setting: The trace end happens before the // trace start. @@ -95,7 +95,7 @@ TarmacTracer::getInstRecord(Tick when, ThreadContext *tc, } // namespace Trace Trace::TarmacTracer * -TarmacTracerParams::create() +TarmacTracerParams::create() const { - return new Trace::TarmacTracer(this); + return new Trace::TarmacTracer(*this); } diff --git a/src/arch/arm/tracers/tarmac_tracer.hh b/src/arch/arm/tracers/tarmac_tracer.hh index a51def5af..fb2d96d39 100644 --- a/src/arch/arm/tracers/tarmac_tracer.hh +++ b/src/arch/arm/tracers/tarmac_tracer.hh @@ -87,7 +87,7 @@ class TarmacTracer : public InstTracer public: typedef TarmacTracerParams Params; - TarmacTracer(const Params *p); + TarmacTracer(const Params &p); /** * Generates a TarmacTracerRecord, depending on the Tarmac version. diff --git a/src/arch/generic/interrupts.hh b/src/arch/generic/interrupts.hh index 51dd8f53d..c8e1d0c35 100644 --- a/src/arch/generic/interrupts.hh +++ b/src/arch/generic/interrupts.hh @@ -42,14 +42,14 @@ class BaseInterrupts : public SimObject public: typedef BaseInterruptsParams Params; - BaseInterrupts(Params *p) : SimObject(p) {} + BaseInterrupts(const Params &p) : SimObject(p) {} virtual void setThreadContext(ThreadContext *_tc) { tc = _tc; } - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /* diff --git a/src/arch/generic/mmu.hh b/src/arch/generic/mmu.hh index fd1eb2f71..8f7ea883f 100644 --- a/src/arch/generic/mmu.hh +++ b/src/arch/generic/mmu.hh @@ -47,8 +47,8 @@ class BaseMMU : public SimObject protected: typedef BaseMMUParams Params; - BaseMMU(const Params *p) - : SimObject(p), dtb(p->dtb), itb(p->itb) + BaseMMU(const Params &p) + : SimObject(p), dtb(p.dtb), itb(p.itb) {} public: diff --git a/src/arch/generic/tlb.hh b/src/arch/generic/tlb.hh index f144f695c..59b3a0104 100644 --- a/src/arch/generic/tlb.hh +++ b/src/arch/generic/tlb.hh @@ -50,7 +50,7 @@ class ThreadContext; class BaseTLB : public SimObject { protected: - BaseTLB(const Params *p) : SimObject(p) {} + BaseTLB(const Params &p) : SimObject(p) {} public: diff --git a/src/arch/mips/interrupts.cc b/src/arch/mips/interrupts.cc index dfc5f306b..7421f3fa1 100644 --- a/src/arch/mips/interrupts.cc +++ b/src/arch/mips/interrupts.cc @@ -186,7 +186,7 @@ Interrupts::interruptsPending() const } MipsISA::Interrupts * -MipsInterruptsParams::create() +MipsInterruptsParams::create() const { - return new MipsISA::Interrupts(this); + return new MipsISA::Interrupts(*this); } diff --git a/src/arch/mips/interrupts.hh b/src/arch/mips/interrupts.hh index f79a8dfa8..edde87727 100644 --- a/src/arch/mips/interrupts.hh +++ b/src/arch/mips/interrupts.hh @@ -49,13 +49,13 @@ class Interrupts : public BaseInterrupts public: typedef MipsInterruptsParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Interrupts(Params * p) : BaseInterrupts(p) {} + Interrupts(const Params &p) : BaseInterrupts(p) {} // post(int int_num, int index) is responsible // for posting an interrupt. It sets a bit diff --git a/src/arch/mips/isa.cc b/src/arch/mips/isa.cc index 5fbb6cf06..733ba0aa8 100644 --- a/src/arch/mips/isa.cc +++ b/src/arch/mips/isa.cc @@ -87,8 +87,8 @@ ISA::miscRegNames[NumMiscRegs] = "LLFlag" }; -ISA::ISA(Params *p) : BaseISA(p), numThreads(p->num_threads), - numVpes(p->num_vpes) +ISA::ISA(const Params &p) : BaseISA(p), numThreads(p.num_threads), + numVpes(p.num_vpes) { miscRegFile.resize(NumMiscRegs); bankType.resize(NumMiscRegs); @@ -140,10 +140,10 @@ ISA::ISA(Params *p) : BaseISA(p), numThreads(p->num_threads), clear(); } -const MipsISAParams * +const MipsISAParams & ISA::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void @@ -570,7 +570,7 @@ ISA::processCP0Event(BaseCPU *cpu, CP0EventType cp0EventType) } MipsISA::ISA * -MipsISAParams::create() +MipsISAParams::create() const { - return new MipsISA::ISA(this); + return new MipsISA::ISA(*this); } diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh index 301f573df..1b810466e 100644 --- a/src/arch/mips/isa.hh +++ b/src/arch/mips/isa.hh @@ -128,9 +128,9 @@ namespace MipsISA static std::string miscRegNames[NumMiscRegs]; public: - const Params *params() const; + const Params ¶ms() const; - ISA(Params *p); + ISA(const Params &p); RegId flattenRegId(const RegId& regId) const { return regId; } diff --git a/src/arch/mips/linux/process.cc b/src/arch/mips/linux/process.cc index 3bc88dfea..ad423173c 100644 --- a/src/arch/mips/linux/process.cc +++ b/src/arch/mips/linux/process.cc @@ -52,7 +52,7 @@ class MipsLinuxObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { if (obj_file->getArch() != ::Loader::Mips) return nullptr; @@ -470,7 +470,7 @@ SyscallDescTable MipsLinuxProcess::syscallDescs = { { 4319, "eventfd" } }; -MipsLinuxProcess::MipsLinuxProcess(ProcessParams * params, +MipsLinuxProcess::MipsLinuxProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : MipsProcess(params, objFile) {} diff --git a/src/arch/mips/linux/process.hh b/src/arch/mips/linux/process.hh index 981526ca9..04cbd169e 100644 --- a/src/arch/mips/linux/process.hh +++ b/src/arch/mips/linux/process.hh @@ -39,7 +39,8 @@ class MipsLinuxProcess : public MipsProcess { public: /// Constructor. - MipsLinuxProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + MipsLinuxProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); /// The target system's hostname. static const char *hostname; diff --git a/src/arch/mips/mmu.cc b/src/arch/mips/mmu.cc index ea405fa7b..a42685baf 100644 --- a/src/arch/mips/mmu.cc +++ b/src/arch/mips/mmu.cc @@ -38,7 +38,7 @@ #include "arch/mips/mmu.hh" MipsISA::MMU * -MipsMMUParams::create() +MipsMMUParams::create() const { - return new MipsISA::MMU(this); + return new MipsISA::MMU(*this); } diff --git a/src/arch/mips/mmu.hh b/src/arch/mips/mmu.hh index ea8369fd1..1ac15773c 100644 --- a/src/arch/mips/mmu.hh +++ b/src/arch/mips/mmu.hh @@ -47,7 +47,7 @@ namespace MipsISA { class MMU : public BaseMMU { public: - MMU(const MipsMMUParams *p) + MMU(const MipsMMUParams &p) : BaseMMU(p) {} }; diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index f8916af8b..f0f9a7bc9 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -45,12 +45,13 @@ using namespace std; using namespace MipsISA; -MipsProcess::MipsProcess(ProcessParams *params, ::Loader::ObjectFile *objFile) +MipsProcess::MipsProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile) : Process(params, - new EmulationPageTable(params->name, params->pid, PageBytes), + new EmulationPageTable(params.name, params.pid, PageBytes), objFile) { - fatal_if(params->useArchPT, "Arch page tables not implemented."); + fatal_if(params.useArchPT, "Arch page tables not implemented."); // Set up stack. On MIPS, stack starts at the top of kuseg // user address space. MIPS stack grows down from here Addr stack_base = 0x7FFFFFFF; diff --git a/src/arch/mips/process.hh b/src/arch/mips/process.hh index d236a8fff..578824c19 100644 --- a/src/arch/mips/process.hh +++ b/src/arch/mips/process.hh @@ -44,7 +44,7 @@ class ObjectFile; class MipsProcess : public Process { protected: - MipsProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + MipsProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile); void initState(); diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc index 931e09a5c..4dd0aa236 100644 --- a/src/arch/mips/tlb.cc +++ b/src/arch/mips/tlb.cc @@ -54,8 +54,7 @@ using namespace MipsISA; // MIPS TLB // -TLB::TLB(const Params *p) - : BaseTLB(p), size(p->size), nlu(0) +TLB::TLB(const Params &p) : BaseTLB(p), size(p.size), nlu(0) { table = new PTE[size]; memset(table, 0, sizeof(PTE[size])); @@ -259,7 +258,7 @@ TLB::index(bool advance) } MipsISA::TLB * -MipsTLBParams::create() +MipsTLBParams::create() const { - return new MipsISA::TLB(this); + return new MipsISA::TLB(*this); } diff --git a/src/arch/mips/tlb.hh b/src/arch/mips/tlb.hh index 2be2ddf71..99c7280dc 100644 --- a/src/arch/mips/tlb.hh +++ b/src/arch/mips/tlb.hh @@ -63,7 +63,7 @@ class TLB : public BaseTLB public: typedef MipsTLBParams Params; - TLB(const Params *p); + TLB(const Params &p); int probeEntry(Addr vpn,uint8_t) const; MipsISA::PTE *getEntry(unsigned) const; diff --git a/src/arch/power/interrupts.cc b/src/arch/power/interrupts.cc index edfb29501..3d3e3fa85 100644 --- a/src/arch/power/interrupts.cc +++ b/src/arch/power/interrupts.cc @@ -29,7 +29,7 @@ #include "arch/power/interrupts.hh" PowerISA::Interrupts * -PowerInterruptsParams::create() +PowerInterruptsParams::create() const { - return new PowerISA::Interrupts(this); + return new PowerISA::Interrupts(*this); } diff --git a/src/arch/power/interrupts.hh b/src/arch/power/interrupts.hh index 29e665cae..7ca791d27 100644 --- a/src/arch/power/interrupts.hh +++ b/src/arch/power/interrupts.hh @@ -43,13 +43,13 @@ class Interrupts : public BaseInterrupts public: typedef PowerInterruptsParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Interrupts(Params *p) : BaseInterrupts(p) {} + Interrupts(const Params &p) : BaseInterrupts(p) {} void post(int int_num, int index) diff --git a/src/arch/power/isa.cc b/src/arch/power/isa.cc index 87eb71674..06b3d9386 100644 --- a/src/arch/power/isa.cc +++ b/src/arch/power/isa.cc @@ -42,22 +42,22 @@ namespace PowerISA { -ISA::ISA(Params *p) : BaseISA(p) +ISA::ISA(const Params &p) : BaseISA(p) { clear(); } -const PowerISAParams * +const PowerISAParams & ISA::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } } PowerISA::ISA * -PowerISAParams::create() +PowerISAParams::create() const { - return new PowerISA::ISA(this); + return new PowerISA::ISA(*this); } diff --git a/src/arch/power/isa.hh b/src/arch/power/isa.hh index a0d4a4660..1fbbddfaa 100644 --- a/src/arch/power/isa.hh +++ b/src/arch/power/isa.hh @@ -128,9 +128,9 @@ class ISA : public BaseISA return reg; } - const Params *params() const; + const Params ¶ms() const; - ISA(Params *p); + ISA(const Params &p); }; } // namespace PowerISA diff --git a/src/arch/power/linux/process.cc b/src/arch/power/linux/process.cc index 633c3a76b..75fff8933 100644 --- a/src/arch/power/linux/process.cc +++ b/src/arch/power/linux/process.cc @@ -51,7 +51,7 @@ class PowerLinuxObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { if (obj_file->getArch() != ::Loader::Power) return nullptr; @@ -439,8 +439,8 @@ SyscallDescTable PowerLinuxProcess::syscallDescs = { { 346, "epoll_pwait" }, }; -PowerLinuxProcess::PowerLinuxProcess(ProcessParams * params, - ::Loader::ObjectFile *objFile) : +PowerLinuxProcess::PowerLinuxProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile) : PowerProcess(params, objFile) {} diff --git a/src/arch/power/linux/process.hh b/src/arch/power/linux/process.hh index 2c7883de8..eca3da1d5 100644 --- a/src/arch/power/linux/process.hh +++ b/src/arch/power/linux/process.hh @@ -38,7 +38,8 @@ class PowerLinuxProcess : public PowerProcess { public: - PowerLinuxProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + PowerLinuxProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); void initState() override; diff --git a/src/arch/power/mmu.cc b/src/arch/power/mmu.cc index cda2f299d..5aefcb325 100644 --- a/src/arch/power/mmu.cc +++ b/src/arch/power/mmu.cc @@ -38,7 +38,7 @@ #include "arch/power/mmu.hh" PowerISA::MMU * -PowerMMUParams::create() +PowerMMUParams::create() const { - return new PowerISA::MMU(this); + return new PowerISA::MMU(*this); } diff --git a/src/arch/power/mmu.hh b/src/arch/power/mmu.hh index 127299f4d..eb04f9858 100644 --- a/src/arch/power/mmu.hh +++ b/src/arch/power/mmu.hh @@ -47,7 +47,7 @@ namespace PowerISA { class MMU : public BaseMMU { public: - MMU(const PowerMMUParams *p) + MMU(const PowerMMUParams &p) : BaseMMU(p) {} }; diff --git a/src/arch/power/process.cc b/src/arch/power/process.cc index 19834e999..1b7f58fb3 100644 --- a/src/arch/power/process.cc +++ b/src/arch/power/process.cc @@ -47,12 +47,12 @@ using namespace std; using namespace PowerISA; PowerProcess::PowerProcess( - ProcessParams *params, ::Loader::ObjectFile *objFile) + const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : Process(params, - new EmulationPageTable(params->name, params->pid, PageBytes), + new EmulationPageTable(params.name, params.pid, PageBytes), objFile) { - fatal_if(params->useArchPT, "Arch page tables not implemented."); + fatal_if(params.useArchPT, "Arch page tables not implemented."); // Set up break point (Top of Heap) Addr brk_point = image.maxAddr(); brk_point = roundUp(brk_point, PageBytes); diff --git a/src/arch/power/process.hh b/src/arch/power/process.hh index 7e4018308..1d64176ac 100644 --- a/src/arch/power/process.hh +++ b/src/arch/power/process.hh @@ -45,7 +45,7 @@ class ObjectFile; class PowerProcess : public Process { protected: - PowerProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + PowerProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile); void initState() override; diff --git a/src/arch/power/tlb.cc b/src/arch/power/tlb.cc index 2726ca341..88f66e0a5 100644 --- a/src/arch/power/tlb.cc +++ b/src/arch/power/tlb.cc @@ -58,8 +58,7 @@ using namespace PowerISA; #define MODE2MASK(X) (1 << (X)) -TLB::TLB(const Params *p) - : BaseTLB(p), size(p->size), nlu(0) +TLB::TLB(const Params &p) : BaseTLB(p), size(p.size), nlu(0) { table = new PowerISA::PTE[size]; memset(table, 0, sizeof(PowerISA::PTE[size])); @@ -281,7 +280,7 @@ TLB::index(bool advance) } PowerISA::TLB * -PowerTLBParams::create() +PowerTLBParams::create() const { - return new PowerISA::TLB(this); + return new PowerISA::TLB(*this); } diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh index c119d9314..a9653e6c5 100644 --- a/src/arch/power/tlb.hh +++ b/src/arch/power/tlb.hh @@ -112,7 +112,7 @@ class TLB : public BaseTLB public: typedef PowerTLBParams Params; - TLB(const Params *p); + TLB(const Params &p); virtual ~TLB(); void takeOverFrom(BaseTLB *otlb) override {} diff --git a/src/arch/riscv/bare_metal/fs_workload.cc b/src/arch/riscv/bare_metal/fs_workload.cc index 9c90c6811..eb2120c51 100644 --- a/src/arch/riscv/bare_metal/fs_workload.cc +++ b/src/arch/riscv/bare_metal/fs_workload.cc @@ -36,10 +36,10 @@ namespace RiscvISA { -BareMetal::BareMetal(Params *p) : RiscvISA::FsWorkload(p), - bootloader(Loader::createObjectFile(p->bootloader)) +BareMetal::BareMetal(const Params &p) : RiscvISA::FsWorkload(p), + bootloader(Loader::createObjectFile(p.bootloader)) { - fatal_if(!bootloader, "Could not load bootloader file %s.", p->bootloader); + fatal_if(!bootloader, "Could not load bootloader file %s.", p.bootloader); _resetVect = bootloader->entryPoint(); bootloaderSymtab = bootloader->symtab(); } @@ -71,7 +71,7 @@ BareMetal::initState() } // namespace RiscvISA RiscvISA::BareMetal * -RiscvBareMetalParams::create() +RiscvBareMetalParams::create() const { - return new RiscvISA::BareMetal(this); + return new RiscvISA::BareMetal(*this); } diff --git a/src/arch/riscv/bare_metal/fs_workload.hh b/src/arch/riscv/bare_metal/fs_workload.hh index 45478782b..f4c62a156 100644 --- a/src/arch/riscv/bare_metal/fs_workload.hh +++ b/src/arch/riscv/bare_metal/fs_workload.hh @@ -43,7 +43,7 @@ class BareMetal : public RiscvISA::FsWorkload public: typedef RiscvBareMetalParams Params; - BareMetal(Params *p); + BareMetal(const Params &p); ~BareMetal(); void initState() override; diff --git a/src/arch/riscv/fs_workload.hh b/src/arch/riscv/fs_workload.hh index 0fbd7170d..0f18bb32a 100644 --- a/src/arch/riscv/fs_workload.hh +++ b/src/arch/riscv/fs_workload.hh @@ -46,8 +46,8 @@ class FsWorkload : public Workload Addr _resetVect; public: - FsWorkload(RiscvFsWorkloadParams *p) : Workload(p), - _isBareMetal(p->bare_metal), _resetVect(p->reset_vect) + FsWorkload(const RiscvFsWorkloadParams &p) : Workload(p), + _isBareMetal(p.bare_metal), _resetVect(p.reset_vect) {} // return reset vector diff --git a/src/arch/riscv/interrupts.cc b/src/arch/riscv/interrupts.cc index 4ad5cea63..2cc88f1ab 100644 --- a/src/arch/riscv/interrupts.cc +++ b/src/arch/riscv/interrupts.cc @@ -29,7 +29,7 @@ #include "arch/riscv/interrupts.hh" RiscvISA::Interrupts * -RiscvInterruptsParams::create() +RiscvInterruptsParams::create() const { - return new RiscvISA::Interrupts(this); + return new RiscvISA::Interrupts(*this); } diff --git a/src/arch/riscv/interrupts.hh b/src/arch/riscv/interrupts.hh index bf9f2a369..fba925e20 100644 --- a/src/arch/riscv/interrupts.hh +++ b/src/arch/riscv/interrupts.hh @@ -59,13 +59,13 @@ class Interrupts : public BaseInterrupts public: typedef RiscvInterruptsParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Interrupts(Params * p) : BaseInterrupts(p), ip(0), ie(0) {} + Interrupts(const Params &p) : BaseInterrupts(p), ip(0), ie(0) {} std::bitset globalMask() const diff --git a/src/arch/riscv/isa.cc b/src/arch/riscv/isa.cc index 2823618ec..080bf83a1 100644 --- a/src/arch/riscv/isa.cc +++ b/src/arch/riscv/isa.cc @@ -176,16 +176,16 @@ M5_VAR_USED const std::array MiscRegNames = {{ [MISCREG_FRM] = "FRM", }}; -ISA::ISA(Params *p) : BaseISA(p) +ISA::ISA(const Params &p) : BaseISA(p) { miscRegFile.resize(NumMiscRegs); clear(); } -const RiscvISAParams * +const RiscvISAParams & ISA::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void ISA::clear() @@ -413,7 +413,7 @@ ISA::unserialize(CheckpointIn &cp) } RiscvISA::ISA * -RiscvISAParams::create() +RiscvISAParams::create() const { - return new RiscvISA::ISA(this); + return new RiscvISA::ISA(*this); } diff --git a/src/arch/riscv/isa.hh b/src/arch/riscv/isa.hh index 1ece3bdf9..50ff73ede 100644 --- a/src/arch/riscv/isa.hh +++ b/src/arch/riscv/isa.hh @@ -98,9 +98,9 @@ class ISA : public BaseISA void serialize(CheckpointOut &cp) const; void unserialize(CheckpointIn &cp); - const Params *params() const; + const Params ¶ms() const; - ISA(Params *p); + ISA(const Params &p); }; } // namespace RiscvISA diff --git a/src/arch/riscv/linux/process.cc b/src/arch/riscv/linux/process.cc index 094097f16..5c0624de5 100644 --- a/src/arch/riscv/linux/process.cc +++ b/src/arch/riscv/linux/process.cc @@ -55,7 +55,7 @@ class RiscvLinuxObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { auto arch = obj_file->getArch(); auto opsys = obj_file->getOpSys(); @@ -776,7 +776,7 @@ SyscallDescTable { 2011, "getmainvars" } }; -RiscvLinuxProcess64::RiscvLinuxProcess64(ProcessParams * params, +RiscvLinuxProcess64::RiscvLinuxProcess64(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : RiscvProcess64(params, objFile) {} @@ -787,7 +787,7 @@ RiscvLinuxProcess64::syscall(ThreadContext *tc) syscallDescs.get(tc->readIntReg(SyscallNumReg))->doSyscall(tc); } -RiscvLinuxProcess32::RiscvLinuxProcess32(ProcessParams * params, +RiscvLinuxProcess32::RiscvLinuxProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : RiscvProcess32(params, objFile) {} diff --git a/src/arch/riscv/linux/process.hh b/src/arch/riscv/linux/process.hh index 8844273cd..dd9157cbd 100644 --- a/src/arch/riscv/linux/process.hh +++ b/src/arch/riscv/linux/process.hh @@ -42,7 +42,8 @@ class RiscvLinuxProcess64 : public RiscvProcess64 { public: /// Constructor. - RiscvLinuxProcess64(ProcessParams * params, ::Loader::ObjectFile *objFile); + RiscvLinuxProcess64(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); /// The target system's hostname. static const char *hostname; @@ -60,7 +61,8 @@ class RiscvLinuxProcess32 : public RiscvProcess32 { public: /// Constructor. - RiscvLinuxProcess32(ProcessParams * params, ::Loader::ObjectFile *objFile); + RiscvLinuxProcess32(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); /// The target system's hostname. static const char *hostname; diff --git a/src/arch/riscv/mmu.cc b/src/arch/riscv/mmu.cc index 6aba56035..a50f9bf88 100644 --- a/src/arch/riscv/mmu.cc +++ b/src/arch/riscv/mmu.cc @@ -38,7 +38,7 @@ #include "arch/riscv/mmu.hh" RiscvISA::MMU * -RiscvMMUParams::create() +RiscvMMUParams::create() const { - return new RiscvISA::MMU(this); + return new RiscvISA::MMU(*this); } diff --git a/src/arch/riscv/mmu.hh b/src/arch/riscv/mmu.hh index 361aa0870..d10ce137a 100644 --- a/src/arch/riscv/mmu.hh +++ b/src/arch/riscv/mmu.hh @@ -47,7 +47,7 @@ namespace RiscvISA { class MMU : public BaseMMU { public: - MMU(const RiscvMMUParams *p) + MMU(const RiscvMMUParams &p) : BaseMMU(p) {} }; diff --git a/src/arch/riscv/pagetable_walker.cc b/src/arch/riscv/pagetable_walker.cc index 3832ece46..98f13200a 100644 --- a/src/arch/riscv/pagetable_walker.cc +++ b/src/arch/riscv/pagetable_walker.cc @@ -581,7 +581,7 @@ Walker::WalkerState::pageFault(bool present) } /* end namespace RiscvISA */ RiscvISA::Walker * -RiscvPagetableWalkerParams::create() +RiscvPagetableWalkerParams::create() const { - return new RiscvISA::Walker(this); + return new RiscvISA::Walker(*this); } diff --git a/src/arch/riscv/pagetable_walker.hh b/src/arch/riscv/pagetable_walker.hh index de4d6353d..d4fe1ab5c 100644 --- a/src/arch/riscv/pagetable_walker.hh +++ b/src/arch/riscv/pagetable_walker.hh @@ -193,17 +193,17 @@ namespace RiscvISA typedef RiscvPagetableWalkerParams Params; - const Params * + const Params & params() const { - return static_cast(_params); + return static_cast(_params); } - Walker(const Params *params) : + Walker(const Params ¶ms) : ClockedObject(params), port(name() + ".port", this), - funcState(this, NULL, NULL, true), tlb(NULL), sys(params->system), + funcState(this, NULL, NULL, true), tlb(NULL), sys(params.system), requestorId(sys->getRequestorId(this)), - numSquashable(params->num_squash_per_cycle), + numSquashable(params.num_squash_per_cycle), startWalkWrapperEvent([this]{ startWalkWrapper(); }, name()) { } diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc index a17b5154a..3dd157a1c 100644 --- a/src/arch/riscv/process.cc +++ b/src/arch/riscv/process.cc @@ -57,16 +57,16 @@ using namespace std; using namespace RiscvISA; -RiscvProcess::RiscvProcess(ProcessParams *params, +RiscvProcess::RiscvProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : Process(params, - new EmulationPageTable(params->name, params->pid, PageBytes), + new EmulationPageTable(params.name, params.pid, PageBytes), objFile) { - fatal_if(params->useArchPT, "Arch page tables not implemented."); + fatal_if(params.useArchPT, "Arch page tables not implemented."); } -RiscvProcess64::RiscvProcess64(ProcessParams *params, +RiscvProcess64::RiscvProcess64(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : RiscvProcess(params, objFile) { @@ -79,7 +79,7 @@ RiscvProcess64::RiscvProcess64(ProcessParams *params, max_stack_size, next_thread_stack_base, mmap_end); } -RiscvProcess32::RiscvProcess32(ProcessParams *params, +RiscvProcess32::RiscvProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : RiscvProcess(params, objFile) { diff --git a/src/arch/riscv/process.hh b/src/arch/riscv/process.hh index 05cde41fe..03f106e66 100644 --- a/src/arch/riscv/process.hh +++ b/src/arch/riscv/process.hh @@ -47,7 +47,7 @@ class System; class RiscvProcess : public Process { protected: - RiscvProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + RiscvProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile); template void argsInit(int pageSize); @@ -88,14 +88,14 @@ struct Result class RiscvProcess64 : public RiscvProcess { protected: - RiscvProcess64(ProcessParams * params, ::Loader::ObjectFile *objFile); + RiscvProcess64(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile); void initState() override; }; class RiscvProcess32 : public RiscvProcess { protected: - RiscvProcess32(ProcessParams * params, ::Loader::ObjectFile *objFile); + RiscvProcess32(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile); void initState() override; }; diff --git a/src/arch/riscv/tlb.cc b/src/arch/riscv/tlb.cc index 34ccc0375..883a6ca51 100644 --- a/src/arch/riscv/tlb.cc +++ b/src/arch/riscv/tlb.cc @@ -65,15 +65,15 @@ buildKey(Addr vpn, uint16_t asid) return (static_cast(asid) << 48) | vpn; } -TLB::TLB(const Params *p) - : BaseTLB(p), size(p->size), tlb(size), lruSeq(0), stats(this) +TLB::TLB(const Params &p) + : BaseTLB(p), size(p.size), tlb(size), lruSeq(0), stats(this) { for (size_t x = 0; x < size; x++) { tlb[x].trieHandle = NULL; freeList.push_back(&tlb[x]); } - walker = p->walker; + walker = p.walker; walker->setTLB(this); } @@ -513,7 +513,7 @@ TLB::TlbStats::TlbStats(Stats::Group *parent) } RiscvISA::TLB * -RiscvTLBParams::create() +RiscvTLBParams::create() const { - return new TLB(this); + return new TLB(*this); } diff --git a/src/arch/riscv/tlb.hh b/src/arch/riscv/tlb.hh index a92bdd2c1..cb6059e17 100644 --- a/src/arch/riscv/tlb.hh +++ b/src/arch/riscv/tlb.hh @@ -83,7 +83,7 @@ class TLB : public BaseTLB public: typedef RiscvTLBParams Params; - TLB(const Params *p); + TLB(const Params &p); Walker *getWalker(); diff --git a/src/arch/sparc/fs_workload.cc b/src/arch/sparc/fs_workload.cc index b812f5967..fc842c2c3 100644 --- a/src/arch/sparc/fs_workload.cc +++ b/src/arch/sparc/fs_workload.cc @@ -52,7 +52,7 @@ FsWorkload::initState() } // namespace SparcISA SparcISA::FsWorkload * -SparcFsWorkloadParams::create() +SparcFsWorkloadParams::create() const { - return new SparcISA::FsWorkload(this); + return new SparcISA::FsWorkload(*this); } diff --git a/src/arch/sparc/fs_workload.hh b/src/arch/sparc/fs_workload.hh index 5a0548550..96fea4c50 100644 --- a/src/arch/sparc/fs_workload.hh +++ b/src/arch/sparc/fs_workload.hh @@ -42,7 +42,7 @@ class FsWorkload : public Workload Loader::SymbolTable defaultSymtab; public: - FsWorkload(SparcFsWorkloadParams *params) : Workload(params) {} + FsWorkload(const SparcFsWorkloadParams ¶ms) : Workload(params) {} void initState() override; Addr diff --git a/src/arch/sparc/interrupts.cc b/src/arch/sparc/interrupts.cc index bc843f73f..d957b4e1f 100644 --- a/src/arch/sparc/interrupts.cc +++ b/src/arch/sparc/interrupts.cc @@ -29,7 +29,7 @@ #include "arch/sparc/interrupts.hh" SparcISA::Interrupts * -SparcInterruptsParams::create() +SparcInterruptsParams::create() const { - return new SparcISA::Interrupts(this); + return new SparcISA::Interrupts(*this); } diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh index d32f5af4d..7e5dd9dce 100644 --- a/src/arch/sparc/interrupts.hh +++ b/src/arch/sparc/interrupts.hh @@ -63,13 +63,13 @@ class Interrupts : public BaseInterrupts typedef SparcInterruptsParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Interrupts(Params * p) : BaseInterrupts(p) + Interrupts(const Params &p) : BaseInterrupts(p) { clearAll(); } diff --git a/src/arch/sparc/isa.cc b/src/arch/sparc/isa.cc index 4f2805f32..c8ed63ee6 100644 --- a/src/arch/sparc/isa.cc +++ b/src/arch/sparc/isa.cc @@ -59,15 +59,15 @@ buildPstateMask() static const PSTATE PstateMask = buildPstateMask(); -ISA::ISA(Params *p) : BaseISA(p) +ISA::ISA(const Params &p) : BaseISA(p) { clear(); } -const SparcISAParams * +const SparcISAParams & ISA::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void @@ -761,7 +761,7 @@ ISA::unserialize(CheckpointIn &cp) } SparcISA::ISA * -SparcISAParams::create() +SparcISAParams::create() const { - return new SparcISA::ISA(this); + return new SparcISA::ISA(*this); } diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh index c92855b0b..288138413 100644 --- a/src/arch/sparc/isa.hh +++ b/src/arch/sparc/isa.hh @@ -217,9 +217,9 @@ class ISA : public BaseISA typedef SparcISAParams Params; - const Params *params() const; + const Params ¶ms() const; - ISA(Params *p); + ISA(const Params &p); }; } diff --git a/src/arch/sparc/linux/process.cc b/src/arch/sparc/linux/process.cc index ce051ba95..37205c765 100644 --- a/src/arch/sparc/linux/process.cc +++ b/src/arch/sparc/linux/process.cc @@ -48,7 +48,7 @@ class SparcLinuxObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { auto arch = obj_file->getArch(); auto opsys = obj_file->getOpSys(); @@ -75,7 +75,7 @@ SparcLinuxObjectFileLoader loader; } // anonymous namespace -Sparc32LinuxProcess::Sparc32LinuxProcess(ProcessParams * params, +Sparc32LinuxProcess::Sparc32LinuxProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : Sparc32Process(params, objFile) {} @@ -99,7 +99,7 @@ Sparc32LinuxProcess::handleTrap(int trapNum, ThreadContext *tc) } } -Sparc64LinuxProcess::Sparc64LinuxProcess(ProcessParams * params, +Sparc64LinuxProcess::Sparc64LinuxProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : Sparc64Process(params, objFile) {} diff --git a/src/arch/sparc/linux/process.hh b/src/arch/sparc/linux/process.hh index 0cea430c5..c1ade86d0 100644 --- a/src/arch/sparc/linux/process.hh +++ b/src/arch/sparc/linux/process.hh @@ -54,7 +54,8 @@ class Sparc32LinuxProcess : public SparcLinuxProcess, public Sparc32Process { public: /// Constructor. - Sparc32LinuxProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + Sparc32LinuxProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); void syscall(ThreadContext *tc) override; @@ -66,7 +67,8 @@ class Sparc64LinuxProcess : public SparcLinuxProcess, public Sparc64Process { public: /// Constructor. - Sparc64LinuxProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + Sparc64LinuxProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); void syscall(ThreadContext *tc) override; diff --git a/src/arch/sparc/mmu.cc b/src/arch/sparc/mmu.cc index 525d2acd3..e2da2f436 100644 --- a/src/arch/sparc/mmu.cc +++ b/src/arch/sparc/mmu.cc @@ -38,7 +38,7 @@ #include "arch/sparc/mmu.hh" SparcISA::MMU * -SparcMMUParams::create() +SparcMMUParams::create() const { - return new SparcISA::MMU(this); + return new SparcISA::MMU(*this); } diff --git a/src/arch/sparc/mmu.hh b/src/arch/sparc/mmu.hh index 915a61444..39f5008e4 100644 --- a/src/arch/sparc/mmu.hh +++ b/src/arch/sparc/mmu.hh @@ -47,7 +47,7 @@ namespace SparcISA { class MMU : public BaseMMU { public: - MMU(const SparcMMUParams *p) + MMU(const SparcMMUParams &p) : BaseMMU(p) {} }; diff --git a/src/arch/sparc/nativetrace.cc b/src/arch/sparc/nativetrace.cc index 6e9e206ed..7cd19c711 100644 --- a/src/arch/sparc/nativetrace.cc +++ b/src/arch/sparc/nativetrace.cc @@ -93,7 +93,7 @@ Trace::SparcNativeTrace::check(NativeTraceRecord *record) // ExeTracer Simulation Object // Trace::SparcNativeTrace * -SparcNativeTraceParams::create() +SparcNativeTraceParams::create() const { - return new Trace::SparcNativeTrace(this); + return new Trace::SparcNativeTrace(*this); }; diff --git a/src/arch/sparc/nativetrace.hh b/src/arch/sparc/nativetrace.hh index d1cec2240..26e5dfaa5 100644 --- a/src/arch/sparc/nativetrace.hh +++ b/src/arch/sparc/nativetrace.hh @@ -39,7 +39,7 @@ namespace Trace { class SparcNativeTrace : public NativeTrace { public: - SparcNativeTrace(const Params *p) : NativeTrace(p) + SparcNativeTrace(const Params &p) : NativeTrace(p) {} void check(NativeTraceRecord *record); diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc index 159f58237..8f3509f8a 100644 --- a/src/arch/sparc/process.cc +++ b/src/arch/sparc/process.cc @@ -52,14 +52,14 @@ const std::vector SparcProcess::SyscallABI::ArgumentRegs = { INTREG_O0, INTREG_O1, INTREG_O2, INTREG_O3, INTREG_O4, INTREG_O5 }; -SparcProcess::SparcProcess(ProcessParams *params, +SparcProcess::SparcProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, Addr _StackBias) : Process(params, - new EmulationPageTable(params->name, params->pid, PageBytes), + new EmulationPageTable(params.name, params.pid, PageBytes), objFile), StackBias(_StackBias) { - fatal_if(params->useArchPT, "Arch page tables not implemented."); + fatal_if(params.useArchPT, "Arch page tables not implemented."); // Initialize these to 0s fillStart = 0; spillStart = 0; diff --git a/src/arch/sparc/process.hh b/src/arch/sparc/process.hh index 68b607f14..85d7da81f 100644 --- a/src/arch/sparc/process.hh +++ b/src/arch/sparc/process.hh @@ -50,7 +50,7 @@ class SparcProcess : public Process // The locations of the fill and spill handlers Addr fillStart, spillStart; - SparcProcess(ProcessParams * params, ::Loader::ObjectFile *objFile, + SparcProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile, Addr _StackBias); void initState() override; @@ -117,7 +117,7 @@ class Sparc32Process : public SparcProcess { protected: - Sparc32Process(ProcessParams * params, ::Loader::ObjectFile *objFile) + Sparc32Process(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : SparcProcess(params, objFile, 0) { Addr brk_point = image.maxAddr(); @@ -182,7 +182,7 @@ class Sparc64Process : public SparcProcess { protected: - Sparc64Process(ProcessParams * params, ::Loader::ObjectFile *objFile) + Sparc64Process(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : SparcProcess(params, objFile, 2047) { Addr brk_point = image.maxAddr(); diff --git a/src/arch/sparc/solaris/process.cc b/src/arch/sparc/solaris/process.cc index 88fb1927f..442e984d8 100644 --- a/src/arch/sparc/solaris/process.cc +++ b/src/arch/sparc/solaris/process.cc @@ -48,7 +48,7 @@ class SparcSolarisObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { auto arch = obj_file->getArch(); auto opsys = obj_file->getOpSys(); @@ -344,7 +344,7 @@ SyscallDescTable { 255, "umount2" } }; -SparcSolarisProcess::SparcSolarisProcess(ProcessParams *params, +SparcSolarisProcess::SparcSolarisProcess(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : Sparc64Process(params, objFile) {} diff --git a/src/arch/sparc/solaris/process.hh b/src/arch/sparc/solaris/process.hh index 0c71d4a7d..bd1860d85 100644 --- a/src/arch/sparc/solaris/process.hh +++ b/src/arch/sparc/solaris/process.hh @@ -41,7 +41,8 @@ class SparcSolarisProcess : public Sparc64Process { public: /// Constructor. - SparcSolarisProcess(ProcessParams * params, ::Loader::ObjectFile *objFile); + SparcSolarisProcess(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); /// The target system's hostname. static const char *hostname; diff --git a/src/arch/sparc/tlb.cc b/src/arch/sparc/tlb.cc index fcb097345..20f316f21 100644 --- a/src/arch/sparc/tlb.cc +++ b/src/arch/sparc/tlb.cc @@ -52,8 +52,8 @@ * */ namespace SparcISA { -TLB::TLB(const Params *p) - : BaseTLB(p), size(p->size), usedEntries(0), lastReplaced(0), +TLB::TLB(const Params &p) + : BaseTLB(p), size(p.size), usedEntries(0), lastReplaced(0), cacheState(0), cacheValid(false) { // To make this work you'll have to change the hypervisor and OS @@ -1508,7 +1508,7 @@ TLB::unserialize(CheckpointIn &cp) } // namespace SparcISA SparcISA::TLB * -SparcTLBParams::create() +SparcTLBParams::create() const { - return new SparcISA::TLB(this); + return new SparcISA::TLB(*this); } diff --git a/src/arch/sparc/tlb.hh b/src/arch/sparc/tlb.hh index 15333abc4..929134308 100644 --- a/src/arch/sparc/tlb.hh +++ b/src/arch/sparc/tlb.hh @@ -154,7 +154,7 @@ class TLB : public BaseTLB public: typedef SparcTLBParams Params; - TLB(const Params *p); + TLB(const Params &p); void takeOverFrom(BaseTLB *otlb) override {} diff --git a/src/arch/x86/bios/acpi.cc b/src/arch/x86/bios/acpi.cc index 74abe05a8..c4fd27dd0 100644 --- a/src/arch/x86/bios/acpi.cc +++ b/src/arch/x86/bios/acpi.cc @@ -49,40 +49,40 @@ using namespace std; const char X86ISA::ACPI::RSDP::signature[] = "RSD PTR "; -X86ISA::ACPI::RSDP::RSDP(Params *p) : SimObject(p), oemID(p->oem_id), - revision(p->revision), rsdt(p->rsdt), xsdt(p->xsdt) +X86ISA::ACPI::RSDP::RSDP(const Params &p) : SimObject(p), oemID(p.oem_id), + revision(p.revision), rsdt(p.rsdt), xsdt(p.xsdt) {} -X86ISA::ACPI::SysDescTable::SysDescTable(Params *p, +X86ISA::ACPI::SysDescTable::SysDescTable(const Params &p, const char * _signature, uint8_t _revision) : SimObject(p), signature(_signature), revision(_revision), - oemID(p->oem_id), oemTableID(p->oem_table_id), - oemRevision(p->oem_revision), - creatorID(p->creator_id), creatorRevision(p->creator_revision) + oemID(p.oem_id), oemTableID(p.oem_table_id), + oemRevision(p.oem_revision), + creatorID(p.creator_id), creatorRevision(p.creator_revision) {} -X86ISA::ACPI::RSDT::RSDT(Params *p) : - SysDescTable(p, "RSDT", 1), entries(p->entries) +X86ISA::ACPI::RSDT::RSDT(const Params &p) : + SysDescTable(p, "RSDT", 1), entries(p.entries) {} -X86ISA::ACPI::XSDT::XSDT(Params *p) : - SysDescTable(p, "XSDT", 1), entries(p->entries) +X86ISA::ACPI::XSDT::XSDT(const Params &p) : + SysDescTable(p, "XSDT", 1), entries(p.entries) {} X86ISA::ACPI::RSDP * -X86ACPIRSDPParams::create() +X86ACPIRSDPParams::create() const { - return new X86ISA::ACPI::RSDP(this); + return new X86ISA::ACPI::RSDP(*this); } X86ISA::ACPI::RSDT * -X86ACPIRSDTParams::create() +X86ACPIRSDTParams::create() const { - return new X86ISA::ACPI::RSDT(this); + return new X86ISA::ACPI::RSDT(*this); } X86ISA::ACPI::XSDT * -X86ACPIXSDTParams::create() +X86ACPIXSDTParams::create() const { - return new X86ISA::ACPI::XSDT(this); + return new X86ISA::ACPI::XSDT(*this); } diff --git a/src/arch/x86/bios/acpi.hh b/src/arch/x86/bios/acpi.hh index ed09a7851..bc6e2cd19 100644 --- a/src/arch/x86/bios/acpi.hh +++ b/src/arch/x86/bios/acpi.hh @@ -76,7 +76,7 @@ class RSDP : public SimObject XSDT * xsdt; public: - RSDP(Params *p); + RSDP(const Params &p); }; class SysDescTable : public SimObject @@ -95,7 +95,7 @@ class SysDescTable : public SimObject uint32_t creatorRevision; public: - SysDescTable(Params *p, const char * _signature, uint8_t _revision); + SysDescTable(const Params &p, const char * _signature, uint8_t _revision); }; class RSDT : public SysDescTable @@ -106,7 +106,7 @@ class RSDT : public SysDescTable std::vector entries; public: - RSDT(Params *p); + RSDT(const Params &p); }; class XSDT : public SysDescTable @@ -117,7 +117,7 @@ class XSDT : public SysDescTable std::vector entries; public: - XSDT(Params *p); + XSDT(const Params &p); }; } // namespace ACPI diff --git a/src/arch/x86/bios/e820.cc b/src/arch/x86/bios/e820.cc index 44174f814..09cf3d1f6 100644 --- a/src/arch/x86/bios/e820.cc +++ b/src/arch/x86/bios/e820.cc @@ -72,13 +72,13 @@ void X86ISA::E820Table::writeTo(PortProxy& proxy, Addr countAddr, Addr addr) } E820Table * -X86E820TableParams::create() +X86E820TableParams::create() const { - return new E820Table(this); + return new E820Table(*this); } E820Entry * -X86E820EntryParams::create() +X86E820EntryParams::create() const { - return new E820Entry(this); + return new E820Entry(*this); } diff --git a/src/arch/x86/bios/e820.hh b/src/arch/x86/bios/e820.hh index 742e26eb9..0c59adfd2 100644 --- a/src/arch/x86/bios/e820.hh +++ b/src/arch/x86/bios/e820.hh @@ -58,8 +58,8 @@ namespace X86ISA public: typedef X86E820EntryParams Params; - E820Entry(Params *p) : - SimObject(p), addr(p->addr), size(p->size), type(p->range_type) + E820Entry(const Params &p) : + SimObject(p), addr(p.addr), size(p.size), type(p.range_type) {} }; @@ -70,7 +70,7 @@ namespace X86ISA public: typedef X86E820TableParams Params; - E820Table(Params *p) : SimObject(p), entries(p->entries) + E820Table(const Params &p) : SimObject(p), entries(p.entries) {} void writeTo(PortProxy& proxy, Addr countAddr, Addr addr); diff --git a/src/arch/x86/bios/intelmp.cc b/src/arch/x86/bios/intelmp.cc index 55088fd80..2050c27bd 100644 --- a/src/arch/x86/bios/intelmp.cc +++ b/src/arch/x86/bios/intelmp.cc @@ -145,15 +145,15 @@ X86ISA::IntelMP::FloatingPointer::writeOut(PortProxy& proxy, Addr addr) return 16; } -X86ISA::IntelMP::FloatingPointer::FloatingPointer(Params * p) : - SimObject(p), tableAddr(0), specRev(p->spec_rev), - defaultConfig(p->default_config), imcrPresent(p->imcr_present) +X86ISA::IntelMP::FloatingPointer::FloatingPointer(const Params &p) : + SimObject(p), tableAddr(0), specRev(p.spec_rev), + defaultConfig(p.default_config), imcrPresent(p.imcr_present) {} X86ISA::IntelMP::FloatingPointer * -X86IntelMPFloatingPointerParams::create() +X86IntelMPFloatingPointerParams::create() const { - return new X86ISA::IntelMP::FloatingPointer(this); + return new X86ISA::IntelMP::FloatingPointer(*this); } Addr @@ -165,7 +165,8 @@ X86ISA::IntelMP::BaseConfigEntry::writeOut(PortProxy& proxy, return 1; } -X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry(Params * p, uint8_t _type) : +X86ISA::IntelMP::BaseConfigEntry::BaseConfigEntry( + const Params &p, uint8_t _type) : SimObject(p), type(_type) {} @@ -180,7 +181,7 @@ X86ISA::IntelMP::ExtConfigEntry::writeOut(PortProxy& proxy, return 1; } -X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(Params * p, +X86ISA::IntelMP::ExtConfigEntry::ExtConfigEntry(const Params &p, uint8_t _type, uint8_t _length) : SimObject(p), type(_type), length(_length) {} @@ -245,17 +246,17 @@ X86ISA::IntelMP::ConfigTable::writeOut(PortProxy& proxy, Addr addr) return offset + extOffset; }; -X86ISA::IntelMP::ConfigTable::ConfigTable(Params * p) : SimObject(p), - specRev(p->spec_rev), oemID(p->oem_id), productID(p->product_id), - oemTableAddr(p->oem_table_addr), oemTableSize(p->oem_table_size), - localApic(p->local_apic), - baseEntries(p->base_entries), extEntries(p->ext_entries) +X86ISA::IntelMP::ConfigTable::ConfigTable(const Params &p) : SimObject(p), + specRev(p.spec_rev), oemID(p.oem_id), productID(p.product_id), + oemTableAddr(p.oem_table_addr), oemTableSize(p.oem_table_size), + localApic(p.local_apic), + baseEntries(p.base_entries), extEntries(p.ext_entries) {} X86ISA::IntelMP::ConfigTable * -X86IntelMPConfigTableParams::create() +X86IntelMPConfigTableParams::create() const { - return new X86ISA::IntelMP::ConfigTable(this); + return new X86ISA::IntelMP::ConfigTable(*this); } Addr @@ -275,24 +276,24 @@ X86ISA::IntelMP::Processor::writeOut( return 20; } -X86ISA::IntelMP::Processor::Processor(Params * p) : BaseConfigEntry(p, 0), - localApicID(p->local_apic_id), localApicVersion(p->local_apic_version), - cpuFlags(0), cpuSignature(0), featureFlags(p->feature_flags) +X86ISA::IntelMP::Processor::Processor(const Params &p) : BaseConfigEntry(p, 0), + localApicID(p.local_apic_id), localApicVersion(p.local_apic_version), + cpuFlags(0), cpuSignature(0), featureFlags(p.feature_flags) { - if (p->enable) + if (p.enable) cpuFlags |= (1 << 0); - if (p->bootstrap) + if (p.bootstrap) cpuFlags |= (1 << 1); - replaceBits(cpuSignature, 3, 0, p->stepping); - replaceBits(cpuSignature, 7, 4, p->model); - replaceBits(cpuSignature, 11, 8, p->family); + replaceBits(cpuSignature, 3, 0, p.stepping); + replaceBits(cpuSignature, 7, 4, p.model); + replaceBits(cpuSignature, 11, 8, p.family); } X86ISA::IntelMP::Processor * -X86IntelMPProcessorParams::create() +X86IntelMPProcessorParams::create() const { - return new X86ISA::IntelMP::Processor(this); + return new X86ISA::IntelMP::Processor(*this); } Addr @@ -305,14 +306,14 @@ X86ISA::IntelMP::Bus::writeOut( return 8; } -X86ISA::IntelMP::Bus::Bus(Params * p) : BaseConfigEntry(p, 1), - busID(p->bus_id), busType(p->bus_type) +X86ISA::IntelMP::Bus::Bus(const Params &p) : BaseConfigEntry(p, 1), + busID(p.bus_id), busType(p.bus_type) {} X86ISA::IntelMP::Bus * -X86IntelMPBusParams::create() +X86IntelMPBusParams::create() const { - return new X86ISA::IntelMP::Bus(this); + return new X86ISA::IntelMP::Bus(*this); } Addr @@ -327,17 +328,17 @@ X86ISA::IntelMP::IOAPIC::writeOut( return 8; } -X86ISA::IntelMP::IOAPIC::IOAPIC(Params * p) : BaseConfigEntry(p, 2), - id(p->id), version(p->version), flags(0), address(p->address) +X86ISA::IntelMP::IOAPIC::IOAPIC(const Params &p) : BaseConfigEntry(p, 2), + id(p.id), version(p.version), flags(0), address(p.address) { - if (p->enable) + if (p.enable) flags |= 1; } X86ISA::IntelMP::IOAPIC * -X86IntelMPIOAPICParams::create() +X86IntelMPIOAPICParams::create() const { - return new X86ISA::IntelMP::IOAPIC(this); + return new X86ISA::IntelMP::IOAPIC(*this); } Addr @@ -354,28 +355,28 @@ X86ISA::IntelMP::IntAssignment::writeOut( return 8; } -X86ISA::IntelMP::IOIntAssignment::IOIntAssignment(Params * p) : - IntAssignment(p, p->interrupt_type, p->polarity, p->trigger, 3, - p->source_bus_id, p->source_bus_irq, - p->dest_io_apic_id, p->dest_io_apic_intin) +X86ISA::IntelMP::IOIntAssignment::IOIntAssignment(const Params &p) : + IntAssignment(p, p.interrupt_type, p.polarity, p.trigger, 3, + p.source_bus_id, p.source_bus_irq, + p.dest_io_apic_id, p.dest_io_apic_intin) {} X86ISA::IntelMP::IOIntAssignment * -X86IntelMPIOIntAssignmentParams::create() +X86IntelMPIOIntAssignmentParams::create() const { - return new X86ISA::IntelMP::IOIntAssignment(this); + return new X86ISA::IntelMP::IOIntAssignment(*this); } -X86ISA::IntelMP::LocalIntAssignment::LocalIntAssignment(Params * p) : - IntAssignment(p, p->interrupt_type, p->polarity, p->trigger, 4, - p->source_bus_id, p->source_bus_irq, - p->dest_local_apic_id, p->dest_local_apic_intin) +X86ISA::IntelMP::LocalIntAssignment::LocalIntAssignment(const Params &p) : + IntAssignment(p, p.interrupt_type, p.polarity, p.trigger, 4, + p.source_bus_id, p.source_bus_irq, + p.dest_local_apic_id, p.dest_local_apic_intin) {} X86ISA::IntelMP::LocalIntAssignment * -X86IntelMPLocalIntAssignmentParams::create() +X86IntelMPLocalIntAssignmentParams::create() const { - return new X86ISA::IntelMP::LocalIntAssignment(this); + return new X86ISA::IntelMP::LocalIntAssignment(*this); } Addr @@ -390,16 +391,16 @@ X86ISA::IntelMP::AddrSpaceMapping::writeOut( return length; } -X86ISA::IntelMP::AddrSpaceMapping::AddrSpaceMapping(Params * p) : +X86ISA::IntelMP::AddrSpaceMapping::AddrSpaceMapping(const Params &p) : ExtConfigEntry(p, 128, 20), - busID(p->bus_id), addrType(p->address_type), - addr(p->address), addrLength(p->length) + busID(p.bus_id), addrType(p.address_type), + addr(p.address), addrLength(p.length) {} X86ISA::IntelMP::AddrSpaceMapping * -X86IntelMPAddrSpaceMappingParams::create() +X86IntelMPAddrSpaceMappingParams::create() const { - return new X86ISA::IntelMP::AddrSpaceMapping(this); + return new X86ISA::IntelMP::AddrSpaceMapping(*this); } Addr @@ -417,18 +418,18 @@ X86ISA::IntelMP::BusHierarchy::writeOut( return length; } -X86ISA::IntelMP::BusHierarchy::BusHierarchy(Params * p) : +X86ISA::IntelMP::BusHierarchy::BusHierarchy(const Params &p) : ExtConfigEntry(p, 129, 8), - busID(p->bus_id), info(0), parentBus(p->parent_bus) + busID(p.bus_id), info(0), parentBus(p.parent_bus) { - if (p->subtractive_decode) + if (p.subtractive_decode) info |= 1; } X86ISA::IntelMP::BusHierarchy * -X86IntelMPBusHierarchyParams::create() +X86IntelMPBusHierarchyParams::create() const { - return new X86ISA::IntelMP::BusHierarchy(this); + return new X86ISA::IntelMP::BusHierarchy(*this); } Addr @@ -442,16 +443,16 @@ X86ISA::IntelMP::CompatAddrSpaceMod::writeOut( return length; } -X86ISA::IntelMP::CompatAddrSpaceMod::CompatAddrSpaceMod(Params * p) : +X86ISA::IntelMP::CompatAddrSpaceMod::CompatAddrSpaceMod(const Params &p) : ExtConfigEntry(p, 130, 8), - busID(p->bus_id), mod(0), rangeList(p->range_list) + busID(p.bus_id), mod(0), rangeList(p.range_list) { - if (p->add) + if (p.add) mod |= 1; } X86ISA::IntelMP::CompatAddrSpaceMod * -X86IntelMPCompatAddrSpaceModParams::create() +X86IntelMPCompatAddrSpaceModParams::create() const { - return new X86ISA::IntelMP::CompatAddrSpaceMod(this); + return new X86ISA::IntelMP::CompatAddrSpaceMod(*this); } diff --git a/src/arch/x86/bios/intelmp.hh b/src/arch/x86/bios/intelmp.hh index 2ee400f4c..6e97047c3 100644 --- a/src/arch/x86/bios/intelmp.hh +++ b/src/arch/x86/bios/intelmp.hh @@ -109,7 +109,7 @@ class FloatingPointer : public SimObject tableAddr = addr; } - FloatingPointer(Params * p); + FloatingPointer(const Params &p); }; class BaseConfigEntry : public SimObject @@ -123,7 +123,7 @@ class BaseConfigEntry : public SimObject virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - BaseConfigEntry(Params * p, uint8_t _type); + BaseConfigEntry(const Params &p, uint8_t _type); }; class ExtConfigEntry : public SimObject @@ -138,7 +138,7 @@ class ExtConfigEntry : public SimObject virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length); + ExtConfigEntry(const Params &p, uint8_t _type, uint8_t _length); }; class ConfigTable : public SimObject @@ -161,7 +161,7 @@ class ConfigTable : public SimObject public: Addr writeOut(PortProxy& proxy, Addr addr); - ConfigTable(Params * p); + ConfigTable(const Params &p); }; class Processor : public BaseConfigEntry @@ -178,7 +178,7 @@ class Processor : public BaseConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - Processor(Params * p); + Processor(const Params &p); }; class Bus : public BaseConfigEntry @@ -192,7 +192,7 @@ class Bus : public BaseConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - Bus(Params * p); + Bus(const Params &p); }; class IOAPIC : public BaseConfigEntry @@ -208,7 +208,7 @@ class IOAPIC : public BaseConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - IOAPIC(Params * p); + IOAPIC(const Params &p); }; class IntAssignment : public BaseConfigEntry @@ -227,7 +227,7 @@ class IntAssignment : public BaseConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - IntAssignment(X86IntelMPBaseConfigEntryParams * p, + IntAssignment(const X86IntelMPBaseConfigEntryParams &p, Enums::X86IntelMPInterruptType _interruptType, Enums::X86IntelMPPolarity polarity, Enums::X86IntelMPTriggerMode trigger, @@ -250,7 +250,7 @@ class IOIntAssignment : public IntAssignment typedef X86IntelMPIOIntAssignmentParams Params; public: - IOIntAssignment(Params * p); + IOIntAssignment(const Params &p); }; class LocalIntAssignment : public IntAssignment @@ -259,7 +259,7 @@ class LocalIntAssignment : public IntAssignment typedef X86IntelMPLocalIntAssignmentParams Params; public: - LocalIntAssignment(Params * p); + LocalIntAssignment(const Params &p); }; class AddrSpaceMapping : public ExtConfigEntry @@ -275,7 +275,7 @@ class AddrSpaceMapping : public ExtConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - AddrSpaceMapping(Params * p); + AddrSpaceMapping(const Params &p); }; class BusHierarchy : public ExtConfigEntry @@ -290,7 +290,7 @@ class BusHierarchy : public ExtConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - BusHierarchy(Params * p); + BusHierarchy(const Params &p); }; class CompatAddrSpaceMod : public ExtConfigEntry @@ -305,7 +305,7 @@ class CompatAddrSpaceMod : public ExtConfigEntry public: Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum); - CompatAddrSpaceMod(Params * p); + CompatAddrSpaceMod(const Params &p); }; } //IntelMP diff --git a/src/arch/x86/bios/smbios.cc b/src/arch/x86/bios/smbios.cc index cd3d8e055..53897443b 100644 --- a/src/arch/x86/bios/smbios.cc +++ b/src/arch/x86/bios/smbios.cc @@ -86,7 +86,8 @@ X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy& proxy, Addr addr) return length + getStringLength(); } -X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) : +X86ISA::SMBios::SMBiosStructure::SMBiosStructure( + const Params &p, uint8_t _type) : SimObject(p), type(_type), handle(0), stringFields(false) {} @@ -127,14 +128,14 @@ X86ISA::SMBios::SMBiosStructure::getStringLength() } int -X86ISA::SMBios::SMBiosStructure::addString(string & newString) +X86ISA::SMBios::SMBiosStructure::addString(const string &new_string) { stringFields = true; // If a string is empty, treat it as not existing. The index for empty // strings is 0. - if (newString.length() == 0) + if (new_string.length() == 0) return 0; - strings.push_back(newString); + strings.push_back(new_string); return strings.size(); } @@ -146,27 +147,28 @@ X86ISA::SMBios::SMBiosStructure::readString(int n) } void -X86ISA::SMBios::SMBiosStructure::setString(int n, std::string & newString) +X86ISA::SMBios::SMBiosStructure::setString( + int n, const std::string &new_string) { assert(n > 0 && n <= strings.size()); - strings[n - 1] = newString; + strings[n - 1] = new_string; } -X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) : +X86ISA::SMBios::BiosInformation::BiosInformation(const Params &p) : SMBiosStructure(p, Type), - startingAddrSegment(p->starting_addr_segment), - romSize(p->rom_size), - majorVer(p->major), minorVer(p->minor), - embContFirmwareMajor(p->emb_cont_firmware_major), - embContFirmwareMinor(p->emb_cont_firmware_minor) + startingAddrSegment(p.starting_addr_segment), + romSize(p.rom_size), + majorVer(p.major), minorVer(p.minor), + embContFirmwareMajor(p.emb_cont_firmware_major), + embContFirmwareMinor(p.emb_cont_firmware_minor) { - vendor = addString(p->vendor); - version = addString(p->version); - releaseDate = addString(p->release_date); + vendor = addString(p.vendor); + version = addString(p.version); + releaseDate = addString(p.release_date); - characteristics = composeBitVector(p->characteristics); + characteristics = composeBitVector(p.characteristics); characteristicExtBytes = - composeBitVector(p->characteristic_ext_bytes); + composeBitVector(p.characteristic_ext_bytes); } uint16_t @@ -200,15 +202,15 @@ X86ISA::SMBios::BiosInformation::writeOut(PortProxy& proxy, Addr addr) return size; } -X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) : - SimObject(p), structures(p->structures) +X86ISA::SMBios::SMBiosTable::SMBiosTable(const Params &p) : + SimObject(p), structures(p.structures) { - smbiosHeader.majorVersion = p->major_version; - smbiosHeader.minorVersion = p->minor_version; - assert(p->major_version <= 9); - assert(p->minor_version <= 9); + smbiosHeader.majorVersion = p.major_version; + smbiosHeader.minorVersion = p.minor_version; + assert(p.major_version <= 9); + assert(p.minor_version <= 9); smbiosHeader.intermediateHeader.smbiosBCDRevision = - (p->major_version << 4) | p->minor_version; + (p.major_version << 4) | p.minor_version; } void @@ -322,13 +324,13 @@ X86ISA::SMBios::SMBiosTable::writeOut(PortProxy& proxy, Addr addr, } X86ISA::SMBios::BiosInformation * -X86SMBiosBiosInformationParams::create() +X86SMBiosBiosInformationParams::create() const { - return new X86ISA::SMBios::BiosInformation(this); + return new X86ISA::SMBios::BiosInformation(*this); } X86ISA::SMBios::SMBiosTable * -X86SMBiosSMBiosTableParams::create() +X86SMBiosSMBiosTableParams::create() const { - return new X86ISA::SMBios::SMBiosTable(this); + return new X86ISA::SMBios::SMBiosTable(*this); } diff --git a/src/arch/x86/bios/smbios.hh b/src/arch/x86/bios/smbios.hh index f8bc58dec..bb49e99e5 100644 --- a/src/arch/x86/bios/smbios.hh +++ b/src/arch/x86/bios/smbios.hh @@ -92,7 +92,7 @@ class SMBiosStructure : public SimObject protected: bool stringFields; - SMBiosStructure(Params * p, uint8_t _type); + SMBiosStructure(const Params &p, uint8_t _type); std::vector strings; @@ -102,9 +102,9 @@ class SMBiosStructure : public SimObject public: - int addString(std::string & newString); + int addString(const std::string &new_string); std::string readString(int n); - void setString(int n, std::string & newString); + void setString(int n, const std::string &new_string); }; class BiosInformation : public SMBiosStructure @@ -140,7 +140,7 @@ class BiosInformation : public SMBiosStructure // Offset 17h, 1 byte uint8_t embContFirmwareMinor; - BiosInformation(Params * p); + BiosInformation(const Params &p); uint8_t getLength() { return 0x18; } uint16_t writeOut(PortProxy& proxy, Addr addr); @@ -209,7 +209,7 @@ class SMBiosTable : public SimObject std::vector structures; public: - SMBiosTable(Params * p); + SMBiosTable(const Params &p); Addr getTableAddr() { diff --git a/src/arch/x86/fs_workload.cc b/src/arch/x86/fs_workload.cc index 44c01d779..b66ddfd13 100644 --- a/src/arch/x86/fs_workload.cc +++ b/src/arch/x86/fs_workload.cc @@ -50,11 +50,11 @@ namespace X86ISA { -FsWorkload::FsWorkload(Params *p) : KernelWorkload(*p), - smbiosTable(p->smbios_table), - mpFloatingPointer(p->intel_mp_pointer), - mpConfigTable(p->intel_mp_table), - rsdp(p->acpi_description_table_pointer) +FsWorkload::FsWorkload(const Params &p) : KernelWorkload(p), + smbiosTable(p.smbios_table), + mpFloatingPointer(p.intel_mp_pointer), + mpConfigTable(p.intel_mp_table), + rsdp(p.acpi_description_table_pointer) {} void @@ -367,7 +367,7 @@ FsWorkload::writeOutMPTable(Addr fp, Addr &fpSize, Addr &tableSize, Addr table) } // namespace X86ISA X86ISA::FsWorkload * -X86FsWorkloadParams::create() +X86FsWorkloadParams::create() const { - return new X86ISA::FsWorkload(this); + return new X86ISA::FsWorkload(*this); } diff --git a/src/arch/x86/fs_workload.hh b/src/arch/x86/fs_workload.hh index 7080feb40..ce1ca54e4 100644 --- a/src/arch/x86/fs_workload.hh +++ b/src/arch/x86/fs_workload.hh @@ -83,7 +83,7 @@ class FsWorkload : public KernelWorkload { public: typedef X86FsWorkloadParams Params; - FsWorkload(Params *p); + FsWorkload(const Params &p); public: void initState() override; @@ -101,7 +101,7 @@ class FsWorkload : public KernelWorkload void writeOutMPTable(Addr fp, Addr &fpSize, Addr &tableSize, Addr table=0); - const Params *params() const { return (const Params *)&_params; } + const Params ¶ms() const { return (const Params &)_params; } }; } // namespace X86ISA diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc index 7767c8034..10a642107 100644 --- a/src/arch/x86/interrupts.cc +++ b/src/arch/x86/interrupts.cc @@ -593,8 +593,8 @@ X86ISA::Interrupts::setReg(ApicRegIndex reg, uint32_t val) } -X86ISA::Interrupts::Interrupts(Params *p) - : BaseInterrupts(p), sys(p->system), clockDomain(*p->clk_domain), +X86ISA::Interrupts::Interrupts(const Params &p) + : BaseInterrupts(p), sys(p.system), clockDomain(*p.clk_domain), apicTimerEvent([this]{ processApicTimerEvent(); }, name()), pendingSmi(false), smiVector(0), pendingNmi(false), nmiVector(0), @@ -604,8 +604,8 @@ X86ISA::Interrupts::Interrupts(Params *p) startedUp(false), pendingUnmaskableInt(false), pendingIPIs(0), intResponsePort(name() + ".int_responder", this, this), - intRequestPort(name() + ".int_requestor", this, this, p->int_latency), - pioPort(this), pioDelay(p->pio_latency) + intRequestPort(name() + ".int_requestor", this, this, p.int_latency), + pioPort(this), pioDelay(p.pio_latency) { memset(regs, 0, sizeof(regs)); //Set the local apic DFR to the flat model. @@ -774,13 +774,14 @@ X86ISA::Interrupts::unserialize(CheckpointIn &cp) } X86ISA::Interrupts * -X86LocalApicParams::create() +X86LocalApicParams::create() const { - return new X86ISA::Interrupts(this); + return new X86ISA::Interrupts(*this); } void -X86ISA::Interrupts::processApicTimerEvent() { +X86ISA::Interrupts::processApicTimerEvent() +{ if (triggerTimerInterrupt()) setReg(APIC_INITIAL_COUNT, readReg(APIC_INITIAL_COUNT)); } diff --git a/src/arch/x86/interrupts.hh b/src/arch/x86/interrupts.hh index f078d421a..c18275943 100644 --- a/src/arch/x86/interrupts.hh +++ b/src/arch/x86/interrupts.hh @@ -194,10 +194,10 @@ class Interrupts : public BaseInterrupts void setThreadContext(ThreadContext *_tc) override; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /* @@ -254,7 +254,7 @@ class Interrupts : public BaseInterrupts * Constructor. */ - Interrupts(Params * p); + Interrupts(const Params &p); /* * Functions for retrieving interrupts for the CPU to handle. diff --git a/src/arch/x86/isa.cc b/src/arch/x86/isa.cc index a142bcf71..1b2504abc 100644 --- a/src/arch/x86/isa.cc +++ b/src/arch/x86/isa.cc @@ -130,15 +130,15 @@ ISA::clear() regVal[MISCREG_APIC_BASE] = lApicBase; } -ISA::ISA(Params *p) : BaseISA(p) +ISA::ISA(const Params &p) : BaseISA(p) { clear(); } -const X86ISAParams * +const X86ISAParams & ISA::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } RegVal @@ -440,7 +440,7 @@ ISA::setThreadContext(ThreadContext *_tc) } X86ISA::ISA * -X86ISAParams::create() +X86ISAParams::create() const { - return new X86ISA::ISA(this); + return new X86ISA::ISA(*this); } diff --git a/src/arch/x86/isa.hh b/src/arch/x86/isa.hh index 855c8e7b3..3df7cce92 100644 --- a/src/arch/x86/isa.hh +++ b/src/arch/x86/isa.hh @@ -59,8 +59,8 @@ namespace X86ISA typedef X86ISAParams Params; - ISA(Params *p); - const Params *params() const; + ISA(const Params &p); + const Params ¶ms() const; RegVal readMiscRegNoEffect(int miscReg) const; RegVal readMiscReg(int miscReg); diff --git a/src/arch/x86/linux/fs_workload.cc b/src/arch/x86/linux/fs_workload.cc index 0303cc800..c73e5b32e 100644 --- a/src/arch/x86/linux/fs_workload.cc +++ b/src/arch/x86/linux/fs_workload.cc @@ -49,7 +49,8 @@ namespace X86ISA { -FsLinux::FsLinux(Params *p) : X86ISA::FsWorkload(p), e820Table(p->e820_table) +FsLinux::FsLinux(const Params &p) : + X86ISA::FsWorkload(p), e820Table(p.e820_table) {} void @@ -129,7 +130,7 @@ FsLinux::initState() } // namespace X86ISA X86ISA::FsLinux * -X86FsLinuxParams::create() +X86FsLinuxParams::create() const { - return new X86ISA::FsLinux(this); + return new X86ISA::FsLinux(*this); } diff --git a/src/arch/x86/linux/fs_workload.hh b/src/arch/x86/linux/fs_workload.hh index 2eb4ed6e6..5601a833d 100644 --- a/src/arch/x86/linux/fs_workload.hh +++ b/src/arch/x86/linux/fs_workload.hh @@ -52,7 +52,7 @@ class FsLinux : public X86ISA::FsWorkload public: typedef X86FsLinuxParams Params; - FsLinux(Params *p); + FsLinux(const Params &p); void initState() override; }; diff --git a/src/arch/x86/linux/process.cc b/src/arch/x86/linux/process.cc index 68a9841f7..e95cf56df 100644 --- a/src/arch/x86/linux/process.cc +++ b/src/arch/x86/linux/process.cc @@ -60,7 +60,7 @@ class X86LinuxObjectFileLoader : public Process::Loader { public: Process * - load(ProcessParams *params, ::Loader::ObjectFile *obj_file) override + load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) override { auto arch = obj_file->getArch(); auto opsys = obj_file->getOpSys(); diff --git a/src/arch/x86/mmu.cc b/src/arch/x86/mmu.cc index efaf620d8..5a06b3d6d 100644 --- a/src/arch/x86/mmu.cc +++ b/src/arch/x86/mmu.cc @@ -38,7 +38,7 @@ #include "arch/x86/mmu.hh" X86ISA::MMU * -X86MMUParams::create() +X86MMUParams::create() const { - return new X86ISA::MMU(this); + return new X86ISA::MMU(*this); } diff --git a/src/arch/x86/mmu.hh b/src/arch/x86/mmu.hh index 6f4ba8775..4f3411a19 100644 --- a/src/arch/x86/mmu.hh +++ b/src/arch/x86/mmu.hh @@ -47,7 +47,7 @@ namespace X86ISA { class MMU : public BaseMMU { public: - MMU(const X86MMUParams *p) + MMU(const X86MMUParams &p) : BaseMMU(p) {} }; diff --git a/src/arch/x86/nativetrace.cc b/src/arch/x86/nativetrace.cc index 185cf39af..f7277f9bc 100644 --- a/src/arch/x86/nativetrace.cc +++ b/src/arch/x86/nativetrace.cc @@ -94,8 +94,7 @@ X86NativeTrace::ThreadState::update(ThreadContext *tc) } -X86NativeTrace::X86NativeTrace(const Params *p) - : NativeTrace(p) +X86NativeTrace::X86NativeTrace(const Params &p) : NativeTrace(p) { checkRcx = true; checkR11 = true; @@ -193,7 +192,7 @@ X86NativeTrace::check(NativeTraceRecord *record) // ExeTracer Simulation Object // Trace::X86NativeTrace * -X86NativeTraceParams::create() +X86NativeTraceParams::create() const { - return new Trace::X86NativeTrace(this); + return new Trace::X86NativeTrace(*this); } diff --git a/src/arch/x86/nativetrace.hh b/src/arch/x86/nativetrace.hh index 80e4c9d28..b47a896b4 100644 --- a/src/arch/x86/nativetrace.hh +++ b/src/arch/x86/nativetrace.hh @@ -78,7 +78,7 @@ class X86NativeTrace : public NativeTrace bool checkXMM(int num, uint64_t mXmmBuf[], uint64_t nXmmBuf[]); public: - X86NativeTrace(const Params *p); + X86NativeTrace(const Params &p); void check(NativeTraceRecord *record); }; diff --git a/src/arch/x86/pagetable_walker.cc b/src/arch/x86/pagetable_walker.cc index f5b552133..943295a5f 100644 --- a/src/arch/x86/pagetable_walker.cc +++ b/src/arch/x86/pagetable_walker.cc @@ -738,7 +738,7 @@ Walker::WalkerState::pageFault(bool present) /* end namespace X86ISA */ } X86ISA::Walker * -X86PagetableWalkerParams::create() +X86PagetableWalkerParams::create() const { - return new X86ISA::Walker(this); + return new X86ISA::Walker(*this); } diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh index dba76c110..8981e1f2b 100644 --- a/src/arch/x86/pagetable_walker.hh +++ b/src/arch/x86/pagetable_walker.hh @@ -195,17 +195,17 @@ namespace X86ISA typedef X86PagetableWalkerParams Params; - const Params * + const Params & params() const { - return static_cast(_params); + return static_cast(_params); } - Walker(const Params *params) : + Walker(const Params ¶ms) : ClockedObject(params), port(name() + ".port", this), - funcState(this, NULL, NULL, true), tlb(NULL), sys(params->system), + funcState(this, NULL, NULL, true), tlb(NULL), sys(params.system), requestorId(sys->getRequestorId(this)), - numSquashable(params->num_squash_per_cycle), + numSquashable(params.num_squash_per_cycle), startWalkWrapperEvent([this]{ startWalkWrapper(); }, name()) { } diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc index 7718fdcaa..d4986c251 100644 --- a/src/arch/x86/process.cc +++ b/src/arch/x86/process.cc @@ -76,12 +76,13 @@ typedef MultiLevelPageTable, LongModePTE<29, 21>, LongModePTE<20, 12> > ArchPageTable; -X86Process::X86Process(ProcessParams *params, ::Loader::ObjectFile *objFile) : - Process(params, params->useArchPT ? +X86Process::X86Process(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile) : + Process(params, params.useArchPT ? static_cast( - new ArchPageTable(params->name, params->pid, - params->system, PageBytes)) : - new EmulationPageTable(params->name, params->pid, + new ArchPageTable(params.name, params.pid, + params.system, PageBytes)) : + new EmulationPageTable(params.name, params.pid, PageBytes), objFile) { @@ -95,7 +96,7 @@ void X86Process::clone(ThreadContext *old_tc, ThreadContext *new_tc, *process = *this; } -X86_64Process::X86_64Process(ProcessParams *params, +X86_64Process::X86_64Process(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : X86Process(params, objFile) { @@ -116,7 +117,7 @@ X86_64Process::X86_64Process(ProcessParams *params, } -I386Process::I386Process(ProcessParams *params, +I386Process::I386Process(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile) : X86Process(params, objFile) { diff --git a/src/arch/x86/process.hh b/src/arch/x86/process.hh index 039e55a65..a55212f40 100644 --- a/src/arch/x86/process.hh +++ b/src/arch/x86/process.hh @@ -61,7 +61,7 @@ namespace X86ISA Addr _gdtStart; Addr _gdtSize; - X86Process(ProcessParams *params, ::Loader::ObjectFile *objFile); + X86Process(const ProcessParams ¶ms, ::Loader::ObjectFile *objFile); template void argsInit(int pageSize, @@ -118,7 +118,8 @@ namespace X86ISA VSyscallPage vsyscallPage; public: - X86_64Process(ProcessParams *params, ::Loader::ObjectFile *objFile); + X86_64Process(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); void argsInit(int pageSize); void initState() override; @@ -155,7 +156,8 @@ namespace X86ISA VSyscallPage vsyscallPage; public: - I386Process(ProcessParams *params, ::Loader::ObjectFile *objFile); + I386Process(const ProcessParams ¶ms, + ::Loader::ObjectFile *objFile); void argsInit(int pageSize); void initState() override; diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index 11ce66062..d336eb4ed 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -59,9 +59,9 @@ namespace X86ISA { -TLB::TLB(const Params *p) - : BaseTLB(p), configAddress(0), size(p->size), - tlb(size), lruSeq(0), m5opRange(p->system->m5opRange()), stats(this) +TLB::TLB(const Params &p) + : BaseTLB(p), configAddress(0), size(p.size), + tlb(size), lruSeq(0), m5opRange(p.system->m5opRange()), stats(this) { if (!size) fatal("TLBs must have a non-zero size.\n"); @@ -71,7 +71,7 @@ TLB::TLB(const Params *p) freeList.push_back(&tlb[x]); } - walker = p->walker; + walker = p.walker; walker->setTLB(this); } @@ -573,7 +573,7 @@ TLB::getTableWalkerPort() } // namespace X86ISA X86ISA::TLB * -X86TLBParams::create() +X86TLBParams::create() const { - return new X86ISA::TLB(this); + return new X86ISA::TLB(*this); } diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 671b16518..1741f5b02 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -66,7 +66,7 @@ namespace X86ISA public: typedef X86TLBParams Params; - TLB(const Params *p); + TLB(const Params &p); void takeOverFrom(BaseTLB *otlb) override {} diff --git a/src/base/filters/base.hh b/src/base/filters/base.hh index a85942496..3f4fac9ba 100644 --- a/src/base/filters/base.hh +++ b/src/base/filters/base.hh @@ -59,10 +59,10 @@ class Base : public SimObject /** * Create and clear the filter. */ - Base(const BloomFilterBaseParams* p) - : SimObject(p), offsetBits(p->offset_bits), - filter(p->size, SatCounter(p->num_bits)), - sizeBits(floorLog2(p->size)), setThreshold(p->threshold) + Base(const BloomFilterBaseParams &p) + : SimObject(p), offsetBits(p.offset_bits), + filter(p.size, SatCounter(p.num_bits)), + sizeBits(floorLog2(p.size)), setThreshold(p.threshold) { clear(); } diff --git a/src/base/filters/block_bloom_filter.cc b/src/base/filters/block_bloom_filter.cc index d7fa96a52..7f72c8105 100644 --- a/src/base/filters/block_bloom_filter.cc +++ b/src/base/filters/block_bloom_filter.cc @@ -35,9 +35,9 @@ namespace BloomFilter { -Block::Block(const BloomFilterBlockParams* p) - : Base(p), masksLSBs(p->masks_lsbs), - masksSizes(p->masks_sizes) +Block::Block(const BloomFilterBlockParams &p) + : Base(p), masksLSBs(p.masks_lsbs), + masksSizes(p.masks_sizes) { fatal_if(masksLSBs.size() != masksSizes.size(), "Masks haven't been properly provided"); @@ -92,8 +92,8 @@ Block::hash(Addr addr) const } // namespace BloomFilter BloomFilter::Block* -BloomFilterBlockParams::create() +BloomFilterBlockParams::create() const { - return new BloomFilter::Block(this); + return new BloomFilter::Block(*this); } diff --git a/src/base/filters/block_bloom_filter.hh b/src/base/filters/block_bloom_filter.hh index 33ef83a14..729291424 100644 --- a/src/base/filters/block_bloom_filter.hh +++ b/src/base/filters/block_bloom_filter.hh @@ -45,7 +45,7 @@ namespace BloomFilter { class Block : public Base { public: - Block(const BloomFilterBlockParams* p); + Block(const BloomFilterBlockParams &p); ~Block(); void set(Addr addr) override; diff --git a/src/base/filters/bulk_bloom_filter.cc b/src/base/filters/bulk_bloom_filter.cc index 5dc1c4942..0579b3dd7 100644 --- a/src/base/filters/bulk_bloom_filter.cc +++ b/src/base/filters/bulk_bloom_filter.cc @@ -37,7 +37,7 @@ namespace BloomFilter { -Bulk::Bulk(const BloomFilterBulkParams* p) +Bulk::Bulk(const BloomFilterBulkParams &p) : MultiBitSel(p), sectorBits(floorLog2(parFilterSize)) { fatal_if((numHashes * sectorBits) > @@ -98,8 +98,8 @@ Bulk::permute(Addr addr) const } // namespace BloomFilter BloomFilter::Bulk* -BloomFilterBulkParams::create() +BloomFilterBulkParams::create() const { - return new BloomFilter::Bulk(this); + return new BloomFilter::Bulk(*this); } diff --git a/src/base/filters/bulk_bloom_filter.hh b/src/base/filters/bulk_bloom_filter.hh index 72b053c12..8cc054dde 100644 --- a/src/base/filters/bulk_bloom_filter.hh +++ b/src/base/filters/bulk_bloom_filter.hh @@ -44,7 +44,7 @@ namespace BloomFilter { class Bulk : public MultiBitSel { public: - Bulk(const BloomFilterBulkParams* p); + Bulk(const BloomFilterBulkParams &p); ~Bulk(); protected: diff --git a/src/base/filters/h3_bloom_filter.cc b/src/base/filters/h3_bloom_filter.cc index a98b99b99..902787310 100644 --- a/src/base/filters/h3_bloom_filter.cc +++ b/src/base/filters/h3_bloom_filter.cc @@ -359,7 +359,7 @@ static int H3Matrix[64][16] = { 394261773, 848616745, 15446017, 517723271, }, }; -H3::H3(const BloomFilterH3Params* p) +H3::H3(const BloomFilterH3Params &p) : MultiBitSel(p) { fatal_if(numHashes > 16, "There are only 16 H3 functions implemented."); @@ -392,8 +392,8 @@ H3::hash(Addr addr, int hash_number) const } // namespace BloomFilter BloomFilter::H3* -BloomFilterH3Params::create() +BloomFilterH3Params::create() const { - return new BloomFilter::H3(this); + return new BloomFilter::H3(*this); } diff --git a/src/base/filters/h3_bloom_filter.hh b/src/base/filters/h3_bloom_filter.hh index 0d007dd49..78b52eb44 100644 --- a/src/base/filters/h3_bloom_filter.hh +++ b/src/base/filters/h3_bloom_filter.hh @@ -43,7 +43,7 @@ namespace BloomFilter { class H3 : public MultiBitSel { public: - H3(const BloomFilterH3Params* p); + H3(const BloomFilterH3Params &p); ~H3(); protected: diff --git a/src/base/filters/multi_bit_sel_bloom_filter.cc b/src/base/filters/multi_bit_sel_bloom_filter.cc index cab7fd837..7bd308481 100644 --- a/src/base/filters/multi_bit_sel_bloom_filter.cc +++ b/src/base/filters/multi_bit_sel_bloom_filter.cc @@ -37,13 +37,13 @@ namespace BloomFilter { -MultiBitSel::MultiBitSel(const BloomFilterMultiBitSelParams* p) - : Base(p), numHashes(p->num_hashes), - parFilterSize(p->size / numHashes), - isParallel(p->is_parallel), skipBits(p->skip_bits) +MultiBitSel::MultiBitSel(const BloomFilterMultiBitSelParams &p) + : Base(p), numHashes(p.num_hashes), + parFilterSize(p.size / numHashes), + isParallel(p.is_parallel), skipBits(p.skip_bits) { - if (p->size % numHashes) { - fatal("Can't divide filter (%d) in %d equal portions", p->size, + if (p.size % numHashes) { + fatal("Can't divide filter (%d) in %d equal portions", p.size, numHashes); } } @@ -96,8 +96,8 @@ MultiBitSel::hash(Addr addr, int hash_number) const } // namespace BloomFilter BloomFilter::MultiBitSel* -BloomFilterMultiBitSelParams::create() +BloomFilterMultiBitSelParams::create() const { - return new BloomFilter::MultiBitSel(this); + return new BloomFilter::MultiBitSel(*this); } diff --git a/src/base/filters/multi_bit_sel_bloom_filter.hh b/src/base/filters/multi_bit_sel_bloom_filter.hh index f90049c60..0ba65dedb 100644 --- a/src/base/filters/multi_bit_sel_bloom_filter.hh +++ b/src/base/filters/multi_bit_sel_bloom_filter.hh @@ -43,7 +43,7 @@ namespace BloomFilter { class MultiBitSel : public Base { public: - MultiBitSel(const BloomFilterMultiBitSelParams* p); + MultiBitSel(const BloomFilterMultiBitSelParams &p); ~MultiBitSel(); void set(Addr addr) override; diff --git a/src/base/filters/multi_bloom_filter.cc b/src/base/filters/multi_bloom_filter.cc index ca467a739..04fba3ddc 100644 --- a/src/base/filters/multi_bloom_filter.cc +++ b/src/base/filters/multi_bloom_filter.cc @@ -34,8 +34,8 @@ namespace BloomFilter { -Multi::Multi(const BloomFilterMultiParams* p) - : Base(p), filters(p->filters) +Multi::Multi(const BloomFilterMultiParams &p) + : Base(p), filters(p.filters) { } @@ -112,8 +112,8 @@ Multi::getTotalCount() const } // namespace BloomFilter BloomFilter::Multi* -BloomFilterMultiParams::create() +BloomFilterMultiParams::create() const { - return new BloomFilter::Multi(this); + return new BloomFilter::Multi(*this); } diff --git a/src/base/filters/multi_bloom_filter.hh b/src/base/filters/multi_bloom_filter.hh index 99b1e2e8d..5f0255e7e 100644 --- a/src/base/filters/multi_bloom_filter.hh +++ b/src/base/filters/multi_bloom_filter.hh @@ -46,7 +46,7 @@ namespace BloomFilter { class Multi : public Base { public: - Multi(const BloomFilterMultiParams* p); + Multi(const BloomFilterMultiParams &p); ~Multi(); void clear() override; diff --git a/src/base/filters/perfect_bloom_filter.cc b/src/base/filters/perfect_bloom_filter.cc index 2a4951424..00ec92da7 100644 --- a/src/base/filters/perfect_bloom_filter.cc +++ b/src/base/filters/perfect_bloom_filter.cc @@ -32,7 +32,7 @@ namespace BloomFilter { -Perfect::Perfect(const BloomFilterPerfectParams* p) +Perfect::Perfect(const BloomFilterPerfectParams &p) : Base(p) { } @@ -81,8 +81,8 @@ Perfect::getTotalCount() const } // namespace BloomFilter BloomFilter::Perfect* -BloomFilterPerfectParams::create() +BloomFilterPerfectParams::create() const { - return new BloomFilter::Perfect(this); + return new BloomFilter::Perfect(*this); } diff --git a/src/base/filters/perfect_bloom_filter.hh b/src/base/filters/perfect_bloom_filter.hh index 864a68bc3..b37cefe9f 100644 --- a/src/base/filters/perfect_bloom_filter.hh +++ b/src/base/filters/perfect_bloom_filter.hh @@ -43,7 +43,7 @@ namespace BloomFilter { class Perfect : public Base { public: - Perfect(const BloomFilterPerfectParams* p); + Perfect(const BloomFilterPerfectParams &p); ~Perfect(); void clear() override; diff --git a/src/base/vnc/vncinput.cc b/src/base/vnc/vncinput.cc index ff9a6065d..34349ff5c 100644 --- a/src/base/vnc/vncinput.cc +++ b/src/base/vnc/vncinput.cc @@ -51,13 +51,13 @@ using namespace std; -VncInput::VncInput(const Params *p) +VncInput::VncInput(const Params &p) : SimObject(p), keyboard(NULL), mouse(NULL), fb(&FrameBuffer::dummy), _videoWidth(fb->width()), _videoHeight(fb->height()), - captureEnabled(p->frame_capture), + captureEnabled(p.frame_capture), captureCurrentFrame(0), captureLastHash(0), - imgFormat(p->img_format) + imgFormat(p.img_format) { if (captureEnabled) { // remove existing frame output directory if it exists, then create a @@ -136,7 +136,7 @@ VncInput::captureFrameBuffer() // create the VNC Replayer object VncInput * -VncInputParams::create() +VncInputParams::create() const { - return new VncInput(this); + return new VncInput(*this); } diff --git a/src/base/vnc/vncinput.hh b/src/base/vnc/vncinput.hh index 95c4aab23..e574b9b9a 100644 --- a/src/base/vnc/vncinput.hh +++ b/src/base/vnc/vncinput.hh @@ -152,7 +152,7 @@ class VncInput : public SimObject }; typedef VncInputParams Params; - VncInput(const Params *p); + VncInput(const Params &p); /** Set the address of the frame buffer we are going to show. * To avoid copying, just have the display controller diff --git a/src/base/vnc/vncserver.cc b/src/base/vnc/vncserver.cc index 2b3416205..e72b77146 100644 --- a/src/base/vnc/vncserver.cc +++ b/src/base/vnc/vncserver.cc @@ -115,13 +115,13 @@ VncServer::DataEvent::process(int revent) /** * VncServer */ -VncServer::VncServer(const Params *p) - : VncInput(p), listenEvent(NULL), dataEvent(NULL), number(p->number), +VncServer::VncServer(const Params &p) + : VncInput(p), listenEvent(NULL), dataEvent(NULL), number(p.number), dataFd(-1), sendUpdate(false), supportsRawEnc(false), supportsResizeEnc(false) { - if (p->port) - listen(p->port); + if (p.port) + listen(p.port); curState = WaitForProtocolVersion; @@ -139,7 +139,7 @@ VncServer::VncServer(const Params *p) pixelFormat.greenshift = pixelConverter.ch_g.offset; pixelFormat.blueshift = pixelConverter.ch_b.offset; - DPRINTF(VNC, "Vnc server created at port %d\n", p->port); + DPRINTF(VNC, "Vnc server created at port %d\n", p.port); } VncServer::~VncServer() @@ -732,8 +732,8 @@ VncServer::frameBufferResized() // create the VNC server object VncServer * -VncServerParams::create() +VncServerParams::create() const { - return new VncServer(this); + return new VncServer(*this); } diff --git a/src/base/vnc/vncserver.hh b/src/base/vnc/vncserver.hh index c639af974..be8158571 100644 --- a/src/base/vnc/vncserver.hh +++ b/src/base/vnc/vncserver.hh @@ -177,7 +177,7 @@ class VncServer : public VncInput public: typedef VncServerParams Params; - VncServer(const Params *p); + VncServer(const Params &p); ~VncServer(); // RFB diff --git a/src/cpu/base.cc b/src/cpu/base.cc index ef843d757..8c53f8c80 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -123,20 +123,20 @@ CPUProgressEvent::description() const return "CPU Progress"; } -BaseCPU::BaseCPU(Params *p, bool is_checker) - : ClockedObject(p), instCnt(0), _cpuId(p->cpu_id), _socketId(p->socket_id), - _instRequestorId(p->system->getRequestorId(this, "inst")), - _dataRequestorId(p->system->getRequestorId(this, "data")), +BaseCPU::BaseCPU(const Params &p, bool is_checker) + : ClockedObject(p), instCnt(0), _cpuId(p.cpu_id), _socketId(p.socket_id), + _instRequestorId(p.system->getRequestorId(this, "inst")), + _dataRequestorId(p.system->getRequestorId(this, "data")), _taskId(ContextSwitchTaskId::Unknown), _pid(invldPid), - _switchedOut(p->switched_out), _cacheLineSize(p->system->cacheLineSize()), - interrupts(p->interrupts), numThreads(p->numThreads), system(p->system), + _switchedOut(p.switched_out), _cacheLineSize(p.system->cacheLineSize()), + interrupts(p.interrupts), numThreads(p.numThreads), system(p.system), previousCycle(0), previousState(CPU_STATE_SLEEP), functionTraceStream(nullptr), currentFunctionStart(0), currentFunctionEnd(0), functionEntryTick(0), - addressMonitor(p->numThreads), - syscallRetryLatency(p->syscallRetryLatency), - pwrGatingLatency(p->pwr_gating_latency), - powerGatingOnIdle(p->power_gating_on_idle), + addressMonitor(p.numThreads), + syscallRetryLatency(p.syscallRetryLatency), + pwrGatingLatency(p.pwr_gating_latency), + powerGatingOnIdle(p.power_gating_on_idle), enterPwrGatingEvent([this]{ enterPwrGating(); }, name()) { // if Python did not provide a valid ID, do it here @@ -154,27 +154,27 @@ BaseCPU::BaseCPU(Params *p, bool is_checker) maxThreadsPerCPU = numThreads; functionTracingEnabled = false; - if (p->function_trace) { + if (p.function_trace) { const string fname = csprintf("ftrace.%s", name()); functionTraceStream = simout.findOrCreate(fname)->stream(); currentFunctionStart = currentFunctionEnd = 0; - functionEntryTick = p->function_trace_start; + functionEntryTick = p.function_trace_start; - if (p->function_trace_start == 0) { + if (p.function_trace_start == 0) { functionTracingEnabled = true; } else { Event *event = new EventFunctionWrapper( [this]{ enableFunctionTrace(); }, name(), true); - schedule(event, p->function_trace_start); + schedule(event, p.function_trace_start); } } - tracer = params()->tracer; + tracer = params().tracer; - if (params()->isa.size() != numThreads) { + if (params().isa.size() != numThreads) { fatal("Number of ISAs (%i) assigned to the CPU does not equal number " - "of threads (%i).\n", params()->isa.size(), numThreads); + "of threads (%i).\n", params().isa.size(), numThreads); } } @@ -271,23 +271,23 @@ BaseCPU::init() { // Set up instruction-count-based termination events, if any. This needs // to happen after threadContexts has been constructed. - if (params()->max_insts_any_thread != 0) { + if (params().max_insts_any_thread != 0) { const char *cause = "a thread reached the max instruction count"; for (ThreadID tid = 0; tid < numThreads; ++tid) - scheduleInstStop(tid, params()->max_insts_any_thread, cause); + scheduleInstStop(tid, params().max_insts_any_thread, cause); } // Set up instruction-count-based termination events for SimPoints // Typically, there are more than one action points. // Simulation.py is responsible to take the necessary actions upon // exitting the simulation loop. - if (!params()->simpoint_start_insts.empty()) { + if (!params().simpoint_start_insts.empty()) { const char *cause = "simpoint starting point found"; - for (size_t i = 0; i < params()->simpoint_start_insts.size(); ++i) - scheduleInstStop(0, params()->simpoint_start_insts[i], cause); + for (size_t i = 0; i < params().simpoint_start_insts.size(); ++i) + scheduleInstStop(0, params().simpoint_start_insts[i], cause); } - if (params()->max_insts_all_threads != 0) { + if (params().max_insts_all_threads != 0) { const char *cause = "all threads reached the max instruction count"; // allocate & initialize shared downcounter: each event will @@ -298,11 +298,11 @@ BaseCPU::init() for (ThreadID tid = 0; tid < numThreads; ++tid) { Event *event = new CountedExitEvent(cause, *counter); threadContexts[tid]->scheduleInstCountEvent( - event, params()->max_insts_all_threads); + event, params().max_insts_all_threads); } } - if (!params()->switched_out) { + if (!params().switched_out) { registerThreadContexts(); verifyMemoryMode(); @@ -312,8 +312,8 @@ BaseCPU::init() void BaseCPU::startup() { - if (params()->progress_interval) { - new CPUProgressEvent(this, params()->progress_interval); + if (params().progress_interval) { + new CPUProgressEvent(this, params().progress_interval); } if (_switchedOut) @@ -761,7 +761,7 @@ BaseCPU::traceFunctionsInternal(Addr pc) bool BaseCPU::waitForRemoteGDB() const { - return params()->wait_for_remote_gdb; + return params().wait_for_remote_gdb; } diff --git a/src/cpu/base.hh b/src/cpu/base.hh index 9cf4baa7b..ae656effc 100644 --- a/src/cpu/base.hh +++ b/src/cpu/base.hh @@ -310,9 +310,12 @@ class BaseCPU : public ClockedObject public: typedef BaseCPUParams Params; - const Params *params() const - { return reinterpret_cast(_params); } - BaseCPU(Params *params, bool is_checker = false); + const Params & + params() const + { + return reinterpret_cast(_params); + } + BaseCPU(const Params ¶ms, bool is_checker = false); virtual ~BaseCPU(); void init() override; diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index 8f558703c..45f7e6ef7 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -61,7 +61,7 @@ CheckerCPU::init() requestorId = systemPtr->getRequestorId(this); } -CheckerCPU::CheckerCPU(Params *p) +CheckerCPU::CheckerCPU(const Params &p) : BaseCPU(p, true), systemPtr(NULL), icachePort(NULL), dcachePort(NULL), tc(NULL), thread(NULL), unverifiedReq(nullptr), @@ -78,11 +78,11 @@ CheckerCPU::CheckerCPU(Params *p) changedPC = willChangePC = false; - exitOnError = p->exitOnError; - warnOnlyOnLoadError = p->warnOnlyOnLoadError; - itb = p->itb; - dtb = p->dtb; - workload = p->workload; + exitOnError = p.exitOnError; + warnOnlyOnLoadError = p.warnOnlyOnLoadError; + itb = p.itb; + dtb = p.dtb; + workload = p.workload; updateOnError = true; } @@ -94,16 +94,16 @@ CheckerCPU::~CheckerCPU() void CheckerCPU::setSystem(System *system) { - const Params *p(dynamic_cast(_params)); + const Params &p = dynamic_cast(_params); systemPtr = system; if (FullSystem) { - thread = new SimpleThread(this, 0, systemPtr, itb, dtb, p->isa[0]); + thread = new SimpleThread(this, 0, systemPtr, itb, dtb, p.isa[0]); } else { thread = new SimpleThread(this, 0, systemPtr, workload.size() ? workload[0] : NULL, - itb, dtb, p->isa[0]); + itb, dtb, p.isa[0]); } tc = thread->getTC(); diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh index 97203c28c..e9c1b7fee 100644 --- a/src/cpu/checker/cpu.hh +++ b/src/cpu/checker/cpu.hh @@ -94,7 +94,7 @@ class CheckerCPU : public BaseCPU, public ExecContext void init() override; typedef CheckerCPUParams Params; - CheckerCPU(Params *p); + CheckerCPU(const Params &p); virtual ~CheckerCPU(); void setSystem(System *system); @@ -653,7 +653,7 @@ class Checker : public CheckerCPU typedef typename Impl::DynInstPtr DynInstPtr; public: - Checker(Params *p) + Checker(const Params &p) : CheckerCPU(p), updateThisCycle(false), unverifiedInst(NULL) { } diff --git a/src/cpu/dummy_checker.cc b/src/cpu/dummy_checker.cc index 7654ace97..890bd3434 100644 --- a/src/cpu/dummy_checker.cc +++ b/src/cpu/dummy_checker.cc @@ -40,7 +40,7 @@ #include "params/DummyChecker.hh" DummyChecker * -DummyCheckerParams::create() +DummyCheckerParams::create() const { // The checker should check all instructions executed by the main // cpu and therefore any parameters for early exit don't make much @@ -48,5 +48,5 @@ DummyCheckerParams::create() fatal_if(max_insts_any_thread || max_insts_all_threads || progress_interval, "Invalid checker parameters"); - return new DummyChecker(this); + return new DummyChecker(*this); } diff --git a/src/cpu/dummy_checker.hh b/src/cpu/dummy_checker.hh index feef2e8d9..0a144995b 100644 --- a/src/cpu/dummy_checker.hh +++ b/src/cpu/dummy_checker.hh @@ -46,7 +46,7 @@ class DummyChecker : public CheckerCPU { public: - DummyChecker(Params *p) + DummyChecker(const Params &p) : CheckerCPU(p) { } }; diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc index 69ee5cc51..132a876bf 100644 --- a/src/cpu/exetrace.cc +++ b/src/cpu/exetrace.cc @@ -205,7 +205,7 @@ Trace::ExeTracerRecord::dump() // ExeTracer Simulation Object // Trace::ExeTracer * -ExeTracerParams::create() +ExeTracerParams::create() const { - return new Trace::ExeTracer(this); + return new Trace::ExeTracer(*this); } diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh index 03e0e4529..33ba45749 100644 --- a/src/cpu/exetrace.hh +++ b/src/cpu/exetrace.hh @@ -60,7 +60,7 @@ class ExeTracer : public InstTracer { public: typedef ExeTracerParams Params; - ExeTracer(const Params *params) : InstTracer(params) + ExeTracer(const Params ¶ms) : InstTracer(params) {} InstRecord * diff --git a/src/cpu/func_unit.cc b/src/cpu/func_unit.cc index c135ee580..087fcb7ce 100644 --- a/src/cpu/func_unit.cc +++ b/src/cpu/func_unit.cc @@ -117,16 +117,16 @@ FuncUnit::isPipelined(OpClass capability) // The operation-class description object // OpDesc * -OpDescParams::create() +OpDescParams::create() const { - return new OpDesc(this); + return new OpDesc(*this); } // // The FuDesc object // FUDesc * -FUDescParams::create() +FUDescParams::create() const { - return new FUDesc(this); + return new FUDesc(*this); } diff --git a/src/cpu/func_unit.hh b/src/cpu/func_unit.hh index 65c04cb8b..235a08c13 100644 --- a/src/cpu/func_unit.hh +++ b/src/cpu/func_unit.hh @@ -53,9 +53,9 @@ class OpDesc : public SimObject Cycles opLat; bool pipelined; - OpDesc(const OpDescParams *p) - : SimObject(p), opClass(p->opClass), opLat(p->opLat), - pipelined(p->pipelined) {}; + OpDesc(const OpDescParams &p) + : SimObject(p), opClass(p.opClass), opLat(p.opLat), + pipelined(p.pipelined) {}; }; class FUDesc : public SimObject @@ -64,8 +64,8 @@ class FUDesc : public SimObject std::vector opDescList; unsigned number; - FUDesc(const FUDescParams *p) - : SimObject(p), opDescList(p->opList), number(p->count) {}; + FUDesc(const FUDescParams &p) + : SimObject(p), opDescList(p.opList), number(p.count) {}; }; typedef std::vector::const_iterator OPDDiterator; diff --git a/src/cpu/inst_pb_trace.cc b/src/cpu/inst_pb_trace.cc index 7d7bbaa6d..1bfd21633 100644 --- a/src/cpu/inst_pb_trace.cc +++ b/src/cpu/inst_pb_trace.cc @@ -66,11 +66,11 @@ InstPBTraceRecord::dump() tracer.traceMem(staticInst, getAddr(), getSize(), getFlags()); } -InstPBTrace::InstPBTrace(const InstPBTraceParams *p) +InstPBTrace::InstPBTrace(const InstPBTraceParams &p) : InstTracer(p), buf(nullptr), bufSize(0), curMsg(nullptr) { // Create our output file - createTraceFile(p->file_name); + createTraceFile(p.file_name); } void @@ -177,8 +177,8 @@ InstPBTrace::traceMem(StaticInstPtr si, Addr a, Addr s, unsigned f) Trace::InstPBTrace* -InstPBTraceParams::create() +InstPBTraceParams::create() const { - return new Trace::InstPBTrace(this); + return new Trace::InstPBTrace(*this); } diff --git a/src/cpu/inst_pb_trace.hh b/src/cpu/inst_pb_trace.hh index b6dd843e4..bce9bf791 100644 --- a/src/cpu/inst_pb_trace.hh +++ b/src/cpu/inst_pb_trace.hh @@ -83,7 +83,7 @@ class InstPBTraceRecord : public InstRecord class InstPBTrace : public InstTracer { public: - InstPBTrace(const InstPBTraceParams *p); + InstPBTrace(const InstPBTraceParams &p); virtual ~InstPBTrace(); InstPBTraceRecord* getInstRecord(Tick when, ThreadContext *tc, const diff --git a/src/cpu/inteltrace.cc b/src/cpu/inteltrace.cc index 4a410e1b7..805851f53 100644 --- a/src/cpu/inteltrace.cc +++ b/src/cpu/inteltrace.cc @@ -60,7 +60,7 @@ Trace::IntelTraceRecord::dump() // ExeTracer Simulation Object // Trace::IntelTrace * -IntelTraceParams::create() +IntelTraceParams::create() const { - return new Trace::IntelTrace(this); + return new Trace::IntelTrace(*this); } diff --git a/src/cpu/inteltrace.hh b/src/cpu/inteltrace.hh index ef268edd1..6b4fdb179 100644 --- a/src/cpu/inteltrace.hh +++ b/src/cpu/inteltrace.hh @@ -57,7 +57,7 @@ class IntelTrace : public InstTracer { public: - IntelTrace(const IntelTraceParams *p) : InstTracer(p) + IntelTrace(const IntelTraceParams &p) : InstTracer(p) {} IntelTraceRecord * diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc index 293b21143..b6a00ded6 100644 --- a/src/cpu/intr_control.cc +++ b/src/cpu/intr_control.cc @@ -39,8 +39,8 @@ using namespace std; -IntrControl::IntrControl(const Params *p) - : SimObject(p), sys(p->sys) +IntrControl::IntrControl(const Params &p) + : SimObject(p), sys(p.sys) {} void @@ -76,7 +76,7 @@ IntrControl::havePosted(int cpu_id) const } IntrControl * -IntrControlParams::create() +IntrControlParams::create() const { - return new IntrControl(this); + return new IntrControl(*this); } diff --git a/src/cpu/intr_control.hh b/src/cpu/intr_control.hh index a6f025ecb..fcb406cfd 100644 --- a/src/cpu/intr_control.hh +++ b/src/cpu/intr_control.hh @@ -41,7 +41,7 @@ class IntrControl : public SimObject public: System *sys; typedef IntrControlParams Params; - IntrControl(const Params *p); + IntrControl(const Params &p); void clear(int cpu_id, int int_num, int index); void post(int cpu_id, int int_num, int index); diff --git a/src/cpu/intr_control_noisa.cc b/src/cpu/intr_control_noisa.cc index 4190a0161..5180e4458 100644 --- a/src/cpu/intr_control_noisa.cc +++ b/src/cpu/intr_control_noisa.cc @@ -30,8 +30,8 @@ using namespace std; -IntrControl::IntrControl(const Params *p) - : SimObject(p), sys(p->sys) +IntrControl::IntrControl(const Params &p) + : SimObject(p), sys(p.sys) {} void @@ -45,7 +45,7 @@ IntrControl::clear(int cpu_id, int int_num, int index) } IntrControl * -IntrControlParams::create() +IntrControlParams::create() const { - return new IntrControl(this); + return new IntrControl(*this); } diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc index 83992cd3f..aecd6eecd 100644 --- a/src/cpu/kvm/base.cc +++ b/src/cpu/kvm/base.cc @@ -59,13 +59,13 @@ /* Used by some KVM macros */ #define PAGE_SIZE pageSize -BaseKvmCPU::BaseKvmCPU(BaseKvmCPUParams *params) +BaseKvmCPU::BaseKvmCPU(const BaseKvmCPUParams ¶ms) : BaseCPU(params), - vm(*params->system->getKvmVM()), + vm(*params.system->getKvmVM()), _status(Idle), dataPort(name() + ".dcache_port", this), instPort(name() + ".icache_port", this), - alwaysSyncTC(params->alwaysSyncTC), + alwaysSyncTC(params.alwaysSyncTC), threadContextDirty(true), kvmStateDirty(false), vcpuID(vm.allocVCPUID()), vcpuFD(-1), vcpuMMapSize(0), @@ -74,21 +74,22 @@ BaseKvmCPU::BaseKvmCPU(BaseKvmCPUParams *params) tickEvent([this]{ tick(); }, "BaseKvmCPU tick", false, Event::CPU_Tick_Pri), activeInstPeriod(0), - perfControlledByTimer(params->usePerfOverflow), - hostFactor(params->hostFactor), stats(this), + perfControlledByTimer(params.usePerfOverflow), + hostFactor(params.hostFactor), stats(this), ctrInsts(0) { if (pageSize == -1) panic("KVM: Failed to determine host page size (%i)\n", errno); - if (FullSystem) - thread = new SimpleThread(this, 0, params->system, params->itb, params->dtb, - params->isa[0]); - else - thread = new SimpleThread(this, /* thread_num */ 0, params->system, - params->workload[0], params->itb, - params->dtb, params->isa[0]); + if (FullSystem) { + thread = new SimpleThread(this, 0, params.system, params.itb, + params.dtb, params.isa[0]); + } else { + thread = new SimpleThread(this, /* thread_num */ 0, params.system, + params.workload[0], params.itb, + params.dtb, params.isa[0]); + } thread->setStatus(ThreadContext::Halted); tc = thread->getTC(); @@ -116,8 +117,8 @@ BaseKvmCPU::init() void BaseKvmCPU::startup() { - const BaseKvmCPUParams * const p( - dynamic_cast(params())); + const BaseKvmCPUParams &p = + dynamic_cast(params()); Kvm &kvm(*vm.kvm); @@ -133,7 +134,7 @@ BaseKvmCPU::startup() // point. Initialize virtual CPUs here instead. vcpuFD = vm.createVCPU(vcpuID); - // Map the KVM run structure */ + // Map the KVM run structure vcpuMMapSize = kvm.getVCPUMMapSize(); _kvmRun = (struct kvm_run *)mmap(0, vcpuMMapSize, PROT_READ | PROT_WRITE, MAP_SHARED, @@ -145,7 +146,7 @@ BaseKvmCPU::startup() // available. The offset into the KVM's communication page is // provided by the coalesced MMIO capability. int mmioOffset(kvm.capCoalescedMMIO()); - if (!p->useCoalescedMMIO) { + if (!p.useCoalescedMMIO) { inform("KVM: Coalesced MMIO disabled by config.\n"); } else if (mmioOffset) { inform("KVM: Coalesced IO available\n"); @@ -235,8 +236,8 @@ BaseKvmCPU::startupThread() // delivery for counters and timers from within the thread that // will execute the event queue to ensure that signals are // delivered to the right threads. - const BaseKvmCPUParams * const p( - dynamic_cast(params())); + const BaseKvmCPUParams &p = + dynamic_cast(params()); vcpuThread = pthread_self(); @@ -246,16 +247,16 @@ BaseKvmCPU::startupThread() setupCounters(); - if (p->usePerfOverflow) + if (p.usePerfOverflow) { runTimer.reset(new PerfKvmTimer(hwCycles, KVM_KICK_SIGNAL, - p->hostFactor, - p->hostFreq)); - else + p.hostFactor, + p.hostFreq)); + } else { runTimer.reset(new PosixKvmTimer(KVM_KICK_SIGNAL, CLOCK_MONOTONIC, - p->hostFactor, - p->hostFreq)); - + p.hostFactor, + p.hostFreq)); + } } BaseKvmCPU::StatGroup::StatGroup(Stats::Group *parent) diff --git a/src/cpu/kvm/base.hh b/src/cpu/kvm/base.hh index 73465af37..d97845b65 100644 --- a/src/cpu/kvm/base.hh +++ b/src/cpu/kvm/base.hh @@ -77,7 +77,7 @@ struct BaseKvmCPUParams; class BaseKvmCPU : public BaseCPU { public: - BaseKvmCPU(BaseKvmCPUParams *params); + BaseKvmCPU(const BaseKvmCPUParams ¶ms); virtual ~BaseKvmCPU(); void init() override; diff --git a/src/cpu/kvm/vm.cc b/src/cpu/kvm/vm.cc index 4640ca16f..1ad09e6a0 100644 --- a/src/cpu/kvm/vm.cc +++ b/src/cpu/kvm/vm.cc @@ -289,7 +289,7 @@ Kvm::createVM() } -KvmVM::KvmVM(KvmVMParams *params) +KvmVM::KvmVM(const KvmVMParams ¶ms) : SimObject(params), kvm(new Kvm()), system(nullptr), vmFD(kvm->createVM()), @@ -302,8 +302,8 @@ KvmVM::KvmVM(KvmVMParams *params) if (!maxMemorySlot) maxMemorySlot = 32; /* Setup the coalesced MMIO regions */ - for (int i = 0; i < params->coalescedMMIO.size(); ++i) - coalesceMMIO(params->coalescedMMIO[i]); + for (int i = 0; i < params.coalescedMMIO.size(); ++i) + coalesceMMIO(params.coalescedMMIO[i]); } KvmVM::~KvmVM() @@ -582,7 +582,7 @@ KvmVM::ioctl(int request, long p1) const KvmVM * -KvmVMParams::create() +KvmVMParams::create() const { static bool created = false; if (created) @@ -590,5 +590,5 @@ KvmVMParams::create() created = true; - return new KvmVM(this); + return new KvmVM(*this); } diff --git a/src/cpu/kvm/vm.hh b/src/cpu/kvm/vm.hh index e28145768..340e6f5c4 100644 --- a/src/cpu/kvm/vm.hh +++ b/src/cpu/kvm/vm.hh @@ -291,7 +291,7 @@ class KvmVM : public SimObject friend class BaseKvmCPU; public: - KvmVM(KvmVMParams *params); + KvmVM(const KvmVMParams ¶ms); virtual ~KvmVM(); void notifyFork(); diff --git a/src/cpu/kvm/x86_cpu.cc b/src/cpu/kvm/x86_cpu.cc index 1fda9a0f3..0d3aa26b0 100644 --- a/src/cpu/kvm/x86_cpu.cc +++ b/src/cpu/kvm/x86_cpu.cc @@ -520,9 +520,9 @@ checkSeg(const char *name, const int idx, const struct kvm_segment &seg, // TODO: Check CS DB } -X86KvmCPU::X86KvmCPU(X86KvmCPUParams *params) +X86KvmCPU::X86KvmCPU(const X86KvmCPUParams ¶ms) : BaseKvmCPU(params), - useXSave(params->useXSave) + useXSave(params.useXSave) { Kvm &kvm(*vm.kvm); @@ -1623,7 +1623,7 @@ X86KvmCPU::setVCpuEvents(const struct kvm_vcpu_events &events) } X86KvmCPU * -X86KvmCPUParams::create() +X86KvmCPUParams::create() const { - return new X86KvmCPU(this); + return new X86KvmCPU(*this); } diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh index 3fa6d8107..a60d5979c 100644 --- a/src/cpu/kvm/x86_cpu.hh +++ b/src/cpu/kvm/x86_cpu.hh @@ -39,7 +39,7 @@ class X86KvmCPU : public BaseKvmCPU { public: - X86KvmCPU(X86KvmCPUParams *params); + X86KvmCPU(const X86KvmCPUParams ¶ms); virtual ~X86KvmCPU(); void startup() override; diff --git a/src/cpu/minor/cpu.cc b/src/cpu/minor/cpu.cc index a375e07be..2bff55d95 100644 --- a/src/cpu/minor/cpu.cc +++ b/src/cpu/minor/cpu.cc @@ -45,22 +45,22 @@ #include "debug/MinorCPU.hh" #include "debug/Quiesce.hh" -MinorCPU::MinorCPU(MinorCPUParams *params) : +MinorCPU::MinorCPU(const MinorCPUParams ¶ms) : BaseCPU(params), - threadPolicy(params->threadPolicy) + threadPolicy(params.threadPolicy) { /* This is only written for one thread at the moment */ Minor::MinorThread *thread; for (ThreadID i = 0; i < numThreads; i++) { if (FullSystem) { - thread = new Minor::MinorThread(this, i, params->system, - params->itb, params->dtb, params->isa[i]); + thread = new Minor::MinorThread(this, i, params.system, + params.itb, params.dtb, params.isa[i]); thread->setStatus(ThreadContext::Halted); } else { - thread = new Minor::MinorThread(this, i, params->system, - params->workload[i], params->itb, params->dtb, - params->isa[i]); + thread = new Minor::MinorThread(this, i, params.system, + params.workload[i], params.itb, params.dtb, + params.isa[i]); } threads.push_back(thread); @@ -69,13 +69,13 @@ MinorCPU::MinorCPU(MinorCPUParams *params) : } - if (params->checker) { + if (params.checker) { fatal("The Minor model doesn't support checking (yet)\n"); } Minor::MinorDynInst::init(); - pipeline = new Minor::Pipeline(*this, *params); + pipeline = new Minor::Pipeline(*this, params); activityRecorder = pipeline->getActivityRecorder(); } @@ -93,7 +93,7 @@ MinorCPU::init() { BaseCPU::init(); - if (!params()->switched_out && + if (!params().switched_out && system->getMemoryMode() != Enums::timing) { fatal("The Minor CPU requires the memory system to be in " @@ -292,9 +292,9 @@ MinorCPU::wakeupOnEvent(unsigned int stage_id) } MinorCPU * -MinorCPUParams::create() +MinorCPUParams::create() const { - return new MinorCPU(this); + return new MinorCPU(*this); } Port & diff --git a/src/cpu/minor/cpu.hh b/src/cpu/minor/cpu.hh index 579a96b05..ac9831aee 100644 --- a/src/cpu/minor/cpu.hh +++ b/src/cpu/minor/cpu.hh @@ -118,7 +118,7 @@ class MinorCPU : public BaseCPU Port &getInstPort() override; public: - MinorCPU(MinorCPUParams *params); + MinorCPU(const MinorCPUParams ¶ms); ~MinorCPU(); diff --git a/src/cpu/minor/decode.cc b/src/cpu/minor/decode.cc index b07ca4aa0..2c90c8e23 100644 --- a/src/cpu/minor/decode.cc +++ b/src/cpu/minor/decode.cc @@ -45,7 +45,7 @@ namespace Minor Decode::Decode(const std::string &name, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Input out_, std::vector> &next_stage_input_buffer) : diff --git a/src/cpu/minor/decode.hh b/src/cpu/minor/decode.hh index 73809178f..89ed00b9b 100644 --- a/src/cpu/minor/decode.hh +++ b/src/cpu/minor/decode.hh @@ -138,7 +138,7 @@ class Decode : public Named public: Decode(const std::string &name, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Input out_, std::vector> &next_stage_input_buffer); diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index 083322499..52708abbe 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -60,7 +60,7 @@ namespace Minor Execute::Execute(const std::string &name_, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Input out_) : Named(name_), diff --git a/src/cpu/minor/execute.hh b/src/cpu/minor/execute.hh index 39ccf4a62..ba33b8191 100644 --- a/src/cpu/minor/execute.hh +++ b/src/cpu/minor/execute.hh @@ -314,7 +314,7 @@ class Execute : public Named public: Execute(const std::string &name_, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Input out_); diff --git a/src/cpu/minor/fetch1.cc b/src/cpu/minor/fetch1.cc index 287f52007..7a5a33f58 100644 --- a/src/cpu/minor/fetch1.cc +++ b/src/cpu/minor/fetch1.cc @@ -52,7 +52,7 @@ namespace Minor Fetch1::Fetch1(const std::string &name_, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Input out_, Latch::Output prediction_, diff --git a/src/cpu/minor/fetch1.hh b/src/cpu/minor/fetch1.hh index 33f90c7e7..9889d4268 100644 --- a/src/cpu/minor/fetch1.hh +++ b/src/cpu/minor/fetch1.hh @@ -382,7 +382,7 @@ class Fetch1 : public Named public: Fetch1(const std::string &name_, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Input out_, Latch::Output prediction_, diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc index c43b2f8ec..263a31903 100644 --- a/src/cpu/minor/fetch2.cc +++ b/src/cpu/minor/fetch2.cc @@ -52,7 +52,7 @@ namespace Minor Fetch2::Fetch2(const std::string &name, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Output branchInp_, Latch::Input predictionOut_, diff --git a/src/cpu/minor/fetch2.hh b/src/cpu/minor/fetch2.hh index 3196e4e07..fbeb96d73 100644 --- a/src/cpu/minor/fetch2.hh +++ b/src/cpu/minor/fetch2.hh @@ -203,7 +203,7 @@ class Fetch2 : public Named public: Fetch2(const std::string &name, MinorCPU &cpu_, - MinorCPUParams ¶ms, + const MinorCPUParams ¶ms, Latch::Output inp_, Latch::Output branchInp_, Latch::Input predictionOut_, diff --git a/src/cpu/minor/func_unit.cc b/src/cpu/minor/func_unit.cc index e1a2ebf72..ffe7f329a 100644 --- a/src/cpu/minor/func_unit.cc +++ b/src/cpu/minor/func_unit.cc @@ -45,38 +45,38 @@ #include "enums/OpClass.hh" MinorOpClass * -MinorOpClassParams::create() +MinorOpClassParams::create() const { - return new MinorOpClass(this); + return new MinorOpClass(*this); } MinorOpClassSet * -MinorOpClassSetParams::create() +MinorOpClassSetParams::create() const { - return new MinorOpClassSet(this); + return new MinorOpClassSet(*this); } MinorFUTiming * -MinorFUTimingParams::create() +MinorFUTimingParams::create() const { - return new MinorFUTiming(this); + return new MinorFUTiming(*this); } MinorFU * -MinorFUParams::create() +MinorFUParams::create() const { - return new MinorFU(this); + return new MinorFU(*this); } MinorFUPool * -MinorFUPoolParams::create() +MinorFUPoolParams::create() const { - return new MinorFUPool(this); + return new MinorFUPool(*this); } -MinorOpClassSet::MinorOpClassSet(const MinorOpClassSetParams *params) : +MinorOpClassSet::MinorOpClassSet(const MinorOpClassSetParams ¶ms) : SimObject(params), - opClasses(params->opClasses), + opClasses(params.opClasses), /* Initialise to true for an empty list so that 'fully capable' is * the default */ capabilityList(Num_OpClasses, (opClasses.empty() ? true : false)) @@ -86,17 +86,17 @@ MinorOpClassSet::MinorOpClassSet(const MinorOpClassSetParams *params) : } MinorFUTiming::MinorFUTiming( - const MinorFUTimingParams *params) : + const MinorFUTimingParams ¶ms) : SimObject(params), - mask(params->mask), - match(params->match), - description(params->description), - suppress(params->suppress), - extraCommitLat(params->extraCommitLat), - extraCommitLatExpr(params->extraCommitLatExpr), - extraAssumedLat(params->extraAssumedLat), - srcRegsRelativeLats(params->srcRegsRelativeLats), - opClasses(params->opClasses) + mask(params.mask), + match(params.match), + description(params.description), + suppress(params.suppress), + extraCommitLat(params.extraCommitLat), + extraCommitLatExpr(params.extraCommitLatExpr), + extraAssumedLat(params.extraAssumedLat), + srcRegsRelativeLats(params.srcRegsRelativeLats), + opClasses(params.opClasses) { } namespace Minor diff --git a/src/cpu/minor/func_unit.hh b/src/cpu/minor/func_unit.hh index 985ff981b..09290e3ee 100644 --- a/src/cpu/minor/func_unit.hh +++ b/src/cpu/minor/func_unit.hh @@ -62,9 +62,9 @@ class MinorOpClass : public SimObject OpClass opClass; public: - MinorOpClass(const MinorOpClassParams *params) : + MinorOpClass(const MinorOpClassParams ¶ms) : SimObject(params), - opClass(params->opClass) + opClass(params.opClass) { } }; @@ -79,7 +79,7 @@ class MinorOpClassSet : public SimObject std::vector capabilityList; public: - MinorOpClassSet(const MinorOpClassSetParams *params); + MinorOpClassSet(const MinorOpClassSetParams ¶ms); public: /** Does this set support the given op class */ @@ -129,7 +129,7 @@ class MinorFUTiming: public SimObject MinorOpClassSet *opClasses; public: - MinorFUTiming(const MinorFUTimingParams *params); + MinorFUTiming(const MinorFUTimingParams ¶ms); public: /** Does the extra decode in this object support the given op class */ @@ -165,13 +165,13 @@ class MinorFU : public SimObject std::vector timings; public: - MinorFU(const MinorFUParams *params) : + MinorFU(const MinorFUParams ¶ms) : SimObject(params), - opClasses(params->opClasses), - opLat(params->opLat), - issueLat(params->issueLat), - cantForwardFromFUIndices(params->cantForwardFromFUIndices), - timings(params->timings) + opClasses(params.opClasses), + opLat(params.opLat), + issueLat(params.issueLat), + cantForwardFromFUIndices(params.cantForwardFromFUIndices), + timings(params.timings) { } }; @@ -182,9 +182,9 @@ class MinorFUPool : public SimObject std::vector funcUnits; public: - MinorFUPool(const MinorFUPoolParams *params) : + MinorFUPool(const MinorFUPoolParams ¶ms) : SimObject(params), - funcUnits(params->funcUnits) + funcUnits(params.funcUnits) { } }; diff --git a/src/cpu/minor/pipeline.cc b/src/cpu/minor/pipeline.cc index 29dbf8b16..d3f915700 100644 --- a/src/cpu/minor/pipeline.cc +++ b/src/cpu/minor/pipeline.cc @@ -51,7 +51,7 @@ namespace Minor { -Pipeline::Pipeline(MinorCPU &cpu_, MinorCPUParams ¶ms) : +Pipeline::Pipeline(MinorCPU &cpu_, const MinorCPUParams ¶ms) : Ticked(cpu_, &(cpu_.BaseCPU::numCycles)), cpu(cpu_), allow_idling(params.enableIdling), diff --git a/src/cpu/minor/pipeline.hh b/src/cpu/minor/pipeline.hh index caf8355fb..b275f0236 100644 --- a/src/cpu/minor/pipeline.hh +++ b/src/cpu/minor/pipeline.hh @@ -105,7 +105,7 @@ class Pipeline : public Ticked bool needToSignalDrained; public: - Pipeline(MinorCPU &cpu_, MinorCPUParams ¶ms); + Pipeline(MinorCPU &cpu_, const MinorCPUParams ¶ms); public: /** Wake up the Fetch unit. This is needed on thread activation esp. diff --git a/src/cpu/nativetrace.cc b/src/cpu/nativetrace.cc index 22a4e3121..65b28338b 100644 --- a/src/cpu/nativetrace.cc +++ b/src/cpu/nativetrace.cc @@ -37,7 +37,7 @@ using namespace std; namespace Trace { -NativeTrace::NativeTrace(const Params *p) +NativeTrace::NativeTrace(const Params &p) : ExeTracer(p) { if (ListenSocket::allDisabled()) diff --git a/src/cpu/nativetrace.hh b/src/cpu/nativetrace.hh index 5faa88fff..b04b91560 100644 --- a/src/cpu/nativetrace.hh +++ b/src/cpu/nativetrace.hh @@ -72,7 +72,7 @@ class NativeTrace : public ExeTracer public: - NativeTrace(const Params *p); + NativeTrace(const Params &p); virtual ~NativeTrace() {} NativeTraceRecord * diff --git a/src/cpu/o3/checker.cc b/src/cpu/o3/checker.cc index 01940778b..7613e0861 100644 --- a/src/cpu/o3/checker.cc +++ b/src/cpu/o3/checker.cc @@ -47,7 +47,7 @@ template class Checker; O3Checker * -O3CheckerParams::create() +O3CheckerParams::create() const { // The checker should check all instructions executed by the main // cpu and therefore any parameters for early exit don't make much @@ -55,5 +55,5 @@ O3CheckerParams::create() fatal_if(max_insts_any_thread || max_insts_all_threads || progress_interval, "Invalid checker parameters"); - return new O3Checker(this); + return new O3Checker(*this); } diff --git a/src/cpu/o3/checker.hh b/src/cpu/o3/checker.hh index 4fbe55917..8751a184e 100644 --- a/src/cpu/o3/checker.hh +++ b/src/cpu/o3/checker.hh @@ -51,9 +51,7 @@ class O3Checker : public Checker { public: - O3Checker(Params *p) - : Checker(p) - { } + O3Checker(const Params &p) : Checker(p) {} }; #endif // __CPU_O3_CHECKER_HH__ diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh index 01a0b7f90..58ca7d7af 100644 --- a/src/cpu/o3/commit.hh +++ b/src/cpu/o3/commit.hh @@ -138,7 +138,7 @@ class DefaultCommit public: /** Construct a DefaultCommit with the given parameters. */ - DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params); + DefaultCommit(O3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of the DefaultCommit. */ std::string name() const; diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 4935f1e73..717ae3334 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -78,19 +78,19 @@ DefaultCommit::processTrapEvent(ThreadID tid) } template -DefaultCommit::DefaultCommit(O3CPU *_cpu, DerivO3CPUParams *params) - : commitPolicy(params->smtCommitPolicy), +DefaultCommit::DefaultCommit(O3CPU *_cpu, const DerivO3CPUParams ¶ms) + : commitPolicy(params.smtCommitPolicy), cpu(_cpu), - iewToCommitDelay(params->iewToCommitDelay), - commitToIEWDelay(params->commitToIEWDelay), - renameToROBDelay(params->renameToROBDelay), - fetchToCommitDelay(params->commitToFetchDelay), - renameWidth(params->renameWidth), - commitWidth(params->commitWidth), - numThreads(params->numThreads), + iewToCommitDelay(params.iewToCommitDelay), + commitToIEWDelay(params.commitToIEWDelay), + renameToROBDelay(params.renameToROBDelay), + fetchToCommitDelay(params.commitToFetchDelay), + renameWidth(params.renameWidth), + commitWidth(params.commitWidth), + numThreads(params.numThreads), drainPending(false), drainImminent(false), - trapLatency(params->trapLatency), + trapLatency(params.trapLatency), canHandleInterrupts(true), avoidQuiesceLiveLock(false), stats(_cpu, this) diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index c5043a7e5..368093f66 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -67,7 +67,7 @@ struct BaseCPUParams; using namespace TheISA; using namespace std; -BaseO3CPU::BaseO3CPU(BaseCPUParams *params) +BaseO3CPU::BaseO3CPU(const BaseCPUParams ¶ms) : BaseCPU(params) { } @@ -79,10 +79,10 @@ BaseO3CPU::regStats() } template -FullO3CPU::FullO3CPU(DerivO3CPUParams *params) +FullO3CPU::FullO3CPU(const DerivO3CPUParams ¶ms) : BaseO3CPU(params), - itb(params->itb), - dtb(params->dtb), + itb(params.itb), + dtb(params.dtb), tickEvent([this]{ tick(); }, "FullO3CPU tick", false, Event::CPU_Tick_Pri), threadExitEvent([this]{ exitThreads(); }, "FullO3CPU exit threads", @@ -99,12 +99,12 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) /* It is mandatory that all SMT threads use the same renaming mode as * they are sharing registers and rename */ - vecMode(RenameMode::init(params->isa[0])), - regFile(params->numPhysIntRegs, - params->numPhysFloatRegs, - params->numPhysVecRegs, - params->numPhysVecPredRegs, - params->numPhysCCRegs, + vecMode(RenameMode::init(params.isa[0])), + regFile(params.numPhysIntRegs, + params.numPhysFloatRegs, + params.numPhysVecRegs, + params.numPhysVecPredRegs, + params.numPhysCCRegs, vecMode), freeList(name() + ".freelist", ®File), @@ -116,37 +116,37 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) isa(numThreads, NULL), - timeBuffer(params->backComSize, params->forwardComSize), - fetchQueue(params->backComSize, params->forwardComSize), - decodeQueue(params->backComSize, params->forwardComSize), - renameQueue(params->backComSize, params->forwardComSize), - iewQueue(params->backComSize, params->forwardComSize), + timeBuffer(params.backComSize, params.forwardComSize), + fetchQueue(params.backComSize, params.forwardComSize), + decodeQueue(params.backComSize, params.forwardComSize), + renameQueue(params.backComSize, params.forwardComSize), + iewQueue(params.backComSize, params.forwardComSize), activityRec(name(), NumStages, - params->backComSize + params->forwardComSize, - params->activity), + params.backComSize + params.forwardComSize, + params.activity), globalSeqNum(1), - system(params->system), + system(params.system), lastRunningCycle(curCycle()) { - fatal_if(FullSystem && params->numThreads > 1, + fatal_if(FullSystem && params.numThreads > 1, "SMT is not supported in O3 in full system mode currently."); - fatal_if(!FullSystem && params->numThreads < params->workload.size(), + fatal_if(!FullSystem && params.numThreads < params.workload.size(), "More workload items (%d) than threads (%d) on CPU %s.", - params->workload.size(), params->numThreads, name()); + params.workload.size(), params.numThreads, name()); - if (!params->switched_out) { + if (!params.switched_out) { _status = Running; } else { _status = SwitchedOut; } - if (params->checker) { - BaseCPU *temp_checker = params->checker; + if (params.checker) { + BaseCPU *temp_checker = params.checker; checker = dynamic_cast *>(temp_checker); checker->setIcachePort(&this->fetch.getInstPort()); - checker->setSystem(params->system); + checker->setSystem(params.system); } else { checker = NULL; } @@ -194,7 +194,7 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) if (FullSystem) { active_threads = 1; } else { - active_threads = params->workload.size(); + active_threads = params.workload.size(); if (active_threads > Impl::MaxThreads) { panic("Workload Size too large. Increase the 'MaxThreads' " @@ -204,18 +204,18 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) } //Make Sure That this a Valid Architeture - assert(params->numPhysIntRegs >= numThreads * TheISA::NumIntRegs); - assert(params->numPhysFloatRegs >= numThreads * TheISA::NumFloatRegs); - assert(params->numPhysVecRegs >= numThreads * TheISA::NumVecRegs); - assert(params->numPhysVecPredRegs >= numThreads * TheISA::NumVecPredRegs); - assert(params->numPhysCCRegs >= numThreads * TheISA::NumCCRegs); + assert(params.numPhysIntRegs >= numThreads * TheISA::NumIntRegs); + assert(params.numPhysFloatRegs >= numThreads * TheISA::NumFloatRegs); + assert(params.numPhysVecRegs >= numThreads * TheISA::NumVecRegs); + assert(params.numPhysVecPredRegs >= numThreads * TheISA::NumVecPredRegs); + assert(params.numPhysCCRegs >= numThreads * TheISA::NumCCRegs); rename.setScoreboard(&scoreboard); iew.setScoreboard(&scoreboard); // Setup the rename map for whichever stages need it. for (ThreadID tid = 0; tid < numThreads; tid++) { - isa[tid] = dynamic_cast(params->isa[tid]); + isa[tid] = dynamic_cast(params.isa[tid]); assert(isa[tid]); assert(RenameMode::equalsInit(isa[tid], isa[0])); @@ -307,12 +307,12 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) assert(this->numThreads == 1); this->thread[tid] = new Thread(this, 0, NULL); } else { - if (tid < params->workload.size()) { + if (tid < params.workload.size()) { DPRINTF(O3CPU, "Workload[%i] process is %#x", tid, this->thread[tid]); this->thread[tid] = new typename FullO3CPU::Thread( (typename Impl::O3CPU *)(this), - tid, params->workload[tid]); + tid, params.workload[tid]); //usedTids[tid] = true; //threadMap[tid] = tid; @@ -337,7 +337,7 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) // If we're using a checker, then the TC should be the // CheckerThreadContext. - if (params->checker) { + if (params.checker) { tc = new CheckerThreadContext >( o3_tc, this->checker); } @@ -354,7 +354,7 @@ FullO3CPU::FullO3CPU(DerivO3CPUParams *params) } // FullO3CPU always requires an interrupt controller. - if (!params->switched_out && interrupts.empty()) { + if (!params.switched_out && interrupts.empty()) { fatal("FullO3CPU %s has no interrupt controller.\n" "Ensure createInterruptController() is called.\n", name()); } diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 200d34398..a2735c460 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -79,7 +79,7 @@ class BaseO3CPU : public BaseCPU { //Stuff that's pretty ISA independent will go here. public: - BaseO3CPU(BaseCPUParams *params); + BaseO3CPU(const BaseCPUParams ¶ms); void regStats(); }; @@ -179,7 +179,7 @@ class FullO3CPU : public BaseO3CPU public: /** Constructs a CPU with the given parameters. */ - FullO3CPU(DerivO3CPUParams *params); + FullO3CPU(const DerivO3CPUParams ¶ms); /** Destructor. */ ~FullO3CPU(); diff --git a/src/cpu/o3/decode.hh b/src/cpu/o3/decode.hh index c0c0b81b4..ffaa1868d 100644 --- a/src/cpu/o3/decode.hh +++ b/src/cpu/o3/decode.hh @@ -97,7 +97,7 @@ class DefaultDecode public: /** DefaultDecode constructor. */ - DefaultDecode(O3CPU *_cpu, DerivO3CPUParams *params); + DefaultDecode(O3CPU *_cpu, const DerivO3CPUParams ¶ms); void startupStage(); diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh index 24640f6a5..76cc2cf10 100644 --- a/src/cpu/o3/decode_impl.hh +++ b/src/cpu/o3/decode_impl.hh @@ -57,14 +57,14 @@ using std::list; template -DefaultDecode::DefaultDecode(O3CPU *_cpu, DerivO3CPUParams *params) +DefaultDecode::DefaultDecode(O3CPU *_cpu, const DerivO3CPUParams ¶ms) : cpu(_cpu), - renameToDecodeDelay(params->renameToDecodeDelay), - iewToDecodeDelay(params->iewToDecodeDelay), - commitToDecodeDelay(params->commitToDecodeDelay), - fetchToDecodeDelay(params->fetchToDecodeDelay), - decodeWidth(params->decodeWidth), - numThreads(params->numThreads), + renameToDecodeDelay(params.renameToDecodeDelay), + iewToDecodeDelay(params.iewToDecodeDelay), + commitToDecodeDelay(params.commitToDecodeDelay), + fetchToDecodeDelay(params.fetchToDecodeDelay), + decodeWidth(params.decodeWidth), + numThreads(params.numThreads), stats(_cpu) { if (decodeWidth > Impl::MaxWidth) @@ -73,7 +73,7 @@ DefaultDecode::DefaultDecode(O3CPU *_cpu, DerivO3CPUParams *params) decodeWidth, static_cast(Impl::MaxWidth)); // @todo: Make into a parameter - skidBufferMax = (fetchToDecodeDelay + 1) * params->fetchWidth; + skidBufferMax = (fetchToDecodeDelay + 1) * params.fetchWidth; for (int tid = 0; tid < Impl::MaxThreads; tid++) { stalls[tid] = {false}; decodeStatus[tid] = Idle; diff --git a/src/cpu/o3/deriv.cc b/src/cpu/o3/deriv.cc index 5da710fac..dbcd34eb5 100644 --- a/src/cpu/o3/deriv.cc +++ b/src/cpu/o3/deriv.cc @@ -33,7 +33,7 @@ #include "params/DerivO3CPU.hh" DerivO3CPU * -DerivO3CPUParams::create() +DerivO3CPUParams::create() const { - return new DerivO3CPU(this); + return new DerivO3CPU(*this); } diff --git a/src/cpu/o3/deriv.hh b/src/cpu/o3/deriv.hh index 5afd7b51f..7851aafc8 100644 --- a/src/cpu/o3/deriv.hh +++ b/src/cpu/o3/deriv.hh @@ -36,9 +36,7 @@ class DerivO3CPU : public FullO3CPU { public: - DerivO3CPU(DerivO3CPUParams *p) - : FullO3CPU(p) - { } + DerivO3CPU(const DerivO3CPUParams &p) : FullO3CPU(p) {} }; #endif // __CPU_O3_DERIV_HH__ diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index e47059a68..704938b6c 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -217,7 +217,7 @@ class DefaultFetch public: /** DefaultFetch constructor. */ - DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params); + DefaultFetch(O3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of fetch. */ std::string name() const; diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 28b1357ed..d0762ca33 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -54,7 +54,6 @@ #include "base/types.hh" #include "config/the_isa.hh" #include "cpu/base.hh" -//#include "cpu/checker/cpu.hh" #include "cpu/o3/cpu.hh" #include "cpu/o3/fetch.hh" #include "cpu/exetrace.hh" @@ -75,24 +74,24 @@ using namespace std; template -DefaultFetch::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params) - : fetchPolicy(params->smtFetchPolicy), +DefaultFetch::DefaultFetch(O3CPU *_cpu, const DerivO3CPUParams ¶ms) + : fetchPolicy(params.smtFetchPolicy), cpu(_cpu), branchPred(nullptr), - decodeToFetchDelay(params->decodeToFetchDelay), - renameToFetchDelay(params->renameToFetchDelay), - iewToFetchDelay(params->iewToFetchDelay), - commitToFetchDelay(params->commitToFetchDelay), - fetchWidth(params->fetchWidth), - decodeWidth(params->decodeWidth), + decodeToFetchDelay(params.decodeToFetchDelay), + renameToFetchDelay(params.renameToFetchDelay), + iewToFetchDelay(params.iewToFetchDelay), + commitToFetchDelay(params.commitToFetchDelay), + fetchWidth(params.fetchWidth), + decodeWidth(params.decodeWidth), retryPkt(NULL), retryTid(InvalidThreadID), cacheBlkSize(cpu->cacheLineSize()), - fetchBufferSize(params->fetchBufferSize), + fetchBufferSize(params.fetchBufferSize), fetchBufferMask(fetchBufferSize - 1), - fetchQueueSize(params->fetchQueueSize), - numThreads(params->numThreads), - numFetchingThreads(params->smtNumFetchingThreads), + fetchQueueSize(params.fetchQueueSize), + numThreads(params.numThreads), + numFetchingThreads(params.smtNumFetchingThreads), icachePort(this, _cpu), finishTranslationEvent(this), fetchStats(_cpu, this) { @@ -130,11 +129,11 @@ DefaultFetch::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params) issuePipelinedIfetch[i] = false; } - branchPred = params->branchPred; + branchPred = params.branchPred; for (ThreadID tid = 0; tid < numThreads; tid++) { decoder[tid] = new TheISA::Decoder( - dynamic_cast(params->isa[tid])); + dynamic_cast(params.isa[tid])); // Create space to buffer the cache line data, // which may not hold the entire cache line. fetchBuffer[tid] = new uint8_t[fetchBufferSize]; diff --git a/src/cpu/o3/fu_pool.cc b/src/cpu/o3/fu_pool.cc index 5a26d8067..7c4b44d69 100644 --- a/src/cpu/o3/fu_pool.cc +++ b/src/cpu/o3/fu_pool.cc @@ -79,7 +79,7 @@ FUPool::~FUPool() // Constructor -FUPool::FUPool(const Params *p) +FUPool::FUPool(const Params &p) : SimObject(p) { numFU = 0; @@ -92,7 +92,7 @@ FUPool::FUPool(const Params *p) // // Iterate through the list of FUDescData structures // - const vector ¶mList = p->FUList; + const vector ¶mList = p.FUList; for (FUDDiterator i = paramList.begin(); i != paramList.end(); ++i) { // @@ -262,7 +262,7 @@ FUPool::isDrained() const // The FuPool object // FUPool * -FUPoolParams::create() +FUPoolParams::create() const { - return new FUPool(this); + return new FUPool(*this); } diff --git a/src/cpu/o3/fu_pool.hh b/src/cpu/o3/fu_pool.hh index 81c4a6f8f..4659fe720 100644 --- a/src/cpu/o3/fu_pool.hh +++ b/src/cpu/o3/fu_pool.hh @@ -129,7 +129,7 @@ class FUPool : public SimObject public: typedef FUPoolParams Params; /** Constructs a FU pool. */ - FUPool(const Params *p); + FUPool(const Params &p); ~FUPool(); static constexpr auto NoCapableFU = -2; diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index 4dbb9efb4..07f986d6d 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -131,7 +131,7 @@ class DefaultIEW public: /** Constructs a DefaultIEW with the given parameters. */ - DefaultIEW(O3CPU *_cpu, DerivO3CPUParams *params); + DefaultIEW(O3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of the DefaultIEW stage. */ std::string name() const; diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index b39001dbc..0eec64444 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -63,21 +63,21 @@ using namespace std; template -DefaultIEW::DefaultIEW(O3CPU *_cpu, DerivO3CPUParams *params) - : issueToExecQueue(params->backComSize, params->forwardComSize), +DefaultIEW::DefaultIEW(O3CPU *_cpu, const DerivO3CPUParams ¶ms) + : issueToExecQueue(params.backComSize, params.forwardComSize), cpu(_cpu), instQueue(_cpu, this, params), ldstQueue(_cpu, this, params), - fuPool(params->fuPool), - commitToIEWDelay(params->commitToIEWDelay), - renameToIEWDelay(params->renameToIEWDelay), - issueToExecuteDelay(params->issueToExecuteDelay), - dispatchWidth(params->dispatchWidth), - issueWidth(params->issueWidth), + fuPool(params.fuPool), + commitToIEWDelay(params.commitToIEWDelay), + renameToIEWDelay(params.renameToIEWDelay), + issueToExecuteDelay(params.issueToExecuteDelay), + dispatchWidth(params.dispatchWidth), + issueWidth(params.issueWidth), wbNumInst(0), wbCycle(0), - wbWidth(params->wbWidth), - numThreads(params->numThreads) + wbWidth(params.wbWidth), + numThreads(params.numThreads) { if (dispatchWidth > Impl::MaxWidth) fatal("dispatchWidth (%d) is larger than compiled limit (%d),\n" @@ -109,7 +109,7 @@ DefaultIEW::DefaultIEW(O3CPU *_cpu, DerivO3CPUParams *params) updateLSQNextCycle = false; - skidBufferMax = (renameToIEWDelay + 1) * params->renameWidth; + skidBufferMax = (renameToIEWDelay + 1) * params.renameWidth; } template diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh index b8878f3b1..1aebfa0d2 100644 --- a/src/cpu/o3/inst_queue.hh +++ b/src/cpu/o3/inst_queue.hh @@ -121,7 +121,8 @@ class InstructionQueue }; /** Constructs an IQ. */ - InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params); + InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, + const DerivO3CPUParams ¶ms); /** Destructs the IQ. */ ~InstructionQueue(); diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 19ed49a5d..119dcd244 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -83,26 +83,26 @@ InstructionQueue::FUCompletion::description() const template InstructionQueue::InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, - DerivO3CPUParams *params) + const DerivO3CPUParams ¶ms) : cpu(cpu_ptr), iewStage(iew_ptr), - fuPool(params->fuPool), - iqPolicy(params->smtIQPolicy), - numEntries(params->numIQEntries), - totalWidth(params->issueWidth), - commitToIEWDelay(params->commitToIEWDelay) + fuPool(params.fuPool), + iqPolicy(params.smtIQPolicy), + numEntries(params.numIQEntries), + totalWidth(params.issueWidth), + commitToIEWDelay(params.commitToIEWDelay) { assert(fuPool); - numThreads = params->numThreads; + numThreads = params.numThreads; // Set the number of total physical registers // As the vector registers have two addressing modes, they are added twice - numPhysRegs = params->numPhysIntRegs + params->numPhysFloatRegs + - params->numPhysVecRegs + - params->numPhysVecRegs * TheISA::NumVecElemPerVecReg + - params->numPhysVecPredRegs + - params->numPhysCCRegs; + numPhysRegs = params.numPhysIntRegs + params.numPhysFloatRegs + + params.numPhysVecRegs + + params.numPhysVecRegs * TheISA::NumVecElemPerVecReg + + params.numPhysVecPredRegs + + params.numPhysCCRegs; //Create an entry for each physical register within the //dependency graph. @@ -138,7 +138,7 @@ InstructionQueue::InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, DPRINTF(IQ, "IQ sharing policy set to Partitioned:" "%i entries per thread.\n",part_amt); } else if (iqPolicy == SMTQueuePolicy::Threshold) { - double threshold = (double)params->smtIQThreshold / 100; + double threshold = (double)params.smtIQThreshold / 100; int thresholdIQ = (int)((double)threshold * numEntries); diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh index bec3ac21c..377ec5908 100644 --- a/src/cpu/o3/lsq.hh +++ b/src/cpu/o3/lsq.hh @@ -847,7 +847,7 @@ class LSQ }; /** Constructs an LSQ with the given parameters. */ - LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params); + LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, const DerivO3CPUParams ¶ms); ~LSQ() { } /** Returns the name of the LSQ. */ diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index e3922aece..16b4b05ee 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -59,26 +59,26 @@ using namespace std; template -LSQ::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params) +LSQ::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, const DerivO3CPUParams ¶ms) : cpu(cpu_ptr), iewStage(iew_ptr), _cacheBlocked(false), - cacheStorePorts(params->cacheStorePorts), usedStorePorts(0), - cacheLoadPorts(params->cacheLoadPorts), usedLoadPorts(0), - lsqPolicy(params->smtLSQPolicy), - LQEntries(params->LQEntries), - SQEntries(params->SQEntries), - maxLQEntries(maxLSQAllocation(lsqPolicy, LQEntries, params->numThreads, - params->smtLSQThreshold)), - maxSQEntries(maxLSQAllocation(lsqPolicy, SQEntries, params->numThreads, - params->smtLSQThreshold)), + cacheStorePorts(params.cacheStorePorts), usedStorePorts(0), + cacheLoadPorts(params.cacheLoadPorts), usedLoadPorts(0), + lsqPolicy(params.smtLSQPolicy), + LQEntries(params.LQEntries), + SQEntries(params.SQEntries), + maxLQEntries(maxLSQAllocation(lsqPolicy, LQEntries, params.numThreads, + params.smtLSQThreshold)), + maxSQEntries(maxLSQAllocation(lsqPolicy, SQEntries, params.numThreads, + params.smtLSQThreshold)), dcachePort(this, cpu_ptr), - numThreads(params->numThreads) + numThreads(params.numThreads) { assert(numThreads > 0 && numThreads <= Impl::MaxThreads); - //**********************************************/ - //************ Handle SMT Parameters ***********/ - //**********************************************/ + //********************************************** + //************ Handle SMT Parameters *********** + //********************************************** /* Run SMT olicy checks. */ if (lsqPolicy == SMTQueuePolicy::Dynamic) { @@ -89,8 +89,8 @@ LSQ::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params) maxLQEntries,maxSQEntries); } else if (lsqPolicy == SMTQueuePolicy::Threshold) { - assert(params->smtLSQThreshold > params->LQEntries); - assert(params->smtLSQThreshold > params->SQEntries); + assert(params.smtLSQThreshold > params.LQEntries); + assert(params.smtLSQThreshold > params.SQEntries); DPRINTF(LSQ, "LSQ sharing policy set to Threshold: " "%i entries per LQ | %i entries per SQ\n", diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 3d6e3f0c2..55b229ae5 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -232,7 +232,7 @@ class LSQUnit } /** Initializes the LSQ unit with the specified number of entries. */ - void init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params, + void init(O3CPU *cpu_ptr, IEW *iew_ptr, const DerivO3CPUParams ¶ms, LSQ *lsq_ptr, unsigned id); /** Returns the name of the LSQ unit. */ diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 808a6711f..93ac0093d 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -214,8 +214,8 @@ LSQUnit::LSQUnit(uint32_t lqEntries, uint32_t sqEntries) template void -LSQUnit::init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params, - LSQ *lsq_ptr, unsigned id) +LSQUnit::init(O3CPU *cpu_ptr, IEW *iew_ptr, + const DerivO3CPUParams ¶ms, LSQ *lsq_ptr, unsigned id) { lsqID = id; @@ -228,9 +228,9 @@ LSQUnit::init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params, DPRINTF(LSQUnit, "Creating LSQUnit%i object.\n",lsqID); - depCheckShift = params->LSQDepCheckShift; - checkLoads = params->LSQCheckLoads; - needsTSO = params->needsTSO; + depCheckShift = params.LSQDepCheckShift; + checkLoads = params.LSQCheckLoads; + needsTSO = params.needsTSO; resetState(); } diff --git a/src/cpu/o3/mem_dep_unit.hh b/src/cpu/o3/mem_dep_unit.hh index 685f6496b..ebeb70283 100644 --- a/src/cpu/o3/mem_dep_unit.hh +++ b/src/cpu/o3/mem_dep_unit.hh @@ -90,7 +90,7 @@ class MemDepUnit MemDepUnit(); /** Constructs a MemDepUnit with given parameters. */ - MemDepUnit(DerivO3CPUParams *params); + MemDepUnit(const DerivO3CPUParams ¶ms); /** Frees up any memory allocated. */ ~MemDepUnit(); @@ -99,7 +99,7 @@ class MemDepUnit std::string name() const { return _name; } /** Initializes the unit with parameters and a thread id. */ - void init(DerivO3CPUParams *params, ThreadID tid); + void init(const DerivO3CPUParams ¶ms, ThreadID tid); /** Registers statistics. */ void regStats(); diff --git a/src/cpu/o3/mem_dep_unit_impl.hh b/src/cpu/o3/mem_dep_unit_impl.hh index 7e1126e55..7af046999 100644 --- a/src/cpu/o3/mem_dep_unit_impl.hh +++ b/src/cpu/o3/mem_dep_unit_impl.hh @@ -57,10 +57,10 @@ MemDepUnit::MemDepUnit() } template -MemDepUnit::MemDepUnit(DerivO3CPUParams *params) - : _name(params->name + ".memdepunit"), - depPred(params->store_set_clear_period, params->SSITSize, - params->LFSTSize), +MemDepUnit::MemDepUnit(const DerivO3CPUParams ¶ms) + : _name(params.name + ".memdepunit"), + depPred(params.store_set_clear_period, params.SSITSize, + params.LFSTSize), iqPtr(NULL) { DPRINTF(MemDepUnit, "Creating MemDepUnit object.\n"); @@ -93,15 +93,16 @@ MemDepUnit::~MemDepUnit() template void -MemDepUnit::init(DerivO3CPUParams *params, ThreadID tid) +MemDepUnit::init( + const DerivO3CPUParams ¶ms, ThreadID tid) { DPRINTF(MemDepUnit, "Creating MemDepUnit %i object.\n",tid); - _name = csprintf("%s.memDep%d", params->name, tid); + _name = csprintf("%s.memDep%d", params.name, tid); id = tid; - depPred.init(params->store_set_clear_period, params->SSITSize, - params->LFSTSize); + depPred.init(params.store_set_clear_period, params.SSITSize, + params.LFSTSize); } template diff --git a/src/cpu/o3/probe/elastic_trace.cc b/src/cpu/o3/probe/elastic_trace.cc index b40d28197..0f7e9b50b 100644 --- a/src/cpu/o3/probe/elastic_trace.cc +++ b/src/cpu/o3/probe/elastic_trace.cc @@ -44,20 +44,20 @@ #include "debug/ElasticTrace.hh" #include "mem/packet.hh" -ElasticTrace::ElasticTrace(const ElasticTraceParams* params) +ElasticTrace::ElasticTrace(const ElasticTraceParams ¶ms) : ProbeListenerObject(params), regEtraceListenersEvent([this]{ regEtraceListeners(); }, name()), firstWin(true), lastClearedSeqNum(0), - depWindowSize(params->depWindowSize), + depWindowSize(params.depWindowSize), dataTraceStream(nullptr), instTraceStream(nullptr), - startTraceInst(params->startTraceInst), + startTraceInst(params.startTraceInst), allProbesReg(false), - traceVirtAddr(params->traceVirtAddr), + traceVirtAddr(params.traceVirtAddr), stats(this) { - cpu = dynamic_cast*>(params->manager); + cpu = dynamic_cast*>(params.manager); fatal_if(!cpu, "Manager of %s is not of type O3CPU and thus does not "\ "support dependency tracing.\n", name()); @@ -67,14 +67,14 @@ ElasticTrace::ElasticTrace(const ElasticTraceParams* params) fatal_if(cpu->numThreads > 1, "numThreads = %i, %s supports tracing for"\ "single-threaded workload only", cpu->numThreads, name()); // Initialize the protobuf output stream - fatal_if(params->instFetchTraceFile == "", "Assign instruction fetch "\ + fatal_if(params.instFetchTraceFile == "", "Assign instruction fetch "\ "trace file path to instFetchTraceFile"); - fatal_if(params->dataDepTraceFile == "", "Assign data dependency "\ + fatal_if(params.dataDepTraceFile == "", "Assign data dependency "\ "trace file path to dataDepTraceFile"); std::string filename = simout.resolve(name() + "." + - params->instFetchTraceFile); + params.instFetchTraceFile); instTraceStream = new ProtoOutputStream(filename); - filename = simout.resolve(name() + "." + params->dataDepTraceFile); + filename = simout.resolve(name() + "." + params.dataDepTraceFile); dataTraceStream = new ProtoOutputStream(filename); // Create a protobuf message for the header and write it to the stream ProtoMessage::PacketHeader inst_pkt_header; @@ -921,7 +921,7 @@ ElasticTrace::flushTraces() } ElasticTrace* -ElasticTraceParams::create() +ElasticTraceParams::create() const { - return new ElasticTrace(this); + return new ElasticTrace(*this); } diff --git a/src/cpu/o3/probe/elastic_trace.hh b/src/cpu/o3/probe/elastic_trace.hh index ddd94083f..1c4487306 100644 --- a/src/cpu/o3/probe/elastic_trace.hh +++ b/src/cpu/o3/probe/elastic_trace.hh @@ -94,7 +94,7 @@ class ElasticTrace : public ProbeListenerObject typedef ProtoMessage::InstDepRecord Record; /** Constructor */ - ElasticTrace(const ElasticTraceParams *params); + ElasticTrace(const ElasticTraceParams ¶ms); /** * Register the probe listeners that is the methods called on a probe point diff --git a/src/cpu/o3/probe/simple_trace.cc b/src/cpu/o3/probe/simple_trace.cc index 902d49bb7..9891cf28a 100644 --- a/src/cpu/o3/probe/simple_trace.cc +++ b/src/cpu/o3/probe/simple_trace.cc @@ -65,7 +65,7 @@ void SimpleTrace::regProbeListeners() } SimpleTrace* -SimpleTraceParams::create() +SimpleTraceParams::create() const { - return new SimpleTrace(this); + return new SimpleTrace(*this); } diff --git a/src/cpu/o3/probe/simple_trace.hh b/src/cpu/o3/probe/simple_trace.hh index a35a2b071..2cd409f50 100644 --- a/src/cpu/o3/probe/simple_trace.hh +++ b/src/cpu/o3/probe/simple_trace.hh @@ -52,7 +52,7 @@ class SimpleTrace : public ProbeListenerObject { public: - SimpleTrace(const SimpleTraceParams *params): + SimpleTrace(const SimpleTraceParams ¶ms): ProbeListenerObject(params) { } diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh index 5b45218f4..47302c685 100644 --- a/src/cpu/o3/rename.hh +++ b/src/cpu/o3/rename.hh @@ -128,7 +128,7 @@ class DefaultRename public: /** DefaultRename constructor. */ - DefaultRename(O3CPU *_cpu, DerivO3CPUParams *params); + DefaultRename(O3CPU *_cpu, const DerivO3CPUParams ¶ms); /** Returns the name of rename. */ std::string name() const; diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index 052012ee2..007ec878b 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -56,14 +56,14 @@ using namespace std; template -DefaultRename::DefaultRename(O3CPU *_cpu, DerivO3CPUParams *params) +DefaultRename::DefaultRename(O3CPU *_cpu, const DerivO3CPUParams ¶ms) : cpu(_cpu), - iewToRenameDelay(params->iewToRenameDelay), - decodeToRenameDelay(params->decodeToRenameDelay), - commitToRenameDelay(params->commitToRenameDelay), - renameWidth(params->renameWidth), - commitWidth(params->commitWidth), - numThreads(params->numThreads), + iewToRenameDelay(params.iewToRenameDelay), + decodeToRenameDelay(params.decodeToRenameDelay), + commitToRenameDelay(params.commitToRenameDelay), + renameWidth(params.renameWidth), + commitWidth(params.commitWidth), + numThreads(params.numThreads), stats(_cpu) { if (renameWidth > Impl::MaxWidth) @@ -72,7 +72,7 @@ DefaultRename::DefaultRename(O3CPU *_cpu, DerivO3CPUParams *params) renameWidth, static_cast(Impl::MaxWidth)); // @todo: Make into a parameter. - skidBufferMax = (decodeToRenameDelay + 1) * params->decodeWidth; + skidBufferMax = (decodeToRenameDelay + 1) * params.decodeWidth; for (uint32_t tid = 0; tid < Impl::MaxThreads; tid++) { renameStatus[tid] = Idle; renameMap[tid] = nullptr; diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh index 4b87dc4d9..60bcdcff4 100644 --- a/src/cpu/o3/rob.hh +++ b/src/cpu/o3/rob.hh @@ -85,7 +85,7 @@ class ROB * @param _cpu The cpu object pointer. * @param params The cpu params including several ROB-specific parameters. */ - ROB(O3CPU *_cpu, DerivO3CPUParams *params); + ROB(O3CPU *_cpu, const DerivO3CPUParams ¶ms); std::string name() const; diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh index bfc368bc9..d4a02b598 100644 --- a/src/cpu/o3/rob_impl.hh +++ b/src/cpu/o3/rob_impl.hh @@ -52,13 +52,13 @@ using namespace std; template -ROB::ROB(O3CPU *_cpu, DerivO3CPUParams *params) - : robPolicy(params->smtROBPolicy), +ROB::ROB(O3CPU *_cpu, const DerivO3CPUParams ¶ms) + : robPolicy(params.smtROBPolicy), cpu(_cpu), - numEntries(params->numROBEntries), - squashWidth(params->squashWidth), + numEntries(params.numROBEntries), + squashWidth(params.squashWidth), numInstsInROB(0), - numThreads(params->numThreads), + numThreads(params.numThreads), stats(_cpu) { //Figure out rob policy @@ -82,7 +82,7 @@ ROB::ROB(O3CPU *_cpu, DerivO3CPUParams *params) } else if (robPolicy == SMTQueuePolicy::Threshold) { DPRINTF(Fetch, "ROB sharing policy set to Threshold\n"); - int threshold = params->smtROBThreshold;; + int threshold = params.smtROBThreshold;; //Divide up by threshold amount for (ThreadID tid = 0; tid < numThreads; tid++) { diff --git a/src/cpu/pred/2bit_local.cc b/src/cpu/pred/2bit_local.cc index 8f800cc94..5f076673a 100644 --- a/src/cpu/pred/2bit_local.cc +++ b/src/cpu/pred/2bit_local.cc @@ -33,10 +33,10 @@ #include "base/trace.hh" #include "debug/Fetch.hh" -LocalBP::LocalBP(const LocalBPParams *params) +LocalBP::LocalBP(const LocalBPParams ¶ms) : BPredUnit(params), - localPredictorSize(params->localPredictorSize), - localCtrBits(params->localCtrBits), + localPredictorSize(params.localPredictorSize), + localCtrBits(params.localCtrBits), localPredictorSets(localPredictorSize / localCtrBits), localCtrs(localPredictorSets, SatCounter(localCtrBits)), indexMask(localPredictorSets - 1) @@ -135,7 +135,7 @@ LocalBP::uncondBranch(ThreadID tid, Addr pc, void *&bp_history) } LocalBP* -LocalBPParams::create() +LocalBPParams::create() const { - return new LocalBP(this); + return new LocalBP(*this); } diff --git a/src/cpu/pred/2bit_local.hh b/src/cpu/pred/2bit_local.hh index 787d96766..60808ca95 100644 --- a/src/cpu/pred/2bit_local.hh +++ b/src/cpu/pred/2bit_local.hh @@ -61,7 +61,7 @@ class LocalBP : public BPredUnit /** * Default branch predictor constructor. */ - LocalBP(const LocalBPParams *params); + LocalBP(const LocalBPParams ¶ms); virtual void uncondBranch(ThreadID tid, Addr pc, void * &bp_history); diff --git a/src/cpu/pred/bi_mode.cc b/src/cpu/pred/bi_mode.cc index 6c429f5e6..4d435a82f 100644 --- a/src/cpu/pred/bi_mode.cc +++ b/src/cpu/pred/bi_mode.cc @@ -35,14 +35,14 @@ #include "base/bitfield.hh" #include "base/intmath.hh" -BiModeBP::BiModeBP(const BiModeBPParams *params) +BiModeBP::BiModeBP(const BiModeBPParams ¶ms) : BPredUnit(params), - globalHistoryReg(params->numThreads, 0), - globalHistoryBits(ceilLog2(params->globalPredictorSize)), - choicePredictorSize(params->choicePredictorSize), - choiceCtrBits(params->choiceCtrBits), - globalPredictorSize(params->globalPredictorSize), - globalCtrBits(params->globalCtrBits), + globalHistoryReg(params.numThreads, 0), + globalHistoryBits(ceilLog2(params.globalPredictorSize)), + choicePredictorSize(params.choicePredictorSize), + choiceCtrBits(params.choiceCtrBits), + globalPredictorSize(params.globalPredictorSize), + globalCtrBits(params.globalCtrBits), choiceCounters(choicePredictorSize, SatCounter(choiceCtrBits)), takenCounters(globalPredictorSize, SatCounter(globalCtrBits)), notTakenCounters(globalPredictorSize, SatCounter(globalCtrBits)) @@ -227,7 +227,7 @@ BiModeBP::updateGlobalHistReg(ThreadID tid, bool taken) } BiModeBP* -BiModeBPParams::create() +BiModeBPParams::create() const { - return new BiModeBP(this); + return new BiModeBP(*this); } diff --git a/src/cpu/pred/bi_mode.hh b/src/cpu/pred/bi_mode.hh index f86ccce33..69c698bb6 100644 --- a/src/cpu/pred/bi_mode.hh +++ b/src/cpu/pred/bi_mode.hh @@ -54,7 +54,7 @@ class BiModeBP : public BPredUnit { public: - BiModeBP(const BiModeBPParams *params); + BiModeBP(const BiModeBPParams ¶ms); void uncondBranch(ThreadID tid, Addr pc, void * &bp_history); void squash(ThreadID tid, void *bp_history); bool lookup(ThreadID tid, Addr branch_addr, void * &bp_history); diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc index d71f464a8..e618fb519 100644 --- a/src/cpu/pred/bpred_unit.cc +++ b/src/cpu/pred/bpred_unit.cc @@ -50,21 +50,21 @@ #include "config/the_isa.hh" #include "debug/Branch.hh" -BPredUnit::BPredUnit(const Params *params) +BPredUnit::BPredUnit(const Params ¶ms) : SimObject(params), - numThreads(params->numThreads), + numThreads(params.numThreads), predHist(numThreads), - BTB(params->BTBEntries, - params->BTBTagSize, - params->instShiftAmt, - params->numThreads), + BTB(params.BTBEntries, + params.BTBTagSize, + params.instShiftAmt, + params.numThreads), RAS(numThreads), - iPred(params->indirectBranchPred), + iPred(params.indirectBranchPred), stats(this), - instShiftAmt(params->instShiftAmt) + instShiftAmt(params.instShiftAmt) { for (auto& r : RAS) - r.init(params->RASSize); + r.init(params.RASSize); } BPredUnit::BPredUnitStats::BPredUnitStats(Stats::Group *parent) diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh index c90d450bc..e445a39e7 100644 --- a/src/cpu/pred/bpred_unit.hh +++ b/src/cpu/pred/bpred_unit.hh @@ -66,7 +66,7 @@ class BPredUnit : public SimObject /** * @param params The params object, that has the size of the BP and BTB. */ - BPredUnit(const Params *p); + BPredUnit(const Params &p); void regProbePoints() override; diff --git a/src/cpu/pred/indirect.hh b/src/cpu/pred/indirect.hh index 5c070869e..469c48d7d 100644 --- a/src/cpu/pred/indirect.hh +++ b/src/cpu/pred/indirect.hh @@ -41,7 +41,7 @@ class IndirectPredictor : public SimObject typedef IndirectPredictorParams Params; - IndirectPredictor(const Params *params) + IndirectPredictor(const Params ¶ms) : SimObject(params) { } diff --git a/src/cpu/pred/loop_predictor.cc b/src/cpu/pred/loop_predictor.cc index 5dad79713..af3b521f0 100644 --- a/src/cpu/pred/loop_predictor.cc +++ b/src/cpu/pred/loop_predictor.cc @@ -38,26 +38,26 @@ #include "debug/LTage.hh" #include "params/LoopPredictor.hh" -LoopPredictor::LoopPredictor(LoopPredictorParams *p) - : SimObject(p), logSizeLoopPred(p->logSizeLoopPred), - loopTableAgeBits(p->loopTableAgeBits), - loopTableConfidenceBits(p->loopTableConfidenceBits), - loopTableTagBits(p->loopTableTagBits), - loopTableIterBits(p->loopTableIterBits), - logLoopTableAssoc(p->logLoopTableAssoc), +LoopPredictor::LoopPredictor(const LoopPredictorParams &p) + : SimObject(p), logSizeLoopPred(p.logSizeLoopPred), + loopTableAgeBits(p.loopTableAgeBits), + loopTableConfidenceBits(p.loopTableConfidenceBits), + loopTableTagBits(p.loopTableTagBits), + loopTableIterBits(p.loopTableIterBits), + logLoopTableAssoc(p.logLoopTableAssoc), confidenceThreshold((1 << loopTableConfidenceBits) - 1), loopTagMask((1 << loopTableTagBits) - 1), loopNumIterMask((1 << loopTableIterBits) - 1), loopSetMask((1 << (logSizeLoopPred - logLoopTableAssoc)) - 1), loopUseCounter(-1), - withLoopBits(p->withLoopBits), - useDirectionBit(p->useDirectionBit), - useSpeculation(p->useSpeculation), - useHashing(p->useHashing), - restrictAllocation(p->restrictAllocation), - initialLoopIter(p->initialLoopIter), - initialLoopAge(p->initialLoopAge), - optionalAgeReset(p->optionalAgeReset), + withLoopBits(p.withLoopBits), + useDirectionBit(p.useDirectionBit), + useSpeculation(p.useSpeculation), + useHashing(p.useHashing), + restrictAllocation(p.restrictAllocation), + initialLoopIter(p.initialLoopIter), + initialLoopAge(p.initialLoopAge), + optionalAgeReset(p.optionalAgeReset), stats(this) { assert(initialLoopAge <= ((1 << loopTableAgeBits) - 1)); @@ -364,7 +364,7 @@ LoopPredictor::getSizeInBits() const } LoopPredictor * -LoopPredictorParams::create() +LoopPredictorParams::create() const { - return new LoopPredictor(this); + return new LoopPredictor(*this); } diff --git a/src/cpu/pred/loop_predictor.hh b/src/cpu/pred/loop_predictor.hh index b26bc7139..1cc45c0c9 100644 --- a/src/cpu/pred/loop_predictor.hh +++ b/src/cpu/pred/loop_predictor.hh @@ -252,7 +252,7 @@ class LoopPredictor : public SimObject */ void init() override; - LoopPredictor(LoopPredictorParams *p); + LoopPredictor(const LoopPredictorParams &p); size_t getSizeInBits() const; }; diff --git a/src/cpu/pred/ltage.cc b/src/cpu/pred/ltage.cc index 68a6db72a..e770336d0 100644 --- a/src/cpu/pred/ltage.cc +++ b/src/cpu/pred/ltage.cc @@ -44,8 +44,8 @@ #include "debug/Fetch.hh" #include "debug/LTage.hh" -LTAGE::LTAGE(const LTAGEParams *params) - : TAGE(params), loopPredictor(params->loop_predictor) +LTAGE::LTAGE(const LTAGEParams ¶ms) + : TAGE(params), loopPredictor(params.loop_predictor) { } @@ -148,7 +148,7 @@ LTAGE::regStats() } LTAGE* -LTAGEParams::create() +LTAGEParams::create() const { - return new LTAGE(this); + return new LTAGE(*this); } diff --git a/src/cpu/pred/ltage.hh b/src/cpu/pred/ltage.hh index 0bbac81d1..9ed1e4838 100644 --- a/src/cpu/pred/ltage.hh +++ b/src/cpu/pred/ltage.hh @@ -60,7 +60,7 @@ class LTAGE : public TAGE { public: - LTAGE(const LTAGEParams *params); + LTAGE(const LTAGEParams ¶ms); // Base class methods. void squash(ThreadID tid, void *bp_history) override; diff --git a/src/cpu/pred/multiperspective_perceptron.cc b/src/cpu/pred/multiperspective_perceptron.cc index 6582197aa..8e42e12f2 100644 --- a/src/cpu/pred/multiperspective_perceptron.cc +++ b/src/cpu/pred/multiperspective_perceptron.cc @@ -111,20 +111,20 @@ MultiperspectivePerceptron::ThreadData::ThreadData(int num_filters, } MultiperspectivePerceptron::MultiperspectivePerceptron( - const MultiperspectivePerceptronParams *p) : BPredUnit(p), - blockSize(p->block_size), pcshift(p->pcshift), threshold(p->threshold), - bias0(p->bias0), bias1(p->bias1), biasmostly0(p->biasmostly0), - biasmostly1(p->biasmostly1), nbest(p->nbest), tunebits(p->tunebits), - hshift(p->hshift), imli_mask1(p->imli_mask1), imli_mask4(p->imli_mask4), - recencypos_mask(p->recencypos_mask), fudge(p->fudge), - n_sign_bits(p->n_sign_bits), pcbit(p->pcbit), decay(p->decay), - record_mask(p->record_mask), hash_taken(p->hash_taken), - tuneonly(p->tuneonly), extra_rounds(p->extra_rounds), speed(p->speed), - budgetbits(p->budgetbits), speculative_update(p->speculative_update), - threadData(p->numThreads, nullptr), doing_local(false), - doing_recency(false), assoc(0), ghist_length(p->initial_ghist_length), + const MultiperspectivePerceptronParams &p) : BPredUnit(p), + blockSize(p.block_size), pcshift(p.pcshift), threshold(p.threshold), + bias0(p.bias0), bias1(p.bias1), biasmostly0(p.biasmostly0), + biasmostly1(p.biasmostly1), nbest(p.nbest), tunebits(p.tunebits), + hshift(p.hshift), imli_mask1(p.imli_mask1), imli_mask4(p.imli_mask4), + recencypos_mask(p.recencypos_mask), fudge(p.fudge), + n_sign_bits(p.n_sign_bits), pcbit(p.pcbit), decay(p.decay), + record_mask(p.record_mask), hash_taken(p.hash_taken), + tuneonly(p.tuneonly), extra_rounds(p.extra_rounds), speed(p.speed), + budgetbits(p.budgetbits), speculative_update(p.speculative_update), + threadData(p.numThreads, nullptr), doing_local(false), + doing_recency(false), assoc(0), ghist_length(p.initial_ghist_length), modghist_length(1), path_length(1), thresholdCounter(0), - theta(p->initial_theta), extrabits(0), imli_counter_bits(4), + theta(p.initial_theta), extrabits(0), imli_counter_bits(4), modhist_indices(), modhist_lengths(), modpath_indices(), modpath_lengths() { fatal_if(speculative_update, "Speculative update not implemented"); @@ -150,16 +150,16 @@ MultiperspectivePerceptron::init() for (auto &spec : specs) { spec->setBitRequirements(); } - const MultiperspectivePerceptronParams *p = - static_cast(params()); + const MultiperspectivePerceptronParams &p = + static_cast(params()); - computeBits(p->num_filter_entries, p->num_local_histories, - p->local_history_length, p->ignore_path_size); + computeBits(p.num_filter_entries, p.num_local_histories, + p.local_history_length, p.ignore_path_size); for (int i = 0; i < threadData.size(); i += 1) { - threadData[i] = new ThreadData(p->num_filter_entries, - p->num_local_histories, - p->local_history_length, assoc, + threadData[i] = new ThreadData(p.num_filter_entries, + p.num_local_histories, + p.local_history_length, assoc, blurrypath_bits, path_length, ghist_length, blockSize, acyclic_bits, modhist_indices, modhist_lengths, diff --git a/src/cpu/pred/multiperspective_perceptron.hh b/src/cpu/pred/multiperspective_perceptron.hh index c225aa4c3..4f5f6130a 100644 --- a/src/cpu/pred/multiperspective_perceptron.hh +++ b/src/cpu/pred/multiperspective_perceptron.hh @@ -1012,7 +1012,7 @@ class MultiperspectivePerceptron : public BPredUnit }; public: - MultiperspectivePerceptron(const MultiperspectivePerceptronParams *params); + MultiperspectivePerceptron(const MultiperspectivePerceptronParams ¶ms); /** * Sets the starting number of storage bits to compute the number of diff --git a/src/cpu/pred/multiperspective_perceptron_64KB.cc b/src/cpu/pred/multiperspective_perceptron_64KB.cc index a5d724183..ba45232ba 100644 --- a/src/cpu/pred/multiperspective_perceptron_64KB.cc +++ b/src/cpu/pred/multiperspective_perceptron_64KB.cc @@ -40,7 +40,7 @@ #include "cpu/pred/multiperspective_perceptron_64KB.hh" MultiperspectivePerceptron64KB::MultiperspectivePerceptron64KB( - const MultiperspectivePerceptron64KBParams *p) + const MultiperspectivePerceptron64KBParams &p) : MultiperspectivePerceptron(p) { } @@ -86,8 +86,8 @@ MultiperspectivePerceptron64KB::createSpecs() { addSpec(new SGHISTPATH(1, 5, 2, 1.3125, 972, 6, *this)); } - MultiperspectivePerceptron64KB* -MultiperspectivePerceptron64KBParams::create() +MultiperspectivePerceptron64KB* +MultiperspectivePerceptron64KBParams::create() const { - return new MultiperspectivePerceptron64KB(this); + return new MultiperspectivePerceptron64KB(*this); } diff --git a/src/cpu/pred/multiperspective_perceptron_64KB.hh b/src/cpu/pred/multiperspective_perceptron_64KB.hh index a87020b6d..7ab932c8f 100644 --- a/src/cpu/pred/multiperspective_perceptron_64KB.hh +++ b/src/cpu/pred/multiperspective_perceptron_64KB.hh @@ -47,7 +47,7 @@ class MultiperspectivePerceptron64KB : public MultiperspectivePerceptron { void createSpecs() override; public: MultiperspectivePerceptron64KB( - const MultiperspectivePerceptron64KBParams *p); + const MultiperspectivePerceptron64KBParams &p); }; #endif // __CPU_PRED_MULTIPERSPECTIVE_PERCEPTRON_64KB_HH__ diff --git a/src/cpu/pred/multiperspective_perceptron_8KB.cc b/src/cpu/pred/multiperspective_perceptron_8KB.cc index 832e17237..7279957ad 100644 --- a/src/cpu/pred/multiperspective_perceptron_8KB.cc +++ b/src/cpu/pred/multiperspective_perceptron_8KB.cc @@ -40,7 +40,7 @@ #include "cpu/pred/multiperspective_perceptron_8KB.hh" MultiperspectivePerceptron8KB::MultiperspectivePerceptron8KB( - const MultiperspectivePerceptron8KBParams *p) + const MultiperspectivePerceptron8KBParams &p) : MultiperspectivePerceptron(p) { } @@ -66,7 +66,7 @@ MultiperspectivePerceptron8KB::createSpecs() { } MultiperspectivePerceptron8KB* -MultiperspectivePerceptron8KBParams::create() +MultiperspectivePerceptron8KBParams::create() const { - return new MultiperspectivePerceptron8KB(this); + return new MultiperspectivePerceptron8KB(*this); } diff --git a/src/cpu/pred/multiperspective_perceptron_8KB.hh b/src/cpu/pred/multiperspective_perceptron_8KB.hh index 032ecdf03..e297dfcbc 100644 --- a/src/cpu/pred/multiperspective_perceptron_8KB.hh +++ b/src/cpu/pred/multiperspective_perceptron_8KB.hh @@ -47,7 +47,7 @@ class MultiperspectivePerceptron8KB : public MultiperspectivePerceptron { void createSpecs() override; public: MultiperspectivePerceptron8KB( - const MultiperspectivePerceptron8KBParams *p); + const MultiperspectivePerceptron8KBParams &p); }; #endif // __CPU_PRED_MULTIPERSPECTIVE_PERCEPTRON_8KB_HH__ diff --git a/src/cpu/pred/multiperspective_perceptron_tage.cc b/src/cpu/pred/multiperspective_perceptron_tage.cc index a54f37c15..3f1803d85 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage.cc +++ b/src/cpu/pred/multiperspective_perceptron_tage.cc @@ -243,9 +243,9 @@ MPP_TAGE::isHighConfidence(TAGEBase::BranchInfo *bi) const } MPP_TAGE* -MPP_TAGEParams::create() +MPP_TAGEParams::create() const { - return new MPP_TAGE(this); + return new MPP_TAGE(*this); } bool @@ -262,15 +262,15 @@ MPP_LoopPredictor::optionalAgeInc() const } MPP_LoopPredictor* -MPP_LoopPredictorParams::create() +MPP_LoopPredictorParams::create() const { - return new MPP_LoopPredictor(this); + return new MPP_LoopPredictor(*this); } MPP_StatisticalCorrector::MPP_StatisticalCorrector( - const MPP_StatisticalCorrectorParams *p) : StatisticalCorrector(p), - thirdH(0), pnb(p->pnb), logPnb(p->logPnb), pm(p->pm), gnb(p->gnb), - logGnb(p->logGnb), gm(p->gm) + const MPP_StatisticalCorrectorParams &p) : StatisticalCorrector(p), + thirdH(0), pnb(p.pnb), logPnb(p.logPnb), pm(p.pm), gnb(p.gnb), + logGnb(p.logGnb), gm(p.gm) { initGEHLTable(pnb, pm, pgehl, logPnb, wp, -1); initGEHLTable(gnb, gm, ggehl, logGnb, wg, -1); @@ -385,10 +385,10 @@ MPP_StatisticalCorrector::scPredict(ThreadID tid, Addr branch_pc, } MultiperspectivePerceptronTAGE::MultiperspectivePerceptronTAGE( - const MultiperspectivePerceptronTAGEParams *p) - : MultiperspectivePerceptron(p), tage(p->tage), - loopPredictor(p->loop_predictor), - statisticalCorrector(p->statistical_corrector) + const MultiperspectivePerceptronTAGEParams &p) + : MultiperspectivePerceptron(p), tage(p.tage), + loopPredictor(p.loop_predictor), + statisticalCorrector(p.statistical_corrector) { fatal_if(tage->isSpeculativeUpdateEnabled(), "Speculative updates support is not implemented"); diff --git a/src/cpu/pred/multiperspective_perceptron_tage.hh b/src/cpu/pred/multiperspective_perceptron_tage.hh index 366f7b8aa..fb9d94f2d 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage.hh +++ b/src/cpu/pred/multiperspective_perceptron_tage.hh @@ -58,8 +58,8 @@ class MPP_TAGE : public TAGEBase { {} }; - MPP_TAGE(const MPP_TAGEParams *p) : TAGEBase(p), - tunedHistoryLengths(p->tunedHistoryLengths) + MPP_TAGE(const MPP_TAGEParams &p) : TAGEBase(p), + tunedHistoryLengths(p.tunedHistoryLengths) {} void calculateParameters() override; @@ -84,7 +84,7 @@ class MPP_TAGE : public TAGEBase { class MPP_LoopPredictor : public LoopPredictor { public: - MPP_LoopPredictor(MPP_LoopPredictorParams *p) : LoopPredictor(p) + MPP_LoopPredictor(const MPP_LoopPredictorParams &p) : LoopPredictor(p) {} bool calcConf(int index) const override; @@ -146,7 +146,7 @@ class MPP_StatisticalCorrector : public StatisticalCorrector { virtual ~BranchInfo() {} }; - MPP_StatisticalCorrector(const MPP_StatisticalCorrectorParams *p); + MPP_StatisticalCorrector(const MPP_StatisticalCorrectorParams &p); void initBias() override; unsigned getIndBias(Addr branch_pc, StatisticalCorrector::BranchInfo* bi, @@ -219,7 +219,7 @@ class MultiperspectivePerceptronTAGE : public MultiperspectivePerceptron public: MultiperspectivePerceptronTAGE( - const MultiperspectivePerceptronTAGEParams *p); + const MultiperspectivePerceptronTAGEParams &p); void init() override; diff --git a/src/cpu/pred/multiperspective_perceptron_tage_64KB.cc b/src/cpu/pred/multiperspective_perceptron_tage_64KB.cc index 9da21676b..8d4d40099 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage_64KB.cc +++ b/src/cpu/pred/multiperspective_perceptron_tage_64KB.cc @@ -40,16 +40,16 @@ #include "cpu/pred/multiperspective_perceptron_tage_64KB.hh" MPP_StatisticalCorrector_64KB::MPP_StatisticalCorrector_64KB( - const MPP_StatisticalCorrector_64KBParams *p) + const MPP_StatisticalCorrector_64KBParams &p) : MPP_StatisticalCorrector(p), - numEntriesSecondLocalHistories(p->numEntriesSecondLocalHistories), - numEntriesThirdLocalHistories(p->numEntriesThirdLocalHistories), - snb(p->snb), - logSnb(p->logSnb), - sm(p->sm), - tnb(p->tnb), - logTnb(p->logTnb), - tm(p->tm) + numEntriesSecondLocalHistories(p.numEntriesSecondLocalHistories), + numEntriesThirdLocalHistories(p.numEntriesThirdLocalHistories), + snb(p.snb), + logSnb(p.logSnb), + sm(p.sm), + tnb(p.tnb), + logTnb(p.logTnb), + tm(p.tm) { initGEHLTable(snb, sm, sgehl, logSnb, ws, -1); initGEHLTable(tnb, tm, tgehl, logTnb, wt, -1); @@ -197,14 +197,14 @@ MPP_StatisticalCorrector_64KB::getSizeInBits() const } MPP_StatisticalCorrector_64KB* -MPP_StatisticalCorrector_64KBParams::create() +MPP_StatisticalCorrector_64KBParams::create() const { - return new MPP_StatisticalCorrector_64KB(this); + return new MPP_StatisticalCorrector_64KB(*this); } MultiperspectivePerceptronTAGE64KB::MultiperspectivePerceptronTAGE64KB( - const MultiperspectivePerceptronTAGE64KBParams *p) + const MultiperspectivePerceptronTAGE64KBParams &p) : MultiperspectivePerceptronTAGE(p) { } @@ -224,7 +224,7 @@ MultiperspectivePerceptronTAGE64KB::createSpecs() } MultiperspectivePerceptronTAGE64KB* -MultiperspectivePerceptronTAGE64KBParams::create() +MultiperspectivePerceptronTAGE64KBParams::create() const { - return new MultiperspectivePerceptronTAGE64KB(this); + return new MultiperspectivePerceptronTAGE64KB(*this); } diff --git a/src/cpu/pred/multiperspective_perceptron_tage_64KB.hh b/src/cpu/pred/multiperspective_perceptron_tage_64KB.hh index aa5d37af3..ba9463175 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage_64KB.hh +++ b/src/cpu/pred/multiperspective_perceptron_tage_64KB.hh @@ -73,7 +73,7 @@ class MPP_StatisticalCorrector_64KB : public MPP_StatisticalCorrector { StatisticalCorrector::BranchInfo *bi, Addr corrTarget) override; public: MPP_StatisticalCorrector_64KB( - const MPP_StatisticalCorrector_64KBParams *p); + const MPP_StatisticalCorrector_64KBParams &p); size_t getSizeInBits() const override; }; @@ -82,7 +82,7 @@ class MultiperspectivePerceptronTAGE64KB : void createSpecs() override; public: MultiperspectivePerceptronTAGE64KB( - const MultiperspectivePerceptronTAGE64KBParams *p); + const MultiperspectivePerceptronTAGE64KBParams &p); }; #endif // __CPU_PRED_MULTIPERSPECTIVE_PERCEPTRON_TAGE_64KB_HH__ diff --git a/src/cpu/pred/multiperspective_perceptron_tage_8KB.cc b/src/cpu/pred/multiperspective_perceptron_tage_8KB.cc index 872d817d5..e7c8ad5d5 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage_8KB.cc +++ b/src/cpu/pred/multiperspective_perceptron_tage_8KB.cc @@ -40,19 +40,19 @@ #include "cpu/pred/multiperspective_perceptron_tage_8KB.hh" MPP_TAGE_8KB* -MPP_TAGE_8KBParams::create() +MPP_TAGE_8KBParams::create() const { - return new MPP_TAGE_8KB(this); + return new MPP_TAGE_8KB(*this); } MPP_LoopPredictor_8KB* -MPP_LoopPredictor_8KBParams::create() +MPP_LoopPredictor_8KBParams::create() const { - return new MPP_LoopPredictor_8KB(this); + return new MPP_LoopPredictor_8KB(*this); } MPP_StatisticalCorrector_8KB::MPP_StatisticalCorrector_8KB( - const MPP_StatisticalCorrector_8KBParams *p) + const MPP_StatisticalCorrector_8KBParams &p) : MPP_StatisticalCorrector(p) { } @@ -168,13 +168,13 @@ MPP_StatisticalCorrector_8KB::getSizeInBits() const } MPP_StatisticalCorrector_8KB* -MPP_StatisticalCorrector_8KBParams::create() +MPP_StatisticalCorrector_8KBParams::create() const { - return new MPP_StatisticalCorrector_8KB(this); + return new MPP_StatisticalCorrector_8KB(*this); } MultiperspectivePerceptronTAGE8KB::MultiperspectivePerceptronTAGE8KB( - const MultiperspectivePerceptronTAGE8KBParams *p) + const MultiperspectivePerceptronTAGE8KBParams &p) : MultiperspectivePerceptronTAGE(p) { } @@ -190,7 +190,7 @@ MultiperspectivePerceptronTAGE8KB::createSpecs() } MultiperspectivePerceptronTAGE8KB* -MultiperspectivePerceptronTAGE8KBParams::create() +MultiperspectivePerceptronTAGE8KBParams::create() const { - return new MultiperspectivePerceptronTAGE8KB(this); + return new MultiperspectivePerceptronTAGE8KB(*this); } diff --git a/src/cpu/pred/multiperspective_perceptron_tage_8KB.hh b/src/cpu/pred/multiperspective_perceptron_tage_8KB.hh index 1bfec931b..ad1037c0c 100644 --- a/src/cpu/pred/multiperspective_perceptron_tage_8KB.hh +++ b/src/cpu/pred/multiperspective_perceptron_tage_8KB.hh @@ -46,18 +46,21 @@ #include "params/MPP_TAGE_8KB.hh" #include "params/MultiperspectivePerceptronTAGE8KB.hh" -class MPP_TAGE_8KB : public MPP_TAGE { +class MPP_TAGE_8KB : public MPP_TAGE +{ public: - MPP_TAGE_8KB(const MPP_TAGE_8KBParams *p) : MPP_TAGE(p) {} + MPP_TAGE_8KB(const MPP_TAGE_8KBParams &p) : MPP_TAGE(p) {} }; -class MPP_LoopPredictor_8KB : public MPP_LoopPredictor { +class MPP_LoopPredictor_8KB : public MPP_LoopPredictor +{ public: - MPP_LoopPredictor_8KB(MPP_LoopPredictor_8KBParams *p) : + MPP_LoopPredictor_8KB(const MPP_LoopPredictor_8KBParams &p) : MPP_LoopPredictor(p) {} }; -class MPP_StatisticalCorrector_8KB : public MPP_StatisticalCorrector { +class MPP_StatisticalCorrector_8KB : public MPP_StatisticalCorrector +{ StatisticalCorrector::SCThreadHistory *makeThreadHistory() override; int gPredictions(ThreadID tid, Addr branch_pc, StatisticalCorrector::BranchInfo* bi, int &lsum, int64_t phist) @@ -69,16 +72,17 @@ class MPP_StatisticalCorrector_8KB : public MPP_StatisticalCorrector { void scHistoryUpdate(Addr branch_pc, const StaticInstPtr &inst, bool taken, StatisticalCorrector::BranchInfo *bi, Addr corrTarget) override; public: - MPP_StatisticalCorrector_8KB(const MPP_StatisticalCorrector_8KBParams *p); + MPP_StatisticalCorrector_8KB(const MPP_StatisticalCorrector_8KBParams &p); size_t getSizeInBits() const override; }; class MultiperspectivePerceptronTAGE8KB : - public MultiperspectivePerceptronTAGE { + public MultiperspectivePerceptronTAGE +{ void createSpecs() override; public: MultiperspectivePerceptronTAGE8KB( - const MultiperspectivePerceptronTAGE8KBParams *p); + const MultiperspectivePerceptronTAGE8KBParams &p); }; #endif // __CPU_PRED_MULTIPERSPECTIVE_PERCEPTRON_TAGE_8KB_HH__ diff --git a/src/cpu/pred/simple_indirect.cc b/src/cpu/pred/simple_indirect.cc index 0ee9302d9..5faab86ad 100644 --- a/src/cpu/pred/simple_indirect.cc +++ b/src/cpu/pred/simple_indirect.cc @@ -32,23 +32,23 @@ #include "debug/Indirect.hh" SimpleIndirectPredictor::SimpleIndirectPredictor( - const SimpleIndirectPredictorParams * params) + const SimpleIndirectPredictorParams ¶ms) : IndirectPredictor(params), - hashGHR(params->indirectHashGHR), - hashTargets(params->indirectHashTargets), - numSets(params->indirectSets), - numWays(params->indirectWays), - tagBits(params->indirectTagSize), - pathLength(params->indirectPathLength), - instShift(params->instShiftAmt), - ghrNumBits(params->indirectGHRBits), - ghrMask((1 << params->indirectGHRBits)-1) + hashGHR(params.indirectHashGHR), + hashTargets(params.indirectHashTargets), + numSets(params.indirectSets), + numWays(params.indirectWays), + tagBits(params.indirectTagSize), + pathLength(params.indirectPathLength), + instShift(params.instShiftAmt), + ghrNumBits(params.indirectGHRBits), + ghrMask((1 << params.indirectGHRBits)-1) { if (!isPowerOf2(numSets)) { - panic("Indirect predictor requires power of 2 number of sets"); + panic("Indirect predictor requires power of 2 number of sets"); } - threadInfo.resize(params->numThreads); + threadInfo.resize(params.numThreads); targetCache.resize(numSets); for (unsigned i = 0; i < numSets; i++) { @@ -235,7 +235,7 @@ SimpleIndirectPredictor::getTag(Addr br_addr) } SimpleIndirectPredictor * -SimpleIndirectPredictorParams::create() +SimpleIndirectPredictorParams::create() const { - return new SimpleIndirectPredictor(this); + return new SimpleIndirectPredictor(*this); } diff --git a/src/cpu/pred/simple_indirect.hh b/src/cpu/pred/simple_indirect.hh index e954892a1..58214b277 100644 --- a/src/cpu/pred/simple_indirect.hh +++ b/src/cpu/pred/simple_indirect.hh @@ -39,7 +39,7 @@ class SimpleIndirectPredictor : public IndirectPredictor { public: - SimpleIndirectPredictor(const SimpleIndirectPredictorParams * params); + SimpleIndirectPredictor(const SimpleIndirectPredictorParams ¶ms); bool lookup(Addr br_addr, TheISA::PCState& br_target, ThreadID tid); void recordIndirect(Addr br_addr, Addr tgt_addr, InstSeqNum seq_num, diff --git a/src/cpu/pred/statistical_corrector.cc b/src/cpu/pred/statistical_corrector.cc index 305959504..0421acbab 100644 --- a/src/cpu/pred/statistical_corrector.cc +++ b/src/cpu/pred/statistical_corrector.cc @@ -44,39 +44,39 @@ #include "params/StatisticalCorrector.hh" StatisticalCorrector::StatisticalCorrector( - const StatisticalCorrectorParams *p) + const StatisticalCorrectorParams &p) : SimObject(p), - logBias(p->logBias), - logSizeUp(p->logSizeUp), + logBias(p.logBias), + logSizeUp(p.logSizeUp), logSizeUps(logSizeUp / 2), - numEntriesFirstLocalHistories(p->numEntriesFirstLocalHistories), - bwnb(p->bwnb), - logBwnb(p->logBwnb), - bwm(p->bwm), - lnb(p->lnb), - logLnb(p->logLnb), - lm(p->lm), - inb(p->inb), - logInb(p->logInb), - im(p->im), - chooserConfWidth(p->chooserConfWidth), - updateThresholdWidth(p->updateThresholdWidth), - pUpdateThresholdWidth(p->pUpdateThresholdWidth), - extraWeightsWidth(p->extraWeightsWidth), - scCountersWidth(p->scCountersWidth), + numEntriesFirstLocalHistories(p.numEntriesFirstLocalHistories), + bwnb(p.bwnb), + logBwnb(p.logBwnb), + bwm(p.bwm), + lnb(p.lnb), + logLnb(p.logLnb), + lm(p.lm), + inb(p.inb), + logInb(p.logInb), + im(p.im), + chooserConfWidth(p.chooserConfWidth), + updateThresholdWidth(p.updateThresholdWidth), + pUpdateThresholdWidth(p.pUpdateThresholdWidth), + extraWeightsWidth(p.extraWeightsWidth), + scCountersWidth(p.scCountersWidth), firstH(0), secondH(0), stats(this) { wb.resize(1 << logSizeUps, 4); - initGEHLTable(lnb, lm, lgehl, logLnb, wl, p->lWeightInitValue); - initGEHLTable(bwnb, bwm, bwgehl, logBwnb, wbw, p->bwWeightInitValue); - initGEHLTable(inb, im, igehl, logInb, wi, p->iWeightInitValue); + initGEHLTable(lnb, lm, lgehl, logLnb, wl, p.lWeightInitValue); + initGEHLTable(bwnb, bwm, bwgehl, logBwnb, wbw, p.bwWeightInitValue); + initGEHLTable(inb, im, igehl, logInb, wi, p.iWeightInitValue); updateThreshold = 35 << 3; - pUpdateThreshold.resize(1 << logSizeUp, p->initialUpdateThresholdValue); + pUpdateThreshold.resize(1 << logSizeUp, p.initialUpdateThresholdValue); bias.resize(1 << logBias); biasSK.resize(1 << logBias); diff --git a/src/cpu/pred/statistical_corrector.hh b/src/cpu/pred/statistical_corrector.hh index b61f0d8fe..52c0483c3 100644 --- a/src/cpu/pred/statistical_corrector.hh +++ b/src/cpu/pred/statistical_corrector.hh @@ -210,7 +210,7 @@ class StatisticalCorrector : public SimObject bool usedScPred; }; - StatisticalCorrector(const StatisticalCorrectorParams *p); + StatisticalCorrector(const StatisticalCorrectorParams &p); virtual BranchInfo *makeBranchInfo(); virtual SCThreadHistory *makeThreadHistory(); diff --git a/src/cpu/pred/tage.cc b/src/cpu/pred/tage.cc index d7c50f0d1..db649afd2 100644 --- a/src/cpu/pred/tage.cc +++ b/src/cpu/pred/tage.cc @@ -44,7 +44,7 @@ #include "debug/Fetch.hh" #include "debug/Tage.hh" -TAGE::TAGE(const TAGEParams *params) : BPredUnit(params), tage(params->tage) +TAGE::TAGE(const TAGEParams ¶ms) : BPredUnit(params), tage(params.tage) { } @@ -127,7 +127,7 @@ TAGE::uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history) } TAGE* -TAGEParams::create() +TAGEParams::create() const { - return new TAGE(this); + return new TAGE(*this); } diff --git a/src/cpu/pred/tage.hh b/src/cpu/pred/tage.hh index b32ce6746..0ab68a033 100644 --- a/src/cpu/pred/tage.hh +++ b/src/cpu/pred/tage.hh @@ -77,7 +77,7 @@ class TAGE: public BPredUnit public: - TAGE(const TAGEParams *params); + TAGE(const TAGEParams ¶ms); // Base class methods. void uncondBranch(ThreadID tid, Addr br_pc, void* &bp_history) override; diff --git a/src/cpu/pred/tage_base.cc b/src/cpu/pred/tage_base.cc index 681e2ce1d..d788ada51 100644 --- a/src/cpu/pred/tage_base.cc +++ b/src/cpu/pred/tage_base.cc @@ -42,27 +42,27 @@ #include "debug/Fetch.hh" #include "debug/Tage.hh" -TAGEBase::TAGEBase(const TAGEBaseParams *p) +TAGEBase::TAGEBase(const TAGEBaseParams &p) : SimObject(p), - logRatioBiModalHystEntries(p->logRatioBiModalHystEntries), - nHistoryTables(p->nHistoryTables), - tagTableCounterBits(p->tagTableCounterBits), - tagTableUBits(p->tagTableUBits), - histBufferSize(p->histBufferSize), - minHist(p->minHist), - maxHist(p->maxHist), - pathHistBits(p->pathHistBits), - tagTableTagWidths(p->tagTableTagWidths), - logTagTableSizes(p->logTagTableSizes), - threadHistory(p->numThreads), - logUResetPeriod(p->logUResetPeriod), - initialTCounterValue(p->initialTCounterValue), - numUseAltOnNa(p->numUseAltOnNa), - useAltOnNaBits(p->useAltOnNaBits), - maxNumAlloc(p->maxNumAlloc), - noSkip(p->noSkip), - speculativeHistUpdate(p->speculativeHistUpdate), - instShiftAmt(p->instShiftAmt), + logRatioBiModalHystEntries(p.logRatioBiModalHystEntries), + nHistoryTables(p.nHistoryTables), + tagTableCounterBits(p.tagTableCounterBits), + tagTableUBits(p.tagTableUBits), + histBufferSize(p.histBufferSize), + minHist(p.minHist), + maxHist(p.maxHist), + pathHistBits(p.pathHistBits), + tagTableTagWidths(p.tagTableTagWidths), + logTagTableSizes(p.logTagTableSizes), + threadHistory(p.numThreads), + logUResetPeriod(p.logUResetPeriod), + initialTCounterValue(p.initialTCounterValue), + numUseAltOnNa(p.numUseAltOnNa), + useAltOnNaBits(p.useAltOnNaBits), + maxNumAlloc(p.maxNumAlloc), + noSkip(p.noSkip), + speculativeHistUpdate(p.speculativeHistUpdate), + instShiftAmt(p.instShiftAmt), initialized(false), stats(this, nHistoryTables) { @@ -792,7 +792,7 @@ TAGEBase::getSizeInBits() const { } TAGEBase* -TAGEBaseParams::create() +TAGEBaseParams::create() const { - return new TAGEBase(this); + return new TAGEBase(*this); } diff --git a/src/cpu/pred/tage_base.hh b/src/cpu/pred/tage_base.hh index f5ee1b8cc..b38244490 100644 --- a/src/cpu/pred/tage_base.hh +++ b/src/cpu/pred/tage_base.hh @@ -58,7 +58,7 @@ class TAGEBase : public SimObject { public: - TAGEBase(const TAGEBaseParams *p); + TAGEBase(const TAGEBaseParams &p); void init() override; protected: diff --git a/src/cpu/pred/tage_sc_l.cc b/src/cpu/pred/tage_sc_l.cc index cbd9a4556..18fe98397 100644 --- a/src/cpu/pred/tage_sc_l.cc +++ b/src/cpu/pred/tage_sc_l.cc @@ -59,13 +59,13 @@ TAGE_SC_L_LoopPredictor::optionalAgeInc() const } TAGE_SC_L_LoopPredictor * -TAGE_SC_L_LoopPredictorParams::create() +TAGE_SC_L_LoopPredictorParams::create() const { - return new TAGE_SC_L_LoopPredictor(this); + return new TAGE_SC_L_LoopPredictor(*this); } -TAGE_SC_L::TAGE_SC_L(const TAGE_SC_LParams *p) - : LTAGE(p), statisticalCorrector(p->statistical_corrector) +TAGE_SC_L::TAGE_SC_L(const TAGE_SC_LParams &p) + : LTAGE(p), statisticalCorrector(p.statistical_corrector) { } diff --git a/src/cpu/pred/tage_sc_l.hh b/src/cpu/pred/tage_sc_l.hh index 71f9c1766..b8714ad83 100644 --- a/src/cpu/pred/tage_sc_l.hh +++ b/src/cpu/pred/tage_sc_l.hh @@ -76,15 +76,15 @@ class TAGE_SC_L_TAGE : public TAGEBase { virtual TAGEBase::BranchInfo *makeBranchInfo() override; - TAGE_SC_L_TAGE(const TAGE_SC_L_TAGEParams *p) + TAGE_SC_L_TAGE(const TAGE_SC_L_TAGEParams &p) : TAGEBase(p), - firstLongTagTable(p->firstLongTagTable), - longTagsSize(p->longTagsSize), - shortTagsSize(p->shortTagsSize), - logTagTableSize(p->logTagTableSize), - shortTagsTageFactor(p->shortTagsTageFactor), - longTagsTageFactor(p->longTagsTageFactor), - truncatePathHist(p->truncatePathHist) + firstLongTagTable(p.firstLongTagTable), + longTagsSize(p.longTagsSize), + shortTagsSize(p.shortTagsSize), + logTagTableSize(p.logTagTableSize), + shortTagsTageFactor(p.shortTagsTageFactor), + longTagsTageFactor(p.longTagsTageFactor), + truncatePathHist(p.truncatePathHist) {} void calculateParameters() override; @@ -137,7 +137,7 @@ class TAGE_SC_L_TAGE : public TAGEBase { class TAGE_SC_L_LoopPredictor : public LoopPredictor { public: - TAGE_SC_L_LoopPredictor(TAGE_SC_L_LoopPredictorParams *p) + TAGE_SC_L_LoopPredictor(const TAGE_SC_L_LoopPredictorParams &p) : LoopPredictor(p) {} @@ -149,7 +149,7 @@ class TAGE_SC_L: public LTAGE { StatisticalCorrector *statisticalCorrector; public: - TAGE_SC_L(const TAGE_SC_LParams *params); + TAGE_SC_L(const TAGE_SC_LParams ¶ms); bool predict( ThreadID tid, Addr branch_pc, bool cond_branch, void* &b) override; diff --git a/src/cpu/pred/tage_sc_l_64KB.cc b/src/cpu/pred/tage_sc_l_64KB.cc index 72676e709..2d71394ad 100644 --- a/src/cpu/pred/tage_sc_l_64KB.cc +++ b/src/cpu/pred/tage_sc_l_64KB.cc @@ -42,22 +42,22 @@ #include "cpu/pred/tage_sc_l_64KB.hh" TAGE_SC_L_64KB_StatisticalCorrector::TAGE_SC_L_64KB_StatisticalCorrector( - TAGE_SC_L_64KB_StatisticalCorrectorParams *p) + const TAGE_SC_L_64KB_StatisticalCorrectorParams &p) : StatisticalCorrector(p), - numEntriesSecondLocalHistories(p->numEntriesSecondLocalHistories), - numEntriesThirdLocalHistories(p->numEntriesThirdLocalHistories), - pnb(p->pnb), - logPnb(p->logPnb), - pm(p->pm), - snb(p->snb), - logSnb(p->logSnb), - sm(p->sm), - tnb(p->tnb), - logTnb(p->logTnb), - tm(p->tm), - imnb(p->imnb), - logImnb(p->logImnb), - imm(p->imm) + numEntriesSecondLocalHistories(p.numEntriesSecondLocalHistories), + numEntriesThirdLocalHistories(p.numEntriesThirdLocalHistories), + pnb(p.pnb), + logPnb(p.logPnb), + pm(p.pm), + snb(p.snb), + logSnb(p.logSnb), + sm(p.sm), + tnb(p.tnb), + logTnb(p.logTnb), + tm(p.tm), + imnb(p.imnb), + logImnb(p.logImnb), + imm(p.imm) { initGEHLTable(pnb, pm, pgehl, logPnb, wp, 7); initGEHLTable(snb, sm, sgehl, logSnb, ws, 7); @@ -191,9 +191,9 @@ TAGE_SC_L_64KB_StatisticalCorrector::gUpdates(ThreadID tid, Addr pc, } TAGE_SC_L_64KB_StatisticalCorrector* -TAGE_SC_L_64KB_StatisticalCorrectorParams::create() +TAGE_SC_L_64KB_StatisticalCorrectorParams::create() const { - return new TAGE_SC_L_64KB_StatisticalCorrector(this); + return new TAGE_SC_L_64KB_StatisticalCorrector(*this); } int @@ -310,18 +310,18 @@ TAGE_SC_L_TAGE_64KB::handleTAGEUpdate(Addr branch_pc, bool taken, } TAGE_SC_L_TAGE_64KB* -TAGE_SC_L_TAGE_64KBParams::create() +TAGE_SC_L_TAGE_64KBParams::create() const { - return new TAGE_SC_L_TAGE_64KB(this); + return new TAGE_SC_L_TAGE_64KB(*this); } -TAGE_SC_L_64KB::TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams *params) +TAGE_SC_L_64KB::TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams ¶ms) : TAGE_SC_L(params) { } TAGE_SC_L_64KB* -TAGE_SC_L_64KBParams::create() +TAGE_SC_L_64KBParams::create() const { - return new TAGE_SC_L_64KB(this); + return new TAGE_SC_L_64KB(*this); } diff --git a/src/cpu/pred/tage_sc_l_64KB.hh b/src/cpu/pred/tage_sc_l_64KB.hh index 4928ba5be..01f5e3817 100644 --- a/src/cpu/pred/tage_sc_l_64KB.hh +++ b/src/cpu/pred/tage_sc_l_64KB.hh @@ -52,7 +52,7 @@ class TAGE_SC_L_TAGE_64KB : public TAGE_SC_L_TAGE { public: - TAGE_SC_L_TAGE_64KB(const TAGE_SC_L_TAGE_64KBParams *p) : TAGE_SC_L_TAGE(p) + TAGE_SC_L_TAGE_64KB(const TAGE_SC_L_TAGE_64KBParams &p) : TAGE_SC_L_TAGE(p) {} int gindex_ext(int index, int bank) const override; @@ -108,7 +108,7 @@ class TAGE_SC_L_64KB_StatisticalCorrector : public StatisticalCorrector public: TAGE_SC_L_64KB_StatisticalCorrector( - TAGE_SC_L_64KB_StatisticalCorrectorParams *p); + const TAGE_SC_L_64KB_StatisticalCorrectorParams &p); unsigned getIndBiasBank(Addr branch_pc, BranchInfo* bi, int hitBank, int altBank) const override; @@ -128,7 +128,7 @@ class TAGE_SC_L_64KB_StatisticalCorrector : public StatisticalCorrector class TAGE_SC_L_64KB : public TAGE_SC_L { public: - TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams *params); + TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams ¶ms); }; #endif // __CPU_PRED_TAGE_SC_L_64KB diff --git a/src/cpu/pred/tage_sc_l_8KB.cc b/src/cpu/pred/tage_sc_l_8KB.cc index 2455990d4..ec5571a8b 100644 --- a/src/cpu/pred/tage_sc_l_8KB.cc +++ b/src/cpu/pred/tage_sc_l_8KB.cc @@ -45,11 +45,11 @@ #include "debug/TageSCL.hh" TAGE_SC_L_8KB_StatisticalCorrector::TAGE_SC_L_8KB_StatisticalCorrector( - TAGE_SC_L_8KB_StatisticalCorrectorParams *p) + const TAGE_SC_L_8KB_StatisticalCorrectorParams &p) : StatisticalCorrector(p), - gnb(p->gnb), - logGnb(p->logGnb), - gm(p->gm) + gnb(p.gnb), + logGnb(p.logGnb), + gm(p.gm) { initGEHLTable(gnb, gm, ggehl, logGnb, wg, 7); } @@ -133,12 +133,12 @@ TAGE_SC_L_8KB_StatisticalCorrector::gUpdates(ThreadID tid, Addr pc, bool taken, } TAGE_SC_L_8KB_StatisticalCorrector* -TAGE_SC_L_8KB_StatisticalCorrectorParams::create() +TAGE_SC_L_8KB_StatisticalCorrectorParams::create() const { - return new TAGE_SC_L_8KB_StatisticalCorrector(this); + return new TAGE_SC_L_8KB_StatisticalCorrector(*this); } -TAGE_SC_L_8KB::TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams *params) +TAGE_SC_L_8KB::TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams ¶ms) : TAGE_SC_L(params) { } @@ -318,13 +318,13 @@ TAGE_SC_L_TAGE_8KB::handleTAGEUpdate(Addr branch_pc, bool taken, } TAGE_SC_L_TAGE_8KB* -TAGE_SC_L_TAGE_8KBParams::create() +TAGE_SC_L_TAGE_8KBParams::create() const { - return new TAGE_SC_L_TAGE_8KB(this); + return new TAGE_SC_L_TAGE_8KB(*this); } TAGE_SC_L_8KB* -TAGE_SC_L_8KBParams::create() +TAGE_SC_L_8KBParams::create() const { - return new TAGE_SC_L_8KB(this); + return new TAGE_SC_L_8KB(*this); } diff --git a/src/cpu/pred/tage_sc_l_8KB.hh b/src/cpu/pred/tage_sc_l_8KB.hh index 7730463b1..2cabbca9e 100644 --- a/src/cpu/pred/tage_sc_l_8KB.hh +++ b/src/cpu/pred/tage_sc_l_8KB.hh @@ -50,7 +50,7 @@ class TAGE_SC_L_TAGE_8KB : public TAGE_SC_L_TAGE { public: - TAGE_SC_L_TAGE_8KB(const TAGE_SC_L_TAGE_8KBParams *p) : TAGE_SC_L_TAGE(p) + TAGE_SC_L_TAGE_8KB(const TAGE_SC_L_TAGE_8KBParams &p) : TAGE_SC_L_TAGE(p) {} void initFoldedHistories(ThreadHistory & history) override; @@ -88,7 +88,7 @@ class TAGE_SC_L_8KB_StatisticalCorrector : public StatisticalCorrector public: TAGE_SC_L_8KB_StatisticalCorrector( - TAGE_SC_L_8KB_StatisticalCorrectorParams *p); + const TAGE_SC_L_8KB_StatisticalCorrectorParams &p); unsigned getIndBiasBank( Addr branch_pc, BranchInfo* bi, int hitBank, int altBank) const override; @@ -109,7 +109,7 @@ class TAGE_SC_L_8KB_StatisticalCorrector : public StatisticalCorrector class TAGE_SC_L_8KB : public TAGE_SC_L { public: - TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams *params); + TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams ¶ms); }; #endif // __CPU_PRED_TAGE_SC_L_8KB diff --git a/src/cpu/pred/tournament.cc b/src/cpu/pred/tournament.cc index e30ab291b..1eb15c225 100644 --- a/src/cpu/pred/tournament.cc +++ b/src/cpu/pred/tournament.cc @@ -43,24 +43,24 @@ #include "base/bitfield.hh" #include "base/intmath.hh" -TournamentBP::TournamentBP(const TournamentBPParams *params) +TournamentBP::TournamentBP(const TournamentBPParams ¶ms) : BPredUnit(params), - localPredictorSize(params->localPredictorSize), - localCtrBits(params->localCtrBits), + localPredictorSize(params.localPredictorSize), + localCtrBits(params.localCtrBits), localCtrs(localPredictorSize, SatCounter(localCtrBits)), - localHistoryTableSize(params->localHistoryTableSize), - localHistoryBits(ceilLog2(params->localPredictorSize)), - globalPredictorSize(params->globalPredictorSize), - globalCtrBits(params->globalCtrBits), + localHistoryTableSize(params.localHistoryTableSize), + localHistoryBits(ceilLog2(params.localPredictorSize)), + globalPredictorSize(params.globalPredictorSize), + globalCtrBits(params.globalCtrBits), globalCtrs(globalPredictorSize, SatCounter(globalCtrBits)), - globalHistory(params->numThreads, 0), + globalHistory(params.numThreads, 0), globalHistoryBits( - ceilLog2(params->globalPredictorSize) > - ceilLog2(params->choicePredictorSize) ? - ceilLog2(params->globalPredictorSize) : - ceilLog2(params->choicePredictorSize)), - choicePredictorSize(params->choicePredictorSize), - choiceCtrBits(params->choiceCtrBits), + ceilLog2(params.globalPredictorSize) > + ceilLog2(params.choicePredictorSize) ? + ceilLog2(params.globalPredictorSize) : + ceilLog2(params.choicePredictorSize)), + choicePredictorSize(params.choicePredictorSize), + choiceCtrBits(params.choiceCtrBits), choiceCtrs(choicePredictorSize, SatCounter(choiceCtrBits)) { if (!isPowerOf2(localPredictorSize)) { @@ -344,9 +344,9 @@ TournamentBP::squash(ThreadID tid, void *bp_history) } TournamentBP* -TournamentBPParams::create() +TournamentBPParams::create() const { - return new TournamentBP(this); + return new TournamentBP(*this); } #ifdef DEBUG diff --git a/src/cpu/pred/tournament.hh b/src/cpu/pred/tournament.hh index 65617107f..c109358d4 100644 --- a/src/cpu/pred/tournament.hh +++ b/src/cpu/pred/tournament.hh @@ -62,7 +62,7 @@ class TournamentBP : public BPredUnit /** * Default branch predictor constructor. */ - TournamentBP(const TournamentBPParams *params); + TournamentBP(const TournamentBPParams ¶ms); /** * Looks up the given address in the branch predictor and returns diff --git a/src/cpu/simple/NonCachingSimpleCPU.py b/src/cpu/simple/NonCachingSimpleCPU.py index 0d3417de2..98cb728af 100644 --- a/src/cpu/simple/NonCachingSimpleCPU.py +++ b/src/cpu/simple/NonCachingSimpleCPU.py @@ -48,6 +48,8 @@ class NonCachingSimpleCPU(AtomicSimpleCPU): type = 'NonCachingSimpleCPU' cxx_header = "cpu/simple/noncaching.hh" + numThreads = 1 + @classmethod def memory_mode(cls): return 'atomic_noncaching' @@ -55,4 +57,3 @@ class NonCachingSimpleCPU(AtomicSimpleCPU): @classmethod def support_take_over(cls): return True - diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 25248d9be..06607cd29 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -73,13 +73,13 @@ AtomicSimpleCPU::init() data_amo_req->setContext(cid); } -AtomicSimpleCPU::AtomicSimpleCPU(AtomicSimpleCPUParams *p) +AtomicSimpleCPU::AtomicSimpleCPU(const AtomicSimpleCPUParams &p) : BaseSimpleCPU(p), tickEvent([this]{ tick(); }, "AtomicSimpleCPU tick", false, Event::CPU_Tick_Pri), - width(p->width), locked(false), - simulate_data_stalls(p->simulate_data_stalls), - simulate_inst_stalls(p->simulate_inst_stalls), + width(p.width), locked(false), + simulate_data_stalls(p.simulate_data_stalls), + simulate_inst_stalls(p.simulate_inst_stalls), icachePort(name() + ".icache_port", this), dcachePort(name() + ".dcache_port", this), dcache_access(false), dcache_latency(0), @@ -777,7 +777,7 @@ AtomicSimpleCPU::printAddr(Addr a) // AtomicSimpleCPU Simulation Object // AtomicSimpleCPU * -AtomicSimpleCPUParams::create() +AtomicSimpleCPUParams::create() const { - return new AtomicSimpleCPU(this); + return new AtomicSimpleCPU(*this); } diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 2d0a46564..26f4c0c5b 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -51,7 +51,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU { public: - AtomicSimpleCPU(AtomicSimpleCPUParams *params); + AtomicSimpleCPU(const AtomicSimpleCPUParams ¶ms); virtual ~AtomicSimpleCPU(); void init() override; diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 132d9196a..31d5285dd 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -80,10 +80,10 @@ using namespace std; using namespace TheISA; -BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p) +BaseSimpleCPU::BaseSimpleCPU(const BaseSimpleCPUParams &p) : BaseCPU(p), curThread(0), - branchPred(p->branchPred), + branchPred(p.branchPred), traceData(NULL), inst(), _status(Idle) @@ -92,24 +92,24 @@ BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p) for (unsigned i = 0; i < numThreads; i++) { if (FullSystem) { - thread = new SimpleThread(this, i, p->system, - p->itb, p->dtb, p->isa[i]); + thread = new SimpleThread(this, i, p.system, + p.itb, p.dtb, p.isa[i]); } else { - thread = new SimpleThread(this, i, p->system, p->workload[i], - p->itb, p->dtb, p->isa[i]); + thread = new SimpleThread(this, i, p.system, p.workload[i], + p.itb, p.dtb, p.isa[i]); } threadInfo.push_back(new SimpleExecContext(this, thread)); ThreadContext *tc = thread->getTC(); threadContexts.push_back(tc); } - if (p->checker) { + if (p.checker) { if (numThreads != 1) fatal("Checker currently does not support SMT"); - BaseCPU *temp_checker = p->checker; + BaseCPU *temp_checker = p.checker; checker = dynamic_cast(temp_checker); - checker->setSystem(p->system); + checker->setSystem(p.system); // Manipulate thread context ThreadContext *cpu_tc = threadContexts[0]; threadContexts[0] = new CheckerThreadContext(cpu_tc, this->checker); diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index 82f52d9cc..5d80ca009 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -87,7 +87,7 @@ class BaseSimpleCPU : public BaseCPU void swapActiveThread(); public: - BaseSimpleCPU(BaseSimpleCPUParams *params); + BaseSimpleCPU(const BaseSimpleCPUParams ¶ms); virtual ~BaseSimpleCPU(); void wakeup(ThreadID tid) override; void init() override; diff --git a/src/cpu/simple/noncaching.cc b/src/cpu/simple/noncaching.cc index 34e1ce2a2..9ab30d192 100644 --- a/src/cpu/simple/noncaching.cc +++ b/src/cpu/simple/noncaching.cc @@ -37,7 +37,9 @@ #include "cpu/simple/noncaching.hh" -NonCachingSimpleCPU::NonCachingSimpleCPU(NonCachingSimpleCPUParams *p) +#include + +NonCachingSimpleCPU::NonCachingSimpleCPU(const NonCachingSimpleCPUParams &p) : AtomicSimpleCPU(p) { } @@ -63,10 +65,10 @@ NonCachingSimpleCPU::sendPacket(RequestPort &port, const PacketPtr &pkt) } NonCachingSimpleCPU * -NonCachingSimpleCPUParams::create() +NonCachingSimpleCPUParams::create() const { - numThreads = 1; + assert(numThreads == 1); if (!FullSystem && workload.size() != 1) fatal("only one workload allowed"); - return new NonCachingSimpleCPU(this); + return new NonCachingSimpleCPU(*this); } diff --git a/src/cpu/simple/noncaching.hh b/src/cpu/simple/noncaching.hh index f57fef2fe..1bc87184b 100644 --- a/src/cpu/simple/noncaching.hh +++ b/src/cpu/simple/noncaching.hh @@ -48,7 +48,7 @@ class NonCachingSimpleCPU : public AtomicSimpleCPU { public: - NonCachingSimpleCPU(NonCachingSimpleCPUParams *p); + NonCachingSimpleCPU(const NonCachingSimpleCPUParams &p); void verifyMemoryMode() const override; diff --git a/src/cpu/simple/probes/simpoint.cc b/src/cpu/simple/probes/simpoint.cc index 10f310547..c4193a3c9 100644 --- a/src/cpu/simple/probes/simpoint.cc +++ b/src/cpu/simple/probes/simpoint.cc @@ -39,16 +39,16 @@ #include "base/output.hh" -SimPoint::SimPoint(const SimPointParams *p) +SimPoint::SimPoint(const SimPointParams &p) : ProbeListenerObject(p), - intervalSize(p->interval), + intervalSize(p.interval), intervalCount(0), intervalDrift(0), simpointStream(NULL), currentBBV(0, 0), currentBBVInstCount(0) { - simpointStream = simout.create(p->profile_file, false); + simpointStream = simout.create(p.profile_file, false); if (!simpointStream) fatal("unable to open SimPoint profile_file"); } @@ -141,7 +141,7 @@ SimPoint::profile(const std::pair& p) /** SimPoint SimObject */ SimPoint* -SimPointParams::create() +SimPointParams::create() const { - return new SimPoint(this); + return new SimPoint(*this); } diff --git a/src/cpu/simple/probes/simpoint.hh b/src/cpu/simple/probes/simpoint.hh index 67353f5db..07467f6c5 100644 --- a/src/cpu/simple/probes/simpoint.hh +++ b/src/cpu/simple/probes/simpoint.hh @@ -72,7 +72,7 @@ struct hash class SimPoint : public ProbeListenerObject { public: - SimPoint(const SimPointParams *params); + SimPoint(const SimPointParams ¶ms); virtual ~SimPoint(); virtual void init(); diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 19556950e..ac28d6609 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -74,7 +74,7 @@ TimingSimpleCPU::TimingCPUPort::TickEvent::schedule(PacketPtr _pkt, Tick t) cpu->schedule(this, t); } -TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p) +TimingSimpleCPU::TimingSimpleCPU(const TimingSimpleCPUParams &p) : BaseSimpleCPU(p), fetchTranslation(this), icachePort(this), dcachePort(this), ifetch_pkt(NULL), dcache_pkt(NULL), previousCycle(0), fetchEvent([this]{ fetch(); }, name()) @@ -1297,7 +1297,7 @@ TimingSimpleCPU::htmSendAbortSignal(HtmFailureFaultCause cause) // TimingSimpleCPU Simulation Object // TimingSimpleCPU * -TimingSimpleCPUParams::create() +TimingSimpleCPUParams::create() const { - return new TimingSimpleCPU(this); + return new TimingSimpleCPU(*this); } diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index c055896a0..134eefa21 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -50,7 +50,7 @@ class TimingSimpleCPU : public BaseSimpleCPU { public: - TimingSimpleCPU(TimingSimpleCPUParams * params); + TimingSimpleCPU(const TimingSimpleCPUParams ¶ms); virtual ~TimingSimpleCPU(); void init() override; diff --git a/src/cpu/testers/directedtest/DirectedGenerator.cc b/src/cpu/testers/directedtest/DirectedGenerator.cc index 44f364049..2aab0687a 100644 --- a/src/cpu/testers/directedtest/DirectedGenerator.cc +++ b/src/cpu/testers/directedtest/DirectedGenerator.cc @@ -31,11 +31,11 @@ #include "sim/system.hh" -DirectedGenerator::DirectedGenerator(const Params *p) +DirectedGenerator::DirectedGenerator(const Params &p) : SimObject(p), - requestorId(p->system->getRequestorId(this)) + requestorId(p.system->getRequestorId(this)) { - m_num_cpus = p->num_cpus; + m_num_cpus = p.num_cpus; m_directed_tester = NULL; } diff --git a/src/cpu/testers/directedtest/DirectedGenerator.hh b/src/cpu/testers/directedtest/DirectedGenerator.hh index f53ff079e..503f866d2 100644 --- a/src/cpu/testers/directedtest/DirectedGenerator.hh +++ b/src/cpu/testers/directedtest/DirectedGenerator.hh @@ -38,7 +38,7 @@ class DirectedGenerator : public SimObject { public: typedef DirectedGeneratorParams Params; - DirectedGenerator(const Params *p); + DirectedGenerator(const Params &p); virtual ~DirectedGenerator() {} diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.cc b/src/cpu/testers/directedtest/InvalidateGenerator.cc index a35c87e82..400150119 100644 --- a/src/cpu/testers/directedtest/InvalidateGenerator.cc +++ b/src/cpu/testers/directedtest/InvalidateGenerator.cc @@ -34,7 +34,7 @@ #include "cpu/testers/directedtest/RubyDirectedTester.hh" #include "debug/DirectedTest.hh" -InvalidateGenerator::InvalidateGenerator(const Params *p) +InvalidateGenerator::InvalidateGenerator(const Params &p) : DirectedGenerator(p) { // @@ -44,7 +44,7 @@ InvalidateGenerator::InvalidateGenerator(const Params *p) m_active_read_node = 0; m_active_inv_node = 0; m_address = 0x0; - m_addr_increment_size = p->addr_increment_size; + m_addr_increment_size = p.addr_increment_size; } InvalidateGenerator::~InvalidateGenerator() @@ -135,7 +135,7 @@ InvalidateGenerator::performCallback(uint32_t proc, Addr address) } InvalidateGenerator * -InvalidateGeneratorParams::create() +InvalidateGeneratorParams::create() const { - return new InvalidateGenerator(this); + return new InvalidateGenerator(*this); } diff --git a/src/cpu/testers/directedtest/InvalidateGenerator.hh b/src/cpu/testers/directedtest/InvalidateGenerator.hh index 64b7ea7f4..aadbad2a6 100644 --- a/src/cpu/testers/directedtest/InvalidateGenerator.hh +++ b/src/cpu/testers/directedtest/InvalidateGenerator.hh @@ -44,7 +44,7 @@ class InvalidateGenerator : public DirectedGenerator { public: typedef InvalidateGeneratorParams Params; - InvalidateGenerator(const Params *p); + InvalidateGenerator(const Params &p); ~InvalidateGenerator(); diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.cc b/src/cpu/testers/directedtest/RubyDirectedTester.cc index 2bed14b71..74a809d97 100644 --- a/src/cpu/testers/directedtest/RubyDirectedTester.cc +++ b/src/cpu/testers/directedtest/RubyDirectedTester.cc @@ -46,17 +46,17 @@ #include "debug/DirectedTest.hh" #include "sim/sim_exit.hh" -RubyDirectedTester::RubyDirectedTester(const Params *p) +RubyDirectedTester::RubyDirectedTester(const Params &p) : ClockedObject(p), directedStartEvent([this]{ wakeup(); }, "Directed tick", false, Event::CPU_Tick_Pri), - m_requests_to_complete(p->requests_to_complete), - generator(p->generator) + m_requests_to_complete(p.requests_to_complete), + generator(p.generator) { m_requests_completed = 0; // create the ports - for (int i = 0; i < p->port_cpuPort_connection_count; ++i) { + for (int i = 0; i < p.port_cpuPort_connection_count; ++i) { ports.push_back(new CpuPort(csprintf("%s-port%d", name(), i), this, i)); } @@ -138,7 +138,7 @@ RubyDirectedTester::wakeup() } RubyDirectedTester * -RubyDirectedTesterParams::create() +RubyDirectedTesterParams::create() const { - return new RubyDirectedTester(this); + return new RubyDirectedTester(*this); } diff --git a/src/cpu/testers/directedtest/RubyDirectedTester.hh b/src/cpu/testers/directedtest/RubyDirectedTester.hh index de3e154cf..a0e20c05d 100644 --- a/src/cpu/testers/directedtest/RubyDirectedTester.hh +++ b/src/cpu/testers/directedtest/RubyDirectedTester.hh @@ -65,7 +65,7 @@ class RubyDirectedTester : public ClockedObject }; typedef RubyDirectedTesterParams Params; - RubyDirectedTester(const Params *p); + RubyDirectedTester(const Params &p); ~RubyDirectedTester(); Port &getPort(const std::string &if_name, diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc index a404ee9f0..bf32bf1f9 100644 --- a/src/cpu/testers/directedtest/SeriesRequestGenerator.cc +++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.cc @@ -35,10 +35,10 @@ #include "cpu/testers/directedtest/RubyDirectedTester.hh" #include "debug/DirectedTest.hh" -SeriesRequestGenerator::SeriesRequestGenerator(const Params *p) +SeriesRequestGenerator::SeriesRequestGenerator(const Params &p) : DirectedGenerator(p), - m_addr_increment_size(p->addr_increment_size), - m_percent_writes(p->percent_writes) + m_addr_increment_size(p.addr_increment_size), + m_percent_writes(p.percent_writes) { m_status = SeriesRequestGeneratorStatus_Thinking; m_active_node = 0; @@ -110,7 +110,7 @@ SeriesRequestGenerator::performCallback(uint32_t proc, Addr address) } SeriesRequestGenerator * -SeriesRequestGeneratorParams::create() +SeriesRequestGeneratorParams::create() const { - return new SeriesRequestGenerator(this); + return new SeriesRequestGenerator(*this); } diff --git a/src/cpu/testers/directedtest/SeriesRequestGenerator.hh b/src/cpu/testers/directedtest/SeriesRequestGenerator.hh index 77688b6f8..27c19db0a 100644 --- a/src/cpu/testers/directedtest/SeriesRequestGenerator.hh +++ b/src/cpu/testers/directedtest/SeriesRequestGenerator.hh @@ -44,7 +44,7 @@ class SeriesRequestGenerator : public DirectedGenerator { public: typedef SeriesRequestGeneratorParams Params; - SeriesRequestGenerator(const Params *p); + SeriesRequestGenerator(const Params &p); ~SeriesRequestGenerator(); diff --git a/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc index dc920553e..03ed862de 100644 --- a/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc +++ b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.cc @@ -71,26 +71,26 @@ GarnetSyntheticTraffic::sendPkt(PacketPtr pkt) numPacketsSent++; } -GarnetSyntheticTraffic::GarnetSyntheticTraffic(const Params *p) +GarnetSyntheticTraffic::GarnetSyntheticTraffic(const Params &p) : ClockedObject(p), tickEvent([this]{ tick(); }, "GarnetSyntheticTraffic tick", false, Event::CPU_Tick_Pri), cachePort("GarnetSyntheticTraffic", this), retryPkt(NULL), - size(p->memory_size), - blockSizeBits(p->block_offset), - numDestinations(p->num_dest), - simCycles(p->sim_cycles), - numPacketsMax(p->num_packets_max), + size(p.memory_size), + blockSizeBits(p.block_offset), + numDestinations(p.num_dest), + simCycles(p.sim_cycles), + numPacketsMax(p.num_packets_max), numPacketsSent(0), - singleSender(p->single_sender), - singleDest(p->single_dest), - trafficType(p->traffic_type), - injRate(p->inj_rate), - injVnet(p->inj_vnet), - precision(p->precision), - responseLimit(p->response_limit), - requestorId(p->system->getRequestorId(this)) + singleSender(p.single_sender), + singleDest(p.single_dest), + trafficType(p.traffic_type), + injRate(p.inj_rate), + injVnet(p.inj_vnet), + precision(p.precision), + responseLimit(p.response_limit), + requestorId(p.system->getRequestorId(this)) { // set up counters noResponseCycles = 0; @@ -351,7 +351,7 @@ GarnetSyntheticTraffic::printAddr(Addr a) GarnetSyntheticTraffic * -GarnetSyntheticTrafficParams::create() +GarnetSyntheticTrafficParams::create() const { - return new GarnetSyntheticTraffic(this); + return new GarnetSyntheticTraffic(*this); } diff --git a/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh index 2864ccfb5..b132a4832 100644 --- a/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh +++ b/src/cpu/testers/garnet_synthetic_traffic/GarnetSyntheticTraffic.hh @@ -55,7 +55,7 @@ class GarnetSyntheticTraffic : public ClockedObject { public: typedef GarnetSyntheticTrafficParams Params; - GarnetSyntheticTraffic(const Params *p); + GarnetSyntheticTraffic(const Params &p); void init() override; diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc index bf990588c..99cefb771 100644 --- a/src/cpu/testers/memtest/memtest.cc +++ b/src/cpu/testers/memtest/memtest.cc @@ -79,27 +79,27 @@ MemTest::sendPkt(PacketPtr pkt) { return true; } -MemTest::MemTest(const Params *p) +MemTest::MemTest(const Params &p) : ClockedObject(p), tickEvent([this]{ tick(); }, name()), noRequestEvent([this]{ noRequest(); }, name()), noResponseEvent([this]{ noResponse(); }, name()), port("port", *this), retryPkt(nullptr), - size(p->size), - interval(p->interval), - percentReads(p->percent_reads), - percentFunctional(p->percent_functional), - percentUncacheable(p->percent_uncacheable), - requestorId(p->system->getRequestorId(this)), - blockSize(p->system->cacheLineSize()), + size(p.size), + interval(p.interval), + percentReads(p.percent_reads), + percentFunctional(p.percent_functional), + percentUncacheable(p.percent_uncacheable), + requestorId(p.system->getRequestorId(this)), + blockSize(p.system->cacheLineSize()), blockAddrMask(blockSize - 1), - progressInterval(p->progress_interval), - progressCheck(p->progress_check), - nextProgressMessage(p->progress_interval), - maxLoads(p->max_loads), - atomic(p->system->isAtomicMode()), - suppressFuncErrors(p->suppress_func_errors), stats(this) + progressInterval(p.progress_interval), + progressCheck(p.progress_check), + nextProgressMessage(p.progress_interval), + maxLoads(p.max_loads), + atomic(p.system->isAtomicMode()), + suppressFuncErrors(p.suppress_func_errors), stats(this) { id = TESTER_ALLOCATOR++; fatal_if(id >= blockSize, "Too many testers, only %d allowed\n", @@ -323,7 +323,7 @@ MemTest::recvRetry() } MemTest * -MemTestParams::create() +MemTestParams::create() const { - return new MemTest(this); + return new MemTest(*this); } diff --git a/src/cpu/testers/memtest/memtest.hh b/src/cpu/testers/memtest/memtest.hh index fc61b7526..d806d7a74 100644 --- a/src/cpu/testers/memtest/memtest.hh +++ b/src/cpu/testers/memtest/memtest.hh @@ -70,7 +70,7 @@ class MemTest : public ClockedObject public: typedef MemTestParams Params; - MemTest(const Params *p); + MemTest(const Params &p); Port &getPort(const std::string &if_name, diff --git a/src/cpu/testers/rubytest/RubyTester.cc b/src/cpu/testers/rubytest/RubyTester.cc index a64a965b9..de715a867 100644 --- a/src/cpu/testers/rubytest/RubyTester.cc +++ b/src/cpu/testers/rubytest/RubyTester.cc @@ -49,21 +49,21 @@ #include "sim/sim_exit.hh" #include "sim/system.hh" -RubyTester::RubyTester(const Params *p) +RubyTester::RubyTester(const Params &p) : ClockedObject(p), checkStartEvent([this]{ wakeup(); }, "RubyTester tick", false, Event::CPU_Tick_Pri), - _requestorId(p->system->getRequestorId(this)), + _requestorId(p.system->getRequestorId(this)), m_checkTable_ptr(nullptr), - m_num_cpus(p->num_cpus), - m_checks_to_complete(p->checks_to_complete), - m_deadlock_threshold(p->deadlock_threshold), + m_num_cpus(p.num_cpus), + m_checks_to_complete(p.checks_to_complete), + m_deadlock_threshold(p.deadlock_threshold), m_num_writers(0), m_num_readers(0), - m_wakeup_frequency(p->wakeup_frequency), - m_check_flush(p->check_flush), - m_num_inst_only_ports(p->port_cpuInstPort_connection_count), - m_num_inst_data_ports(p->port_cpuInstDataPort_connection_count) + m_wakeup_frequency(p.wakeup_frequency), + m_check_flush(p.check_flush), + m_num_inst_only_ports(p.port_cpuInstPort_connection_count), + m_num_inst_data_ports(p.port_cpuInstDataPort_connection_count) { m_checks_completed = 0; @@ -79,19 +79,19 @@ RubyTester::RubyTester(const Params *p) // then the data ports are added to the readPort vector // int idx = 0; - for (int i = 0; i < p->port_cpuInstPort_connection_count; ++i) { + for (int i = 0; i < p.port_cpuInstPort_connection_count; ++i) { readPorts.push_back(new CpuPort(csprintf("%s-instPort%d", name(), i), this, i, idx)); idx++; } - for (int i = 0; i < p->port_cpuInstDataPort_connection_count; ++i) { + for (int i = 0; i < p.port_cpuInstDataPort_connection_count; ++i) { CpuPort *port = new CpuPort(csprintf("%s-instDataPort%d", name(), i), this, i, idx); readPorts.push_back(port); writePorts.push_back(port); idx++; } - for (int i = 0; i < p->port_cpuDataPort_connection_count; ++i) { + for (int i = 0; i < p.port_cpuDataPort_connection_count; ++i) { CpuPort *port = new CpuPort(csprintf("%s-dataPort%d", name(), i), this, i, idx); readPorts.push_back(port); @@ -280,7 +280,7 @@ RubyTester::print(std::ostream& out) const } RubyTester * -RubyTesterParams::create() +RubyTesterParams::create() const { - return new RubyTester(this); + return new RubyTester(*this); } diff --git a/src/cpu/testers/rubytest/RubyTester.hh b/src/cpu/testers/rubytest/RubyTester.hh index 64c33b87f..50c334304 100644 --- a/src/cpu/testers/rubytest/RubyTester.hh +++ b/src/cpu/testers/rubytest/RubyTester.hh @@ -92,7 +92,7 @@ class RubyTester : public ClockedObject }; typedef RubyTesterParams Params; - RubyTester(const Params *p); + RubyTester(const Params &p); ~RubyTester(); Port &getPort(const std::string &if_name, diff --git a/src/cpu/testers/traffic_gen/base.cc b/src/cpu/testers/traffic_gen/base.cc index dcc410bf8..5cf532074 100644 --- a/src/cpu/testers/traffic_gen/base.cc +++ b/src/cpu/testers/traffic_gen/base.cc @@ -66,15 +66,15 @@ using namespace std; -BaseTrafficGen::BaseTrafficGen(const BaseTrafficGenParams* p) +BaseTrafficGen::BaseTrafficGen(const BaseTrafficGenParams &p) : ClockedObject(p), - system(p->system), - elasticReq(p->elastic_req), - progressCheck(p->progress_check), + system(p.system), + elasticReq(p.elastic_req), + progressCheck(p.progress_check), noProgressEvent([this]{ noProgress(); }, name()), nextTransitionTick(0), nextPacketTick(0), - maxOutstandingReqs(p->max_outstanding_reqs), + maxOutstandingReqs(p.max_outstanding_reqs), port(name() + ".port", *this), retryPkt(NULL), retryPktTick(0), blockedWaitingResp(false), diff --git a/src/cpu/testers/traffic_gen/base.hh b/src/cpu/testers/traffic_gen/base.hh index 7c3386e72..01b560e60 100644 --- a/src/cpu/testers/traffic_gen/base.hh +++ b/src/cpu/testers/traffic_gen/base.hh @@ -238,7 +238,7 @@ class BaseTrafficGen : public ClockedObject } stats; public: - BaseTrafficGen(const BaseTrafficGenParams* p); + BaseTrafficGen(const BaseTrafficGenParams &p); ~BaseTrafficGen(); diff --git a/src/cpu/testers/traffic_gen/pygen.cc b/src/cpu/testers/traffic_gen/pygen.cc index 19ce914a3..0d5e88026 100644 --- a/src/cpu/testers/traffic_gen/pygen.cc +++ b/src/cpu/testers/traffic_gen/pygen.cc @@ -44,7 +44,7 @@ namespace py = pybind11; -PyTrafficGen::PyTrafficGen(const PyTrafficGenParams *p) +PyTrafficGen::PyTrafficGen(const PyTrafficGenParams &p) : BaseTrafficGen(p) { } @@ -91,8 +91,8 @@ pybind_init_tracers(py::module &m_native) static EmbeddedPyBind _py_tracers("trace", pybind_init_tracers); PyTrafficGen* -PyTrafficGenParams::create() +PyTrafficGenParams::create() const { - return new PyTrafficGen(this); + return new PyTrafficGen(*this); } diff --git a/src/cpu/testers/traffic_gen/pygen.hh b/src/cpu/testers/traffic_gen/pygen.hh index f068b7f5f..3e2b4d241 100644 --- a/src/cpu/testers/traffic_gen/pygen.hh +++ b/src/cpu/testers/traffic_gen/pygen.hh @@ -48,7 +48,7 @@ struct PyTrafficGenParams; class M5_LOCAL PyTrafficGen : public BaseTrafficGen { public: - PyTrafficGen(const PyTrafficGenParams* p); + PyTrafficGen(const PyTrafficGenParams &p); ~PyTrafficGen() {} public: // Python API diff --git a/src/cpu/testers/traffic_gen/stream_gen.cc b/src/cpu/testers/traffic_gen/stream_gen.cc index 1f65d9af3..d36b0f61e 100644 --- a/src/cpu/testers/traffic_gen/stream_gen.cc +++ b/src/cpu/testers/traffic_gen/stream_gen.cc @@ -40,9 +40,9 @@ #include "base/random.hh" StreamGen* -StreamGen::create(const BaseTrafficGenParams *p) +StreamGen::create(const BaseTrafficGenParams &p) { - switch (p->stream_gen) { + switch (p.stream_gen) { case StreamGenType::fixed: return new FixedStreamGen(p); case StreamGenType::random: diff --git a/src/cpu/testers/traffic_gen/stream_gen.hh b/src/cpu/testers/traffic_gen/stream_gen.hh index 99b69423e..a4eb5bbc7 100644 --- a/src/cpu/testers/traffic_gen/stream_gen.hh +++ b/src/cpu/testers/traffic_gen/stream_gen.hh @@ -49,8 +49,8 @@ class StreamGen { protected: - StreamGen(const BaseTrafficGenParams *p) - : streamIds(p->sids), substreamIds(p->ssids) + StreamGen(const BaseTrafficGenParams &p) + : streamIds(p.sids), substreamIds(p.ssids) { // A non empty vector of StreamIDs must be provided. // SubstreamIDs are not mandatory hence having an empty @@ -75,7 +75,7 @@ class StreamGen * the stream generator type is stored. * @return a pointer to the newly alocated StremGen */ - static StreamGen* create(const BaseTrafficGenParams *p); + static StreamGen* create(const BaseTrafficGenParams &p); /** * Returns true if the substreamID generation is valid @@ -102,7 +102,7 @@ class StreamGen class FixedStreamGen : public StreamGen { public: - FixedStreamGen(const BaseTrafficGenParams *p) + FixedStreamGen(const BaseTrafficGenParams &p) : StreamGen(p) { // For a fixed stream generator only one sid must be provided. The @@ -121,7 +121,7 @@ class FixedStreamGen : public StreamGen class RandomStreamGen : public StreamGen { public: - RandomStreamGen(const BaseTrafficGenParams *p) + RandomStreamGen(const BaseTrafficGenParams &p) : StreamGen(p) {} diff --git a/src/cpu/testers/traffic_gen/traffic_gen.cc b/src/cpu/testers/traffic_gen/traffic_gen.cc index 61f205d46..0d7ea9d30 100644 --- a/src/cpu/testers/traffic_gen/traffic_gen.cc +++ b/src/cpu/testers/traffic_gen/traffic_gen.cc @@ -51,17 +51,17 @@ using namespace std; -TrafficGen::TrafficGen(const TrafficGenParams* p) +TrafficGen::TrafficGen(const TrafficGenParams &p) : BaseTrafficGen(p), - configFile(p->config_file), + configFile(p.config_file), currState(0) { } TrafficGen* -TrafficGenParams::create() +TrafficGenParams::create() const { - return new TrafficGen(this); + return new TrafficGen(*this); } void diff --git a/src/cpu/testers/traffic_gen/traffic_gen.hh b/src/cpu/testers/traffic_gen/traffic_gen.hh index d90df6492..492a161f9 100644 --- a/src/cpu/testers/traffic_gen/traffic_gen.hh +++ b/src/cpu/testers/traffic_gen/traffic_gen.hh @@ -120,7 +120,7 @@ class TrafficGen : public BaseTrafficGen public: - TrafficGen(const TrafficGenParams* p); + TrafficGen(const TrafficGenParams &p); ~TrafficGen() {} diff --git a/src/cpu/timing_expr.cc b/src/cpu/timing_expr.cc index d80ff9b9c..9938c0cce 100644 --- a/src/cpu/timing_expr.cc +++ b/src/cpu/timing_expr.cc @@ -199,49 +199,49 @@ uint64_t TimingExprIf::eval(TimingExprEvalContext &context) } TimingExprLiteral * -TimingExprLiteralParams::create() +TimingExprLiteralParams::create() const { - return new TimingExprLiteral(this); + return new TimingExprLiteral(*this); } TimingExprSrcReg * -TimingExprSrcRegParams::create() +TimingExprSrcRegParams::create() const { - return new TimingExprSrcReg(this); + return new TimingExprSrcReg(*this); } TimingExprReadIntReg * -TimingExprReadIntRegParams::create() +TimingExprReadIntRegParams::create() const { - return new TimingExprReadIntReg(this); + return new TimingExprReadIntReg(*this); } TimingExprLet * -TimingExprLetParams::create() +TimingExprLetParams::create() const { - return new TimingExprLet(this); + return new TimingExprLet(*this); } TimingExprRef * -TimingExprRefParams::create() +TimingExprRefParams::create() const { - return new TimingExprRef(this); + return new TimingExprRef(*this); } TimingExprUn * -TimingExprUnParams::create() +TimingExprUnParams::create() const { - return new TimingExprUn(this); + return new TimingExprUn(*this); } TimingExprBin * -TimingExprBinParams::create() +TimingExprBinParams::create() const { - return new TimingExprBin(this); + return new TimingExprBin(*this); } TimingExprIf * -TimingExprIfParams::create() +TimingExprIfParams::create() const { - return new TimingExprIf(this); + return new TimingExprIf(*this); } diff --git a/src/cpu/timing_expr.hh b/src/cpu/timing_expr.hh index 316e03bf9..35e164349 100644 --- a/src/cpu/timing_expr.hh +++ b/src/cpu/timing_expr.hh @@ -88,7 +88,7 @@ class TimingExprEvalContext class TimingExpr : public SimObject { public: - TimingExpr(const TimingExprParams *params) : + TimingExpr(const TimingExprParams ¶ms) : SimObject(params) { } @@ -100,9 +100,9 @@ class TimingExprLiteral : public TimingExpr public: uint64_t value; - TimingExprLiteral(const TimingExprLiteralParams *params) : + TimingExprLiteral(const TimingExprLiteralParams ¶ms) : TimingExpr(params), - value(params->value) + value(params.value) { } uint64_t eval(TimingExprEvalContext &context) { return value; } @@ -113,9 +113,9 @@ class TimingExprSrcReg : public TimingExpr public: unsigned int index; - TimingExprSrcReg(const TimingExprSrcRegParams *params) : + TimingExprSrcReg(const TimingExprSrcRegParams ¶ms) : TimingExpr(params), - index(params->index) + index(params.index) { } uint64_t eval(TimingExprEvalContext &context); @@ -126,9 +126,9 @@ class TimingExprReadIntReg : public TimingExpr public: TimingExpr *reg; - TimingExprReadIntReg(const TimingExprReadIntRegParams *params) : + TimingExprReadIntReg(const TimingExprReadIntRegParams ¶ms) : TimingExpr(params), - reg(params->reg) + reg(params.reg) { } uint64_t eval(TimingExprEvalContext &context); @@ -140,10 +140,10 @@ class TimingExprLet : public TimingExpr std::vector defns; TimingExpr *expr; - TimingExprLet(const TimingExprLetParams *params) : + TimingExprLet(const TimingExprLetParams ¶ms) : TimingExpr(params), - defns(params->defns), - expr(params->expr) + defns(params.defns), + expr(params.expr) { } uint64_t eval(TimingExprEvalContext &context); @@ -154,9 +154,9 @@ class TimingExprRef : public TimingExpr public: unsigned int index; - TimingExprRef(const TimingExprRefParams *params) : + TimingExprRef(const TimingExprRefParams ¶ms) : TimingExpr(params), - index(params->index) + index(params.index) { } uint64_t eval(TimingExprEvalContext &context); @@ -168,10 +168,10 @@ class TimingExprUn : public TimingExpr Enums::TimingExprOp op; TimingExpr *arg; - TimingExprUn(const TimingExprUnParams *params) : + TimingExprUn(const TimingExprUnParams ¶ms) : TimingExpr(params), - op(params->op), - arg(params->arg) + op(params.op), + arg(params.arg) { } uint64_t eval(TimingExprEvalContext &context); @@ -184,11 +184,11 @@ class TimingExprBin : public TimingExpr TimingExpr *left; TimingExpr *right; - TimingExprBin(const TimingExprBinParams *params) : + TimingExprBin(const TimingExprBinParams ¶ms) : TimingExpr(params), - op(params->op), - left(params->left), - right(params->right) + op(params.op), + left(params.left), + right(params.right) { } uint64_t eval(TimingExprEvalContext &context); @@ -201,11 +201,11 @@ class TimingExprIf : public TimingExpr TimingExpr *trueExpr; TimingExpr *falseExpr; - TimingExprIf(const TimingExprIfParams *params) : + TimingExprIf(const TimingExprIfParams ¶ms) : TimingExpr(params), - cond(params->cond), - trueExpr(params->trueExpr), - falseExpr(params->falseExpr) + cond(params.cond), + trueExpr(params.trueExpr), + falseExpr(params.falseExpr) { } uint64_t eval(TimingExprEvalContext &context); diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc index a9789034e..b2326eb11 100644 --- a/src/cpu/trace/trace_cpu.cc +++ b/src/cpu/trace/trace_cpu.cc @@ -42,14 +42,14 @@ // Declare and initialize the static counter for number of trace CPUs. int TraceCPU::numTraceCPUs = 0; -TraceCPU::TraceCPU(TraceCPUParams *params) +TraceCPU::TraceCPU(const TraceCPUParams ¶ms) : BaseCPU(params), icachePort(this), dcachePort(this), - instRequestorID(params->system->getRequestorId(this, "inst")), - dataRequestorID(params->system->getRequestorId(this, "data")), - instTraceFile(params->instTraceFile), - dataTraceFile(params->dataTraceFile), + instRequestorID(params.system->getRequestorId(this, "inst")), + dataRequestorID(params.system->getRequestorId(this, "data")), + instTraceFile(params.instTraceFile), + dataTraceFile(params.dataTraceFile), icacheGen(*this, ".iside", icachePort, instRequestorID, instTraceFile), dcacheGen(*this, ".dside", dcachePort, dataRequestorID, dataTraceFile, params), @@ -58,23 +58,23 @@ TraceCPU::TraceCPU(TraceCPUParams *params) oneTraceComplete(false), traceOffset(0), execCompleteEvent(nullptr), - enableEarlyExit(params->enableEarlyExit), - progressMsgInterval(params->progressMsgInterval), - progressMsgThreshold(params->progressMsgInterval), traceStats(this) + enableEarlyExit(params.enableEarlyExit), + progressMsgInterval(params.progressMsgInterval), + progressMsgThreshold(params.progressMsgInterval), traceStats(this) { // Increment static counter for number of Trace CPUs. ++TraceCPU::numTraceCPUs; // Check that the python parameters for sizes of ROB, store buffer and // load buffer do not overflow the corresponding C++ variables. - fatal_if(params->sizeROB > UINT16_MAX, "ROB size set to %d exceeds the " - "max. value of %d.\n", params->sizeROB, UINT16_MAX); - fatal_if(params->sizeStoreBuffer > UINT16_MAX, "ROB size set to %d " - "exceeds the max. value of %d.\n", params->sizeROB, + fatal_if(params.sizeROB > UINT16_MAX, "ROB size set to %d exceeds the " + "max. value of %d.\n", params.sizeROB, UINT16_MAX); + fatal_if(params.sizeStoreBuffer > UINT16_MAX, "ROB size set to %d " + "exceeds the max. value of %d.\n", params.sizeROB, UINT16_MAX); - fatal_if(params->sizeLoadBuffer > UINT16_MAX, "Load buffer size set to" + fatal_if(params.sizeLoadBuffer > UINT16_MAX, "Load buffer size set to" " %d exceeds the max. value of %d.\n", - params->sizeLoadBuffer, UINT16_MAX); + params.sizeLoadBuffer, UINT16_MAX); } TraceCPU::~TraceCPU() @@ -83,9 +83,9 @@ TraceCPU::~TraceCPU() } TraceCPU* -TraceCPUParams::create() +TraceCPUParams::create() const { - return new TraceCPU(this); + return new TraceCPU(*this); } void diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh index ba1c5e641..4fb72d221 100644 --- a/src/cpu/trace/trace_cpu.hh +++ b/src/cpu/trace/trace_cpu.hh @@ -141,7 +141,7 @@ class TraceCPU : public BaseCPU { public: - TraceCPU(TraceCPUParams *params); + TraceCPU(const TraceCPUParams ¶ms); ~TraceCPU(); void init(); @@ -853,19 +853,19 @@ class TraceCPU : public BaseCPU /* Constructor */ ElasticDataGen(TraceCPU& _owner, const std::string& _name, RequestPort& _port, RequestorID requestor_id, - const std::string& trace_file, TraceCPUParams *params) + const std::string& trace_file, const TraceCPUParams ¶ms) : owner(_owner), port(_port), requestorId(requestor_id), - trace(trace_file, 1.0 / params->freqMultiplier), + trace(trace_file, 1.0 / params.freqMultiplier), genName(owner.name() + ".elastic." + _name), retryPkt(nullptr), traceComplete(false), nextRead(false), execComplete(false), windowSize(trace.getWindowSize()), - hwResource(params->sizeROB, params->sizeStoreBuffer, - params->sizeLoadBuffer), elasticStats(&_owner, _name) + hwResource(params.sizeROB, params.sizeStoreBuffer, + params.sizeLoadBuffer), elasticStats(&_owner, _name) { DPRINTF(TraceCPUData, "Window size in the trace is %d.\n", windowSize); diff --git a/src/dev/arm/a9scu.cc b/src/dev/arm/a9scu.cc index 5101682a2..aab28b802 100644 --- a/src/dev/arm/a9scu.cc +++ b/src/dev/arm/a9scu.cc @@ -43,7 +43,7 @@ #include "mem/packet_access.hh" #include "sim/system.hh" -A9SCU::A9SCU(Params *p) +A9SCU::A9SCU(const Params &p) : BasicPioDevice(p, 0x60) { } @@ -105,7 +105,7 @@ A9SCU::write(PacketPtr pkt) } A9SCU * -A9SCUParams::create() +A9SCUParams::create() const { - return new A9SCU(this); + return new A9SCU(*this); } diff --git a/src/dev/arm/a9scu.hh b/src/dev/arm/a9scu.hh index 5263b1cd3..0e6152064 100644 --- a/src/dev/arm/a9scu.hh +++ b/src/dev/arm/a9scu.hh @@ -60,7 +60,7 @@ class A9SCU : public BasicPioDevice * The constructor for RealView just registers itself with the MMU. * @param p params structure */ - A9SCU(Params *p); + A9SCU(const Params &p); /** * Handle a read to the device diff --git a/src/dev/arm/abstract_nvm.hh b/src/dev/arm/abstract_nvm.hh index dbcfa70b6..659fbd462 100644 --- a/src/dev/arm/abstract_nvm.hh +++ b/src/dev/arm/abstract_nvm.hh @@ -54,7 +54,7 @@ class AbstractNVM : public SimObject { public: - AbstractNVM(const AbstractNVMParams* p): SimObject(p) {}; + AbstractNVM(const AbstractNVMParams &p): SimObject(p) {}; virtual ~AbstractNVM() {}; /** diff --git a/src/dev/arm/amba_device.cc b/src/dev/arm/amba_device.cc index 4daf94327..72310b32e 100644 --- a/src/dev/arm/amba_device.cc +++ b/src/dev/arm/amba_device.cc @@ -48,23 +48,23 @@ const uint64_t AmbaVendor = ULL(0xb105f00d00000000); -AmbaPioDevice::AmbaPioDevice(const Params *p, Addr pio_size) - : BasicPioDevice(p, pio_size), ambaId(AmbaVendor | p->amba_id) +AmbaPioDevice::AmbaPioDevice(const Params &p, Addr pio_size) + : BasicPioDevice(p, pio_size), ambaId(AmbaVendor | p.amba_id) { } -AmbaIntDevice::AmbaIntDevice(const Params *p, Addr pio_size) +AmbaIntDevice::AmbaIntDevice(const Params &p, Addr pio_size) : AmbaPioDevice(p, pio_size), - interrupt(p->interrupt->get()), intDelay(p->int_delay) + interrupt(p.interrupt->get()), intDelay(p.int_delay) { } -AmbaDmaDevice::AmbaDmaDevice(const Params *p, Addr pio_size) - : DmaDevice(p), ambaId(AmbaVendor | p->amba_id), - pioAddr(p->pio_addr), pioSize(pio_size), - pioDelay(p->pio_latency), interrupt(p->interrupt->get()) +AmbaDmaDevice::AmbaDmaDevice(const Params &p, Addr pio_size) + : DmaDevice(p), ambaId(AmbaVendor | p.amba_id), + pioAddr(p.pio_addr), pioSize(pio_size), + pioDelay(p.pio_latency), interrupt(p.interrupt->get()) { } diff --git a/src/dev/arm/amba_device.hh b/src/dev/arm/amba_device.hh index 3d7e30c91..c1c46cf28 100644 --- a/src/dev/arm/amba_device.hh +++ b/src/dev/arm/amba_device.hh @@ -80,7 +80,7 @@ class AmbaPioDevice : public BasicPioDevice, public AmbaDevice public: typedef AmbaPioDeviceParams Params; - AmbaPioDevice(const Params *p, Addr pio_size); + AmbaPioDevice(const Params &p, Addr pio_size); }; class AmbaIntDevice : public AmbaPioDevice @@ -91,7 +91,7 @@ class AmbaIntDevice : public AmbaPioDevice public: typedef AmbaIntDeviceParams Params; - AmbaIntDevice(const Params *p, Addr pio_size); + AmbaIntDevice(const Params &p, Addr pio_size); }; class AmbaDmaDevice : public DmaDevice, public AmbaDevice @@ -105,7 +105,7 @@ class AmbaDmaDevice : public DmaDevice, public AmbaDevice public: typedef AmbaDmaDeviceParams Params; - AmbaDmaDevice(const Params *p, Addr pio_size = 0); + AmbaDmaDevice(const Params &p, Addr pio_size = 0); }; diff --git a/src/dev/arm/amba_fake.cc b/src/dev/arm/amba_fake.cc index 029ff459b..c38785426 100644 --- a/src/dev/arm/amba_fake.cc +++ b/src/dev/arm/amba_fake.cc @@ -45,7 +45,7 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -AmbaFake::AmbaFake(const Params *p) +AmbaFake::AmbaFake(const Params &p) : AmbaPioDevice(p, 0x1000) { } @@ -60,7 +60,7 @@ AmbaFake::read(PacketPtr pkt) DPRINTF(AMBA, " read register %#x\n", daddr); pkt->setLE(0); - if (!readId(pkt, ambaId, pioAddr) && !params()->ignore_access) + if (!readId(pkt, ambaId, pioAddr) && !params().ignore_access) panic("Tried to read AmbaFake %s at offset %#x that doesn't exist\n", name(), daddr); @@ -74,7 +74,7 @@ AmbaFake::write(PacketPtr pkt) Addr daddr = pkt->getAddr() - pioAddr; - if (!params()->ignore_access) + if (!params().ignore_access) panic("Tried to write AmbaFake %s at offset %#x that doesn't exist\n", name(), daddr); @@ -84,7 +84,7 @@ AmbaFake::write(PacketPtr pkt) AmbaFake * -AmbaFakeParams::create() +AmbaFakeParams::create() const { - return new AmbaFake(this); + return new AmbaFake(*this); } diff --git a/src/dev/arm/amba_fake.hh b/src/dev/arm/amba_fake.hh index 1a693acc7..059ed7a3d 100644 --- a/src/dev/arm/amba_fake.hh +++ b/src/dev/arm/amba_fake.hh @@ -55,13 +55,13 @@ class AmbaFake : public AmbaPioDevice { public: - typedef AmbaFakeParams Params; - const Params * + typedef AmbaFakeParams Params; + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - AmbaFake(const Params *p); + AmbaFake(const Params &p); virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); diff --git a/src/dev/arm/base_gic.cc b/src/dev/arm/base_gic.cc index 3181dca82..493ffa68f 100644 --- a/src/dev/arm/base_gic.cc +++ b/src/dev/arm/base_gic.cc @@ -44,11 +44,11 @@ #include "params/ArmSPI.hh" #include "params/BaseGic.hh" -BaseGic::BaseGic(const Params *p) +BaseGic::BaseGic(const Params &p) : PioDevice(p), - platform(p->platform) + platform(p.platform) { - RealView *const rv(dynamic_cast(p->platform)); + RealView *const rv = dynamic_cast(p.platform); // The platform keeps track of the GIC that is hooked up to the // system. Due to quirks in gem5's configuration system, the // platform can't take a GIC as parameter. Instead, we need to @@ -69,19 +69,19 @@ BaseGic::init() getSystem()->setGIC(this); } -const BaseGic::Params * +const BaseGic::Params & BaseGic::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } -ArmInterruptPinGen::ArmInterruptPinGen(const ArmInterruptPinParams *p) +ArmInterruptPinGen::ArmInterruptPinGen(const ArmInterruptPinParams &p) : SimObject(p) { } -ArmSPIGen::ArmSPIGen(const ArmSPIParams *p) - : ArmInterruptPinGen(p), pin(new ArmSPI(p->platform, p->num)) +ArmSPIGen::ArmSPIGen(const ArmSPIParams &p) + : ArmInterruptPinGen(p), pin(new ArmSPI(p.platform, p.num)) { } @@ -91,7 +91,7 @@ ArmSPIGen::get(ThreadContext* tc) return pin; } -ArmPPIGen::ArmPPIGen(const ArmPPIParams *p) +ArmPPIGen::ArmPPIGen(const ArmPPIParams &p) : ArmInterruptPinGen(p) { } @@ -109,8 +109,8 @@ ArmPPIGen::get(ThreadContext* tc) return pin_it->second; } else { // Generate PPI Pin - auto p = static_cast(_params); - ArmPPI *pin = new ArmPPI(p->platform, tc, p->num); + auto &p = static_cast(_params); + ArmPPI *pin = new ArmPPI(p.platform, tc, p.num); pins.insert({cid, pin}); @@ -196,13 +196,13 @@ ArmPPI::clear() } ArmSPIGen * -ArmSPIParams::create() +ArmSPIParams::create() const { - return new ArmSPIGen(this); + return new ArmSPIGen(*this); } ArmPPIGen * -ArmPPIParams::create() +ArmPPIParams::create() const { - return new ArmPPIGen(this); + return new ArmPPIGen(*this); } diff --git a/src/dev/arm/base_gic.hh b/src/dev/arm/base_gic.hh index f8fd8140f..1d8655078 100644 --- a/src/dev/arm/base_gic.hh +++ b/src/dev/arm/base_gic.hh @@ -65,11 +65,11 @@ class BaseGic : public PioDevice typedef BaseGicParams Params; enum class GicVersion { GIC_V2, GIC_V3, GIC_V4 }; - BaseGic(const Params *p); + BaseGic(const Params &p); virtual ~BaseGic(); void init() override; - const Params * params() const; + const Params ¶ms() const; /** * Post an interrupt from a device that is connected to the GIC. @@ -135,7 +135,7 @@ class BaseGicRegisters class ArmInterruptPinGen : public SimObject { public: - ArmInterruptPinGen(const ArmInterruptPinParams *p); + ArmInterruptPinGen(const ArmInterruptPinParams &p); virtual ArmInterruptPin* get(ThreadContext *tc = nullptr) = 0; }; @@ -148,7 +148,7 @@ class ArmInterruptPinGen : public SimObject class ArmSPIGen : public ArmInterruptPinGen { public: - ArmSPIGen(const ArmSPIParams *p); + ArmSPIGen(const ArmSPIParams &p); ArmInterruptPin* get(ThreadContext *tc = nullptr) override; protected: @@ -163,7 +163,7 @@ class ArmSPIGen : public ArmInterruptPinGen class ArmPPIGen : public ArmInterruptPinGen { public: - ArmPPIGen(const ArmPPIParams *p); + ArmPPIGen(const ArmPPIParams &p); ArmInterruptPin* get(ThreadContext* tc = nullptr) override; protected: diff --git a/src/dev/arm/display.cc b/src/dev/arm/display.cc index ca69a675e..1bfb16130 100644 --- a/src/dev/arm/display.cc +++ b/src/dev/arm/display.cc @@ -39,12 +39,12 @@ #include "params/Display.hh" -Display::Display(const DisplayParams *p) +Display::Display(const DisplayParams &p) : SimObject(p) {} Display * -DisplayParams::create() +DisplayParams::create() const { - return new Display(this); + return new Display(*this); } diff --git a/src/dev/arm/display.hh b/src/dev/arm/display.hh index 2e0c106c8..1359487aa 100644 --- a/src/dev/arm/display.hh +++ b/src/dev/arm/display.hh @@ -45,7 +45,7 @@ class DisplayParams; class Display : public SimObject { public: - Display(const DisplayParams *p); + Display(const DisplayParams &p); }; #endif // __DEV_ARM_DISPLAY_H__ diff --git a/src/dev/arm/energy_ctrl.cc b/src/dev/arm/energy_ctrl.cc index 15c29fe51..fadc36d91 100644 --- a/src/dev/arm/energy_ctrl.cc +++ b/src/dev/arm/energy_ctrl.cc @@ -44,16 +44,16 @@ #include "params/EnergyCtrl.hh" #include "sim/dvfs_handler.hh" -EnergyCtrl::EnergyCtrl(const Params *p) +EnergyCtrl::EnergyCtrl(const Params &p) : BasicPioDevice(p, PIO_NUM_FIELDS * 4), // each field is 32 bit - dvfsHandler(p->dvfs_handler), + dvfsHandler(p.dvfs_handler), domainID(0), domainIDIndexToRead(0), perfLevelAck(0), perfLevelToRead(0), updateAckEvent([this]{ updatePLAck(); }, name()) { - fatal_if(!p->dvfs_handler, "EnergyCtrl: Needs a DVFSHandler for a " + fatal_if(!p.dvfs_handler, "EnergyCtrl: Needs a DVFSHandler for a " "functioning system.\n"); } @@ -241,9 +241,10 @@ EnergyCtrl::unserialize(CheckpointIn &cp) } } -EnergyCtrl * EnergyCtrlParams::create() +EnergyCtrl * +EnergyCtrlParams::create() const { - return new EnergyCtrl(this); + return new EnergyCtrl(*this); } void diff --git a/src/dev/arm/energy_ctrl.hh b/src/dev/arm/energy_ctrl.hh index 5194c2438..c71ac537f 100644 --- a/src/dev/arm/energy_ctrl.hh +++ b/src/dev/arm/energy_ctrl.hh @@ -113,7 +113,7 @@ class EnergyCtrl : public BasicPioDevice }; typedef EnergyCtrlParams Params; - EnergyCtrl(const Params *p); + EnergyCtrl(const Params &p); /** * Read command sent to the device diff --git a/src/dev/arm/flash_device.cc b/src/dev/arm/flash_device.cc index d8f14691f..155881748 100644 --- a/src/dev/arm/flash_device.cc +++ b/src/dev/arm/flash_device.cc @@ -60,9 +60,9 @@ */ FlashDevice* -FlashDeviceParams::create() +FlashDeviceParams::create() const { - return new FlashDevice(this); + return new FlashDevice(*this); } @@ -70,17 +70,17 @@ FlashDeviceParams::create() * Flash Device constructor and destructor */ -FlashDevice::FlashDevice(const FlashDeviceParams* p): +FlashDevice::FlashDevice(const FlashDeviceParams &p): AbstractNVM(p), diskSize(0), - blockSize(p->blk_size), - pageSize(p->page_size), - GCActivePercentage(p->GC_active), - readLatency(p->read_lat), - writeLatency(p->write_lat), - eraseLatency(p->erase_lat), - dataDistribution(p->data_distribution), - numPlanes(p->num_planes), + blockSize(p.blk_size), + pageSize(p.page_size), + GCActivePercentage(p.GC_active), + readLatency(p.read_lat), + writeLatency(p.write_lat), + eraseLatency(p.erase_lat), + dataDistribution(p.data_distribution), + numPlanes(p.num_planes), pagesPerBlock(0), pagesPerDisk(0), blocksPerDisk(0), diff --git a/src/dev/arm/flash_device.hh b/src/dev/arm/flash_device.hh index a0ff83f64..b21acd061 100644 --- a/src/dev/arm/flash_device.hh +++ b/src/dev/arm/flash_device.hh @@ -56,7 +56,7 @@ class FlashDevice : public AbstractNVM public: /** Initialize functions*/ - FlashDevice(const FlashDeviceParams*); + FlashDevice(const FlashDeviceParams &); ~FlashDevice(); /** Checkpoint functions*/ diff --git a/src/dev/arm/fvp_base_pwr_ctrl.cc b/src/dev/arm/fvp_base_pwr_ctrl.cc index d6b6a5980..fae1f6d53 100644 --- a/src/dev/arm/fvp_base_pwr_ctrl.cc +++ b/src/dev/arm/fvp_base_pwr_ctrl.cc @@ -47,7 +47,7 @@ #include "params/FVPBasePwrCtrl.hh" #include "sim/system.hh" -FVPBasePwrCtrl::FVPBasePwrCtrl(FVPBasePwrCtrlParams *const params) +FVPBasePwrCtrl::FVPBasePwrCtrl(const FVPBasePwrCtrlParams ¶ms) : BasicPioDevice(params, 0x1000), regs(), system(*static_cast(sys)) @@ -312,7 +312,7 @@ FVPBasePwrCtrl::startCoreUp(ThreadContext *const tc) } FVPBasePwrCtrl * -FVPBasePwrCtrlParams::create() +FVPBasePwrCtrlParams::create() const { - return new FVPBasePwrCtrl(this); + return new FVPBasePwrCtrl(*this); } diff --git a/src/dev/arm/fvp_base_pwr_ctrl.hh b/src/dev/arm/fvp_base_pwr_ctrl.hh index 92c31980a..4b1bc4cec 100644 --- a/src/dev/arm/fvp_base_pwr_ctrl.hh +++ b/src/dev/arm/fvp_base_pwr_ctrl.hh @@ -55,7 +55,7 @@ class ThreadContext; class FVPBasePwrCtrl : public BasicPioDevice { public: - FVPBasePwrCtrl(FVPBasePwrCtrlParams *const params); + FVPBasePwrCtrl(const FVPBasePwrCtrlParams ¶ms); /** * Triggered by the ISA when a WFI instruction is executed and (1) there diff --git a/src/dev/arm/generic_timer.cc b/src/dev/arm/generic_timer.cc index 458a2eb7a..5d5eff451 100644 --- a/src/dev/arm/generic_timer.cc +++ b/src/dev/arm/generic_timer.cc @@ -52,12 +52,12 @@ using namespace ArmISA; -SystemCounter::SystemCounter(SystemCounterParams *const p) +SystemCounter::SystemCounter(const SystemCounterParams &p) : SimObject(p), _enabled(true), _value(0), _increment(1), - _freqTable(p->freqs), + _freqTable(p.freqs), _activeFreqEntry(0), _updateTick(0), _freqUpdateEvent([this]{ freqUpdateCallback(); }, name()), @@ -395,21 +395,21 @@ ArchTimer::drainResume() updateCounter(); } -GenericTimer::GenericTimer(GenericTimerParams *const p) +GenericTimer::GenericTimer(const GenericTimerParams &p) : SimObject(p), - systemCounter(*p->counter), - system(*p->system) + systemCounter(*p.counter), + system(*p.system) { - SystemCounter::validateCounterRef(p->counter); - fatal_if(!p->system, "GenericTimer::GenericTimer: No system specified, " + SystemCounter::validateCounterRef(p.counter); + fatal_if(!p.system, "GenericTimer::GenericTimer: No system specified, " "can't instantiate architected timers\n"); system.setGenericTimer(this); } -const GenericTimerParams * +const GenericTimerParams & GenericTimer::params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void @@ -467,7 +467,7 @@ void GenericTimer::createTimers(unsigned cpus) { assert(timers.size() < cpus); - auto p = static_cast(_params); + auto &p = static_cast(_params); const unsigned old_cpu_count(timers.size()); timers.resize(cpus); @@ -477,10 +477,10 @@ GenericTimer::createTimers(unsigned cpus) timers[i].reset( new CoreTimers(*this, system, i, - p->int_phys_s->get(tc), - p->int_phys_ns->get(tc), - p->int_virt->get(tc), - p->int_hyp->get(tc))); + p.int_phys_s->get(tc), + p.int_phys_ns->get(tc), + p.int_virt->get(tc), + p.int_hyp->get(tc))); } } @@ -727,7 +727,7 @@ GenericTimer::CoreTimers::CoreTimers(GenericTimer &_parent, ArmInterruptPin *_irqPhysS, ArmInterruptPin *_irqPhysNS, ArmInterruptPin *_irqVirt, ArmInterruptPin *_irqHyp) : parent(_parent), - cntfrq(parent.params()->cntfrq), + cntfrq(parent.params().cntfrq), threadContext(system.threads[cpu]), irqPhysS(_irqPhysS), irqPhysNS(_irqPhysNS), @@ -873,23 +873,23 @@ GenericTimerISA::readMiscReg(int reg) return value; } -GenericTimerFrame::GenericTimerFrame(GenericTimerFrameParams *const p) +GenericTimerFrame::GenericTimerFrame(const GenericTimerFrameParams &p) : PioDevice(p), - timerRange(RangeSize(p->cnt_base, ArmSystem::PageBytes)), + timerRange(RangeSize(p.cnt_base, ArmSystem::PageBytes)), addrRanges({timerRange}), - systemCounter(*p->counter), + systemCounter(*p.counter), physTimer(csprintf("%s.phys_timer", name()), - *this, systemCounter, p->int_phys->get()), + *this, systemCounter, p.int_phys->get()), virtTimer(csprintf("%s.virt_timer", name()), *this, systemCounter, - p->int_virt->get()), + p.int_virt->get()), accessBits(0x3f), system(*dynamic_cast(sys)) { - SystemCounter::validateCounterRef(p->counter); + SystemCounter::validateCounterRef(p.counter); // Expose optional CNTEL0Base register frame - if (p->cnt_el0_base != MaxAddr) { - timerEl0Range = RangeSize(p->cnt_el0_base, ArmSystem::PageBytes); + if (p.cnt_el0_base != MaxAddr) { + timerEl0Range = RangeSize(p.cnt_el0_base, ArmSystem::PageBytes); accessBitsEl0 = 0x303; addrRanges.push_back(timerEl0Range); } @@ -1244,18 +1244,18 @@ GenericTimerFrame::timerWrite(Addr addr, size_t size, uint64_t data, } } -GenericTimerMem::GenericTimerMem(GenericTimerMemParams *const p) +GenericTimerMem::GenericTimerMem(const GenericTimerMemParams &p) : PioDevice(p), - counterCtrlRange(RangeSize(p->cnt_control_base, ArmSystem::PageBytes)), - counterStatusRange(RangeSize(p->cnt_read_base, ArmSystem::PageBytes)), - timerCtrlRange(RangeSize(p->cnt_ctl_base, ArmSystem::PageBytes)), + counterCtrlRange(RangeSize(p.cnt_control_base, ArmSystem::PageBytes)), + counterStatusRange(RangeSize(p.cnt_read_base, ArmSystem::PageBytes)), + timerCtrlRange(RangeSize(p.cnt_ctl_base, ArmSystem::PageBytes)), cnttidr(0x0), addrRanges{counterCtrlRange, counterStatusRange, timerCtrlRange}, - systemCounter(*p->counter), - frames(p->frames), + systemCounter(*p.counter), + frames(p.frames), system(*dynamic_cast(sys)) { - SystemCounter::validateCounterRef(p->counter); + SystemCounter::validateCounterRef(p.counter); for (auto &range : addrRanges) GenericTimerMem::validateFrameRange(range); fatal_if(frames.size() > MAX_TIMER_FRAMES, @@ -1586,25 +1586,25 @@ GenericTimerMem::timerCtrlWrite(Addr addr, size_t size, uint64_t data, } SystemCounter * -SystemCounterParams::create() +SystemCounterParams::create() const { - return new SystemCounter(this); + return new SystemCounter(*this); } GenericTimer * -GenericTimerParams::create() +GenericTimerParams::create() const { - return new GenericTimer(this); + return new GenericTimer(*this); } GenericTimerFrame * -GenericTimerFrameParams::create() +GenericTimerFrameParams::create() const { - return new GenericTimerFrame(this); + return new GenericTimerFrame(*this); } GenericTimerMem * -GenericTimerMemParams::create() +GenericTimerMemParams::create() const { - return new GenericTimerMem(this); + return new GenericTimerMem(*this); } diff --git a/src/dev/arm/generic_timer.hh b/src/dev/arm/generic_timer.hh index e6308383f..b007ef155 100644 --- a/src/dev/arm/generic_timer.hh +++ b/src/dev/arm/generic_timer.hh @@ -100,7 +100,7 @@ class SystemCounter : public SimObject static constexpr size_t MAX_FREQ_ENTRIES = 1004; public: - SystemCounter(SystemCounterParams *const p); + SystemCounter(const SystemCounterParams &p); /// Validates a System Counter reference /// @param sys_cnt System counter reference to validate @@ -276,9 +276,9 @@ class ArchTimerKvm : public ArchTimer class GenericTimer : public SimObject { public: - const GenericTimerParams * params() const; + const GenericTimerParams ¶ms() const; - GenericTimer(GenericTimerParams *const p); + GenericTimer(const GenericTimerParams &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; @@ -392,7 +392,7 @@ class GenericTimerISA : public ArmISA::BaseISADevice class GenericTimerFrame : public PioDevice { public: - GenericTimerFrame(GenericTimerFrameParams *const p); + GenericTimerFrame(const GenericTimerFrameParams &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; @@ -496,7 +496,7 @@ class GenericTimerFrame : public PioDevice class GenericTimerMem : public PioDevice { public: - GenericTimerMem(GenericTimerMemParams *const p); + GenericTimerMem(const GenericTimerMemParams &p); /// Validates a Generic Timer register frame address range /// @param base_addr Range of the register frame diff --git a/src/dev/arm/gic_v2.cc b/src/dev/arm/gic_v2.cc index a3939d1c8..a1522aabd 100644 --- a/src/dev/arm/gic_v2.cc +++ b/src/dev/arm/gic_v2.cc @@ -59,18 +59,18 @@ const AddrRange GicV2::GICD_IPRIORITYR(0x400, 0x800); const AddrRange GicV2::GICD_ITARGETSR (0x800, 0xc00); const AddrRange GicV2::GICD_ICFGR (0xc00, 0xd00); -GicV2::GicV2(const Params *p) +GicV2::GicV2(const Params &p) : BaseGic(p), - gicdPIDR(p->gicd_pidr), - gicdIIDR(p->gicd_iidr), - giccIIDR(p->gicc_iidr), - distRange(RangeSize(p->dist_addr, DIST_SIZE)), - cpuRange(RangeSize(p->cpu_addr, p->cpu_size)), + gicdPIDR(p.gicd_pidr), + gicdIIDR(p.gicd_iidr), + giccIIDR(p.gicc_iidr), + distRange(RangeSize(p.dist_addr, DIST_SIZE)), + cpuRange(RangeSize(p.cpu_addr, p.cpu_size)), addrRanges{distRange, cpuRange}, - distPioDelay(p->dist_pio_delay), - cpuPioDelay(p->cpu_pio_delay), intLatency(p->int_latency), - enabled(false), haveGem5Extensions(p->gem5_extensions), - itLines(p->it_lines), + distPioDelay(p.dist_pio_delay), + cpuPioDelay(p.cpu_pio_delay), intLatency(p.int_latency), + enabled(false), haveGem5Extensions(p.gem5_extensions), + itLines(p.it_lines), intEnabled {}, pendingInt {}, activeInt {}, intPriority {}, intConfig {}, cpuTarget {}, cpuSgiPending {}, cpuSgiActive {}, @@ -1092,7 +1092,7 @@ GicV2::BankedRegs::unserialize(CheckpointIn &cp) } GicV2 * -GicV2Params::create() +GicV2Params::create() const { - return new GicV2(this); + return new GicV2(*this); } diff --git a/src/dev/arm/gic_v2.hh b/src/dev/arm/gic_v2.hh index d30a3283d..9f7f0745e 100644 --- a/src/dev/arm/gic_v2.hh +++ b/src/dev/arm/gic_v2.hh @@ -476,12 +476,12 @@ class GicV2 : public BaseGic, public BaseGicRegisters public: typedef GicV2Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - GicV2(const Params *p); + GicV2(const Params &p); ~GicV2(); DrainState drain() override; diff --git a/src/dev/arm/gic_v2m.cc b/src/dev/arm/gic_v2m.cc index 757eb1ed8..6bb5e67d8 100644 --- a/src/dev/arm/gic_v2m.cc +++ b/src/dev/arm/gic_v2m.cc @@ -65,19 +65,19 @@ #include "mem/packet_access.hh" Gicv2m * -Gicv2mParams::create() +Gicv2mParams::create() const { - return new Gicv2m(this); + return new Gicv2m(*this); } Gicv2mFrame * -Gicv2mFrameParams::create() +Gicv2mFrameParams::create() const { - return new Gicv2mFrame(this); + return new Gicv2mFrame(*this); } -Gicv2m::Gicv2m(const Params *p) - : PioDevice(p), pioDelay(p->pio_delay), frames(p->frames), gic(p->gic) +Gicv2m::Gicv2m(const Params &p) + : PioDevice(p), pioDelay(p.pio_delay), frames(p.frames), gic(p.gic) { // Assert SPI ranges start at 32 for (int i = 0; i < frames.size(); i++) { diff --git a/src/dev/arm/gic_v2m.hh b/src/dev/arm/gic_v2m.hh index 0a25aebc5..9001adc92 100644 --- a/src/dev/arm/gic_v2m.hh +++ b/src/dev/arm/gic_v2m.hh @@ -65,8 +65,8 @@ class Gicv2mFrame : public SimObject const unsigned int spi_len; typedef Gicv2mFrameParams Params; - Gicv2mFrame(const Params *p) : - SimObject(p), addr(p->addr), spi_base(p->spi_base), spi_len(p->spi_len) + Gicv2mFrame(const Params &p) : + SimObject(p), addr(p.addr), spi_base(p.spi_base), spi_len(p.spi_len) {} }; @@ -93,7 +93,7 @@ class Gicv2m : public PioDevice public: typedef Gicv2mParams Params; - Gicv2m(const Params *p); + Gicv2m(const Params &p); /** @{ */ /** Return the address ranges used by the Gicv2m diff --git a/src/dev/arm/gic_v3.cc b/src/dev/arm/gic_v3.cc index 596f170f2..36da51334 100644 --- a/src/dev/arm/gic_v3.cc +++ b/src/dev/arm/gic_v3.cc @@ -51,7 +51,7 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -Gicv3::Gicv3(const Params * p) +Gicv3::Gicv3(const Params &p) : BaseGic(p) { } @@ -59,25 +59,25 @@ Gicv3::Gicv3(const Params * p) void Gicv3::init() { - distributor = new Gicv3Distributor(this, params()->it_lines); + distributor = new Gicv3Distributor(this, params().it_lines); int threads = sys->threads.size(); redistributors.resize(threads, nullptr); cpuInterfaces.resize(threads, nullptr); - panic_if(threads > params()->cpu_max, + panic_if(threads > params().cpu_max, "Exceeding maximum number of PEs supported by GICv3: " - "using %u while maximum is %u.", threads, params()->cpu_max); + "using %u while maximum is %u.", threads, params().cpu_max); for (int i = 0; i < threads; i++) { redistributors[i] = new Gicv3Redistributor(this, i); cpuInterfaces[i] = new Gicv3CPUInterface(this, i); } - distRange = RangeSize(params()->dist_addr, + distRange = RangeSize(params().dist_addr, Gicv3Distributor::ADDR_RANGE_SIZE - 1); redistSize = redistributors[0]->addrRangeSize; - redistRange = RangeSize(params()->redist_addr, redistSize * threads - 1); + redistRange = RangeSize(params().redist_addr, redistSize * threads - 1); addrRanges = {distRange, redistRange}; @@ -88,7 +88,7 @@ Gicv3::init() cpuInterfaces[i]->init(); } - Gicv3Its *its = params()->its; + Gicv3Its *its = params().its; if (its) its->setGIC(this); @@ -108,7 +108,7 @@ Gicv3::read(PacketPtr pkt) const Addr daddr = addr - distRange.start(); panic_if(!distributor, "Distributor is null!"); resp = distributor->read(daddr, size, is_secure_access); - delay = params()->dist_pio_delay; + delay = params().dist_pio_delay; DPRINTF(GIC, "Gicv3::read(): (distributor) context_id %d register %#x " "size %d is_secure_access %d (value %#x)\n", pkt->req->contextId(), daddr, size, is_secure_access, resp); @@ -118,7 +118,7 @@ Gicv3::read(PacketPtr pkt) Gicv3Redistributor *redist = getRedistributorByAddr(addr); resp = redist->read(daddr, size, is_secure_access); - delay = params()->redist_pio_delay; + delay = params().redist_pio_delay; DPRINTF(GIC, "Gicv3::read(): (redistributor %d) context_id %d " "register %#x size %d is_secure_access %d (value %#x)\n", redist->processorNumber(), pkt->req->contextId(), daddr, size, @@ -148,7 +148,7 @@ Gicv3::write(PacketPtr pkt) "register %#x size %d is_secure_access %d value %#x\n", pkt->req->contextId(), daddr, size, is_secure_access, data); distributor->write(daddr, data, size, is_secure_access); - delay = params()->dist_pio_delay; + delay = params().dist_pio_delay; } else if (redistRange.contains(addr)) { Addr daddr = (addr - redistRange.start()) % redistSize; @@ -160,7 +160,7 @@ Gicv3::write(PacketPtr pkt) redist->write(daddr, data, size, is_secure_access); - delay = params()->redist_pio_delay; + delay = params().redist_pio_delay; } else { panic("Gicv3::write(): unknown address %#x\n", addr); } @@ -212,7 +212,7 @@ bool Gicv3::supportsVersion(GicVersion version) { return (version == GicVersion::GIC_V3) || - (version == GicVersion::GIC_V4 && params()->gicv4); + (version == GicVersion::GIC_V4 && params().gicv4); } void @@ -296,7 +296,7 @@ Gicv3::unserialize(CheckpointIn & cp) } Gicv3 * -Gicv3Params::create() +Gicv3Params::create() const { - return new Gicv3(this); + return new Gicv3(*this); } diff --git a/src/dev/arm/gic_v3.hh b/src/dev/arm/gic_v3.hh index ecda6b629..917092325 100644 --- a/src/dev/arm/gic_v3.hh +++ b/src/dev/arm/gic_v3.hh @@ -111,10 +111,10 @@ class Gicv3 : public BaseGic void init() override; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Tick read(PacketPtr pkt) override; @@ -128,7 +128,7 @@ class Gicv3 : public BaseGic public: - Gicv3(const Params * p); + Gicv3(const Params &p); void deassertInt(uint32_t cpu, ArmISA::InterruptTypes int_type); void deassertAll(uint32_t cpu); bool haveAsserted(uint32_t cpu) const; diff --git a/src/dev/arm/gic_v3_cpu_interface.cc b/src/dev/arm/gic_v3_cpu_interface.cc index 892e7479a..8c6f4817a 100644 --- a/src/dev/arm/gic_v3_cpu_interface.cc +++ b/src/dev/arm/gic_v3_cpu_interface.cc @@ -80,7 +80,7 @@ Gicv3CPUInterface::resetHppi(uint32_t intid) void Gicv3CPUInterface::setThreadContext(ThreadContext *tc) { - maintenanceInterrupt = gic->params()->maint_int->get(tc); + maintenanceInterrupt = gic->params().maint_int->get(tc); fatal_if(maintenanceInterrupt->num() >= redistributor->irqPending.size(), "Invalid maintenance interrupt number\n"); } diff --git a/src/dev/arm/gic_v3_its.cc b/src/dev/arm/gic_v3_its.cc index a3bb6726d..ed349ac00 100644 --- a/src/dev/arm/gic_v3_its.cc +++ b/src/dev/arm/gic_v3_its.cc @@ -771,15 +771,15 @@ ItsCommand::vsync(Yield &yield, CommandEntry &command) panic("ITS %s command unimplemented", __func__); } -Gicv3Its::Gicv3Its(const Gicv3ItsParams *params) - : BasicPioDevice(params, params->pio_size), +Gicv3Its::Gicv3Its(const Gicv3ItsParams ¶ms) + : BasicPioDevice(params, params.pio_size), dmaPort(name() + ".dma", *this), gitsControl(CTLR_QUIESCENT), - gitsTyper(params->gits_typer), + gitsTyper(params.gits_typer), gitsCbaser(0), gitsCreadr(0), gitsCwriter(0), gitsIidr(0), tableBases(NUM_BASER_REGS, 0), - requestorId(params->system->getRequestorId(this)), + requestorId(params.system->getRequestorId(this)), gic(nullptr), commandEvent([this] { checkCommandQueue(); }, name()), pendingCommands(false), @@ -1288,7 +1288,7 @@ Gicv3Its::moveAllPendingState( } Gicv3Its * -Gicv3ItsParams::create() +Gicv3ItsParams::create() const { - return new Gicv3Its(this); + return new Gicv3Its(*this); } diff --git a/src/dev/arm/gic_v3_its.hh b/src/dev/arm/gic_v3_its.hh index e3b8734b0..0262f4631 100644 --- a/src/dev/arm/gic_v3_its.hh +++ b/src/dev/arm/gic_v3_its.hh @@ -100,7 +100,7 @@ class Gicv3Its : public BasicPioDevice bool recvTimingResp(PacketPtr pkt); void recvReqRetry(); - Gicv3Its(const Gicv3ItsParams *params); + Gicv3Its(const Gicv3ItsParams ¶ms); void setGIC(Gicv3 *_gic); diff --git a/src/dev/arm/gic_v3_redistributor.cc b/src/dev/arm/gic_v3_redistributor.cc index 4a6fe49db..39a32e34c 100644 --- a/src/dev/arm/gic_v3_redistributor.cc +++ b/src/dev/arm/gic_v3_redistributor.cc @@ -73,7 +73,7 @@ Gicv3Redistributor::Gicv3Redistributor(Gicv3 * gic, uint32_t cpu_id) lpiConfigurationTablePtr(0), lpiIDBits(0), lpiPendingTablePtr(0), - addrRangeSize(gic->params()->gicv4 ? 0x40000 : 0x20000) + addrRangeSize(gic->params().gicv4 ? 0x40000 : 0x20000) { } diff --git a/src/dev/arm/gpu_nomali.cc b/src/dev/arm/gpu_nomali.cc index 318ef2062..1d95c5f5a 100644 --- a/src/dev/arm/gpu_nomali.cc +++ b/src/dev/arm/gpu_nomali.cc @@ -52,14 +52,14 @@ static const std::map gpuTypeMap{ { Enums::T760, NOMALI_GPU_T760 }, }; -NoMaliGpu::NoMaliGpu(const NoMaliGpuParams *p) +NoMaliGpu::NoMaliGpu(const NoMaliGpuParams &p) : PioDevice(p), - pioAddr(p->pio_addr), - platform(p->platform), + pioAddr(p.pio_addr), + platform(p.platform), interruptMap{ - { NOMALI_INT_GPU, p->int_gpu }, - { NOMALI_INT_JOB, p->int_job }, - { NOMALI_INT_MMU, p->int_mmu }, + { NOMALI_INT_GPU, p.int_gpu }, + { NOMALI_INT_JOB, p.int_job }, + { NOMALI_INT_MMU, p.int_mmu }, } { if (nomali_api_version() != NOMALI_API_VERSION) @@ -69,16 +69,16 @@ NoMaliGpu::NoMaliGpu(const NoMaliGpuParams *p) nomali_config_t cfg; memset(&cfg, 0, sizeof(cfg)); - const auto it_gpu(gpuTypeMap.find(p->gpu_type)); + const auto it_gpu(gpuTypeMap.find(p.gpu_type)); if (it_gpu == gpuTypeMap.end()) { fatal("Unrecognized GPU type: %s (%i)\n", - Enums::NoMaliGpuTypeStrings[p->gpu_type], p->gpu_type); + Enums::NoMaliGpuTypeStrings[p.gpu_type], p.gpu_type); } cfg.type = it_gpu->second; - cfg.ver_maj = p->ver_maj; - cfg.ver_min = p->ver_min; - cfg.ver_status = p->ver_status; + cfg.ver_maj = p.ver_maj; + cfg.ver_min = p.ver_min; + cfg.ver_status = p.ver_status; panicOnErr( nomali_create(&nomali, &cfg), @@ -321,45 +321,45 @@ NoMaliGpu::_reset(nomali_handle_t h, void *usr) } -CustomNoMaliGpu::CustomNoMaliGpu(const CustomNoMaliGpuParams *p) +CustomNoMaliGpu::CustomNoMaliGpu(const CustomNoMaliGpuParams &p) : NoMaliGpu(p), idRegs{ - { GPU_CONTROL_REG(GPU_ID), p->gpu_id }, - { GPU_CONTROL_REG(L2_FEATURES), p->l2_features }, - { GPU_CONTROL_REG(TILER_FEATURES), p->tiler_features }, - { GPU_CONTROL_REG(MEM_FEATURES), p->mem_features }, - { GPU_CONTROL_REG(MMU_FEATURES), p->mmu_features }, - { GPU_CONTROL_REG(AS_PRESENT), p->as_present }, - { GPU_CONTROL_REG(JS_PRESENT), p->js_present }, - - { GPU_CONTROL_REG(THREAD_MAX_THREADS), p->thread_max_threads }, + { GPU_CONTROL_REG(GPU_ID), p.gpu_id }, + { GPU_CONTROL_REG(L2_FEATURES), p.l2_features }, + { GPU_CONTROL_REG(TILER_FEATURES), p.tiler_features }, + { GPU_CONTROL_REG(MEM_FEATURES), p.mem_features }, + { GPU_CONTROL_REG(MMU_FEATURES), p.mmu_features }, + { GPU_CONTROL_REG(AS_PRESENT), p.as_present }, + { GPU_CONTROL_REG(JS_PRESENT), p.js_present }, + + { GPU_CONTROL_REG(THREAD_MAX_THREADS), p.thread_max_threads }, { GPU_CONTROL_REG(THREAD_MAX_WORKGROUP_SIZE), - p->thread_max_workgroup_size }, + p.thread_max_workgroup_size }, { GPU_CONTROL_REG(THREAD_MAX_BARRIER_SIZE), - p->thread_max_barrier_size }, - { GPU_CONTROL_REG(THREAD_FEATURES), p->thread_features }, - - { GPU_CONTROL_REG(SHADER_PRESENT_LO), bits(p->shader_present, 31, 0) }, - { GPU_CONTROL_REG(SHADER_PRESENT_HI), bits(p->shader_present, 63, 32) }, - { GPU_CONTROL_REG(TILER_PRESENT_LO), bits(p->tiler_present, 31, 0) }, - { GPU_CONTROL_REG(TILER_PRESENT_HI), bits(p->tiler_present, 63, 32) }, - { GPU_CONTROL_REG(L2_PRESENT_LO), bits(p->l2_present, 31, 0) }, - { GPU_CONTROL_REG(L2_PRESENT_HI), bits(p->l2_present, 63, 32) }, + p.thread_max_barrier_size }, + { GPU_CONTROL_REG(THREAD_FEATURES), p.thread_features }, + + { GPU_CONTROL_REG(SHADER_PRESENT_LO), bits(p.shader_present, 31, 0) }, + { GPU_CONTROL_REG(SHADER_PRESENT_HI), bits(p.shader_present, 63, 32) }, + { GPU_CONTROL_REG(TILER_PRESENT_LO), bits(p.tiler_present, 31, 0) }, + { GPU_CONTROL_REG(TILER_PRESENT_HI), bits(p.tiler_present, 63, 32) }, + { GPU_CONTROL_REG(L2_PRESENT_LO), bits(p.l2_present, 31, 0) }, + { GPU_CONTROL_REG(L2_PRESENT_HI), bits(p.l2_present, 63, 32) }, } { - fatal_if(p->texture_features.size() > 3, + fatal_if(p.texture_features.size() > 3, "Too many texture feature registers specified (%i)\n", - p->texture_features.size()); + p.texture_features.size()); - fatal_if(p->js_features.size() > 16, + fatal_if(p.js_features.size() > 16, "Too many job slot feature registers specified (%i)\n", - p->js_features.size()); + p.js_features.size()); - for (int i = 0; i < p->texture_features.size(); i++) - idRegs[TEXTURE_FEATURES_REG(i)] = p->texture_features[i]; + for (int i = 0; i < p.texture_features.size(); i++) + idRegs[TEXTURE_FEATURES_REG(i)] = p.texture_features[i]; - for (int i = 0; i < p->js_features.size(); i++) - idRegs[JS_FEATURES_REG(i)] = p->js_features[i]; + for (int i = 0; i < p.js_features.size(); i++) + idRegs[JS_FEATURES_REG(i)] = p.js_features[i]; } CustomNoMaliGpu::~CustomNoMaliGpu() @@ -378,13 +378,13 @@ CustomNoMaliGpu::onReset() NoMaliGpu * -NoMaliGpuParams::create() +NoMaliGpuParams::create() const { - return new NoMaliGpu(this); + return new NoMaliGpu(*this); } CustomNoMaliGpu * -CustomNoMaliGpuParams::create() +CustomNoMaliGpuParams::create() const { - return new CustomNoMaliGpu(this); + return new CustomNoMaliGpu(*this); } diff --git a/src/dev/arm/gpu_nomali.hh b/src/dev/arm/gpu_nomali.hh index 8c3ac265d..a096edbee 100644 --- a/src/dev/arm/gpu_nomali.hh +++ b/src/dev/arm/gpu_nomali.hh @@ -50,7 +50,7 @@ class RealView; class NoMaliGpu : public PioDevice { public: - NoMaliGpu(const NoMaliGpuParams *p); + NoMaliGpu(const NoMaliGpuParams &p); virtual ~NoMaliGpu(); void init() override; @@ -188,7 +188,7 @@ class NoMaliGpu : public PioDevice class CustomNoMaliGpu : public NoMaliGpu { public: - CustomNoMaliGpu(const CustomNoMaliGpuParams *p); + CustomNoMaliGpu(const CustomNoMaliGpuParams &p); virtual ~CustomNoMaliGpu(); protected: diff --git a/src/dev/arm/hdlcd.cc b/src/dev/arm/hdlcd.cc index cf5995a84..6c218662a 100644 --- a/src/dev/arm/hdlcd.cc +++ b/src/dev/arm/hdlcd.cc @@ -54,16 +54,16 @@ using std::vector; // initialize hdlcd registers -HDLcd::HDLcd(const HDLcdParams *p) +HDLcd::HDLcd(const HDLcdParams &p) : AmbaDmaDevice(p, 0xFFFF), // Parameters - vnc(p->vnc), - workaroundSwapRB(p->workaround_swap_rb), - workaroundDmaLineCount(p->workaround_dma_line_count), + vnc(p.vnc), + workaroundSwapRB(p.workaround_swap_rb), + workaroundDmaLineCount(p.workaround_dma_line_count), addrRanges{RangeSize(pioAddr, pioSize)}, - enableCapture(p->enable_capture), - pixelBufferSize(p->pixel_buffer_size), - virtRefreshRate(p->virt_refresh_rate), + enableCapture(p.enable_capture), + pixelBufferSize(p.pixel_buffer_size), + virtRefreshRate(p.virt_refresh_rate), // Registers version(VERSION_RESETV), @@ -83,8 +83,8 @@ HDLcd::HDLcd(const HDLcdParams *p) virtRefreshEvent([this]{ virtRefresh(); }, name()), // Other - imgFormat(p->frame_format), pic(NULL), conv(PixelConverter::rgba8888_le), - pixelPump(*this, *p->pxl_clk, p->pixel_chunk) + imgFormat(p.frame_format), pic(NULL), conv(PixelConverter::rgba8888_le), + pixelPump(*this, *p.pxl_clk, p.pixel_chunk) { if (vnc) vnc->setFrameBuffer(&pixelPump.fb); @@ -692,7 +692,7 @@ HDLcd::PixelPump::dumpSettings() HDLcd * -HDLcdParams::create() +HDLcdParams::create() const { - return new HDLcd(this); + return new HDLcd(*this); } diff --git a/src/dev/arm/hdlcd.hh b/src/dev/arm/hdlcd.hh index 2ffe5fdb2..c41100e08 100644 --- a/src/dev/arm/hdlcd.hh +++ b/src/dev/arm/hdlcd.hh @@ -90,7 +90,7 @@ class HDLcdPixelPump; class HDLcd: public AmbaDmaDevice { public: - HDLcd(const HDLcdParams *p); + HDLcd(const HDLcdParams &p); ~HDLcd(); void regStats() override; diff --git a/src/dev/arm/kmi.cc b/src/dev/arm/kmi.cc index 517a79ffe..499a39ea5 100644 --- a/src/dev/arm/kmi.cc +++ b/src/dev/arm/kmi.cc @@ -48,10 +48,10 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -Pl050::Pl050(const Pl050Params *p) +Pl050::Pl050(const Pl050Params &p) : AmbaIntDevice(p, 0x1000), control(0), status(0x43), clkdiv(0), rawInterrupts(0), - ps2(p->ps2) + ps2(p.ps2) { ps2->hostRegDataAvailable([this]() { this->updateRxInt(); }); } @@ -221,7 +221,7 @@ Pl050::unserialize(CheckpointIn &cp) } Pl050 * -Pl050Params::create() +Pl050Params::create() const { - return new Pl050(this); + return new Pl050(*this); } diff --git a/src/dev/arm/kmi.hh b/src/dev/arm/kmi.hh index b38fc968c..2d83c138d 100644 --- a/src/dev/arm/kmi.hh +++ b/src/dev/arm/kmi.hh @@ -126,7 +126,7 @@ class Pl050 : public AmbaIntDevice PS2Device *ps2; public: - Pl050(const Pl050Params *p); + Pl050(const Pl050Params &p); Tick read(PacketPtr pkt) override; Tick write(PacketPtr pkt) override; diff --git a/src/dev/arm/pci_host.cc b/src/dev/arm/pci_host.cc index 21f119b26..1bb895957 100644 --- a/src/dev/arm/pci_host.cc +++ b/src/dev/arm/pci_host.cc @@ -39,10 +39,10 @@ #include "params/GenericArmPciHost.hh" -GenericArmPciHost::GenericArmPciHost(const GenericArmPciHostParams *p) +GenericArmPciHost::GenericArmPciHost(const GenericArmPciHostParams &p) : GenericPciHost(p), - intPolicy(p->int_policy), intBase(p->int_base), - intCount(p->int_count) + intPolicy(p.int_policy), intBase(p.int_base), + intCount(p.int_count) { } @@ -71,7 +71,7 @@ GenericArmPciHost::mapPciInterrupt(const PciBusAddr &addr, PciIntPin pin) const GenericArmPciHost * -GenericArmPciHostParams::create() +GenericArmPciHostParams::create() const { - return new GenericArmPciHost(this); + return new GenericArmPciHost(*this); } diff --git a/src/dev/arm/pci_host.hh b/src/dev/arm/pci_host.hh index 9c061b4ba..bf48b3d87 100644 --- a/src/dev/arm/pci_host.hh +++ b/src/dev/arm/pci_host.hh @@ -48,7 +48,7 @@ class GenericArmPciHost : public GenericPciHost { public: - GenericArmPciHost(const GenericArmPciHostParams *p); + GenericArmPciHost(const GenericArmPciHostParams &p); virtual ~GenericArmPciHost() {} protected: diff --git a/src/dev/arm/pl011.cc b/src/dev/arm/pl011.cc index 9b83cf8c7..f39d11116 100755 --- a/src/dev/arm/pl011.cc +++ b/src/dev/arm/pl011.cc @@ -50,13 +50,13 @@ #include "params/Pl011.hh" #include "sim/sim_exit.hh" -Pl011::Pl011(const Pl011Params *p) +Pl011::Pl011(const Pl011Params &p) : Uart(p, 0x1000), intEvent([this]{ generateInterrupt(); }, name()), control(0x300), fbrd(0), ibrd(0), lcrh(0), ifls(0x12), imsc(0), rawInt(0), - endOnEOT(p->end_on_eot), interrupt(p->interrupt->get()), - intDelay(p->int_delay) + endOnEOT(p.end_on_eot), interrupt(p.interrupt->get()), + intDelay(p.int_delay) { } @@ -327,7 +327,7 @@ Pl011::unserialize(CheckpointIn &cp) } Pl011 * -Pl011Params::create() +Pl011Params::create() const { - return new Pl011(this); + return new Pl011(*this); } diff --git a/src/dev/arm/pl011.hh b/src/dev/arm/pl011.hh index 0ecbe1300..1e370f012 100755 --- a/src/dev/arm/pl011.hh +++ b/src/dev/arm/pl011.hh @@ -55,7 +55,7 @@ struct Pl011Params; class Pl011 : public Uart, public AmbaDevice { public: - Pl011(const Pl011Params *p); + Pl011(const Pl011Params &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; diff --git a/src/dev/arm/pl111.cc b/src/dev/arm/pl111.cc index f36b33f17..16e2990a2 100644 --- a/src/dev/arm/pl111.cc +++ b/src/dev/arm/pl111.cc @@ -53,16 +53,16 @@ using std::vector; // initialize clcd registers -Pl111::Pl111(const Params *p) +Pl111::Pl111(const Params &p) : AmbaDmaDevice(p), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0), lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0), lcdRis(0), lcdMis(0), clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0), clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0), clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0), - pixelClock(p->pixel_clock), + pixelClock(p.pixel_clock), converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight), - vnc(p->vnc), bmp(&fb), pic(NULL), + vnc(p.vnc), bmp(&fb), pic(NULL), width(LcdMaxWidth), height(LcdMaxHeight), bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0), waterMark(0), dmaPendingNum(0), @@ -71,7 +71,7 @@ Pl111::Pl111(const Params *p) dmaDoneEventAll(maxOutstandingDma, this), dmaDoneEventFree(maxOutstandingDma), intEvent([this]{ generateInterrupt(); }, name()), - enableCapture(p->enable_capture) + enableCapture(p.enable_capture) { pioSize = 0xFFFF; @@ -744,9 +744,9 @@ Pl111::getAddrRanges() const } Pl111 * -Pl111Params::create() +Pl111Params::create() const { - return new Pl111(this); + return new Pl111(*this); } diff --git a/src/dev/arm/pl111.hh b/src/dev/arm/pl111.hh index dffbba26b..67cfed047 100644 --- a/src/dev/arm/pl111.hh +++ b/src/dev/arm/pl111.hh @@ -358,12 +358,12 @@ class Pl111: public AmbaDmaDevice public: typedef Pl111Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Pl111(const Params *p); + Pl111(const Params &p); ~Pl111(); Tick read(PacketPtr pkt) override; diff --git a/src/dev/arm/realview.cc b/src/dev/arm/realview.cc index 85949d4ad..343f41623 100644 --- a/src/dev/arm/realview.cc +++ b/src/dev/arm/realview.cc @@ -53,8 +53,8 @@ #include "sim/system.hh" -RealView::RealView(const Params *p) - : Platform(p), system(p->system), gic(nullptr) +RealView::RealView(const Params &p) + : Platform(p), system(p.system), gic(nullptr) {} void @@ -84,7 +84,7 @@ RealView::clearPciInt(int line) } RealView * -RealViewParams::create() +RealViewParams::create() const { - return new RealView(this); + return new RealView(*this); } diff --git a/src/dev/arm/realview.hh b/src/dev/arm/realview.hh index 236b83d1e..460c37902 100644 --- a/src/dev/arm/realview.hh +++ b/src/dev/arm/realview.hh @@ -64,9 +64,9 @@ class RealView : public Platform public: typedef RealViewParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** @@ -75,7 +75,7 @@ class RealView : public Platform * @param s system the object belongs to * @param intctrl pointer to the interrupt controller */ - RealView(const Params *p); + RealView(const Params &p); /** Give platform a pointer to interrupt controller */ void setGic(BaseGic *_gic) { gic = _gic; } diff --git a/src/dev/arm/rtc_pl031.cc b/src/dev/arm/rtc_pl031.cc index 3ff478f73..963c126bd 100644 --- a/src/dev/arm/rtc_pl031.cc +++ b/src/dev/arm/rtc_pl031.cc @@ -46,12 +46,14 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -PL031::PL031(Params *p) - : AmbaIntDevice(p, 0x1000), timeVal(mkutctime(&p->time)), - lastWrittenTick(0), loadVal(0), matchVal(0), +PL031::PL031(const Params &p) + : AmbaIntDevice(p, 0x1000), lastWrittenTick(0), loadVal(0), matchVal(0), rawInt(false), maskInt(false), pendingInt(false), matchEvent([this]{ counterMatch(); }, name()) { + // Make a temporary copy so mkutctime can modify it. + struct tm local_time = p.time; + timeVal = mkutctime(&local_time); } @@ -239,7 +241,7 @@ PL031::unserialize(CheckpointIn &cp) PL031 * -PL031Params::create() +PL031Params::create() const { - return new PL031(this); + return new PL031(*this); } diff --git a/src/dev/arm/rtc_pl031.hh b/src/dev/arm/rtc_pl031.hh index 98fe68a53..97a02e875 100644 --- a/src/dev/arm/rtc_pl031.hh +++ b/src/dev/arm/rtc_pl031.hh @@ -98,16 +98,16 @@ class PL031 : public AmbaIntDevice public: typedef PL031Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * The constructor for RealView just registers itself with the MMU. * @param p params structure */ - PL031(Params *p); + PL031(const Params &p); /** * Handle a read to the device diff --git a/src/dev/arm/rv_ctrl.cc b/src/dev/arm/rv_ctrl.cc index 1ec93ab95..63d2e831e 100644 --- a/src/dev/arm/rv_ctrl.cc +++ b/src/dev/arm/rv_ctrl.cc @@ -45,7 +45,7 @@ #include "sim/system.hh" #include "sim/voltage_domain.hh" -RealViewCtrl::RealViewCtrl(Params *p) +RealViewCtrl::RealViewCtrl(const Params &p) : BasicPioDevice(p, 0xD4), flags(0), scData(0) { } @@ -59,10 +59,10 @@ RealViewCtrl::read(PacketPtr pkt) switch(daddr) { case ProcId0: - pkt->setLE(params()->proc_id0); + pkt->setLE(params().proc_id0); break; case ProcId1: - pkt->setLE(params()->proc_id1); + pkt->setLE(params().proc_id1); break; case Clock24: Tick clk; @@ -102,7 +102,7 @@ RealViewCtrl::read(PacketPtr pkt) pkt->setLE(flags); break; case IdReg: - pkt->setLE(params()->idreg); + pkt->setLE(params().idreg); break; case CfgStat: pkt->setLE(1); @@ -234,17 +234,17 @@ RealViewCtrl::registerDevice(DeviceFunc func, uint8_t site, uint8_t pos, } -RealViewOsc::RealViewOsc(RealViewOscParams *p) - : ClockDomain(p, p->voltage_domain), - RealViewCtrl::Device(*p->parent, RealViewCtrl::FUNC_OSC, - p->site, p->position, p->dcc, p->device) +RealViewOsc::RealViewOsc(const RealViewOscParams &p) + : ClockDomain(p, p.voltage_domain), + RealViewCtrl::Device(*p.parent, RealViewCtrl::FUNC_OSC, + p.site, p.position, p.dcc, p.device) { - if (SimClock::Float::s / p->freq > UINT32_MAX) { + if (SimClock::Float::s / p.freq > UINT32_MAX) { fatal("Oscillator frequency out of range: %f\n", - SimClock::Float::s / p->freq / 1E6); + SimClock::Float::s / p.freq / 1E6); } - _clockPeriod = p->freq; + _clockPeriod = p.freq; } void @@ -315,19 +315,19 @@ RealViewTemperatureSensor::read() const } RealViewCtrl * -RealViewCtrlParams::create() +RealViewCtrlParams::create() const { - return new RealViewCtrl(this); + return new RealViewCtrl(*this); } RealViewOsc * -RealViewOscParams::create() +RealViewOscParams::create() const { - return new RealViewOsc(this); + return new RealViewOsc(*this); } RealViewTemperatureSensor * -RealViewTemperatureSensorParams::create() +RealViewTemperatureSensorParams::create() const { - return new RealViewTemperatureSensor(this); + return new RealViewTemperatureSensor(*this); } diff --git a/src/dev/arm/rv_ctrl.hh b/src/dev/arm/rv_ctrl.hh index b226b4383..23fb2c94f 100644 --- a/src/dev/arm/rv_ctrl.hh +++ b/src/dev/arm/rv_ctrl.hh @@ -154,16 +154,16 @@ class RealViewCtrl : public BasicPioDevice public: typedef RealViewCtrlParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * The constructor for RealView just registers itself with the MMU. * @param p params structure */ - RealViewCtrl(Params *p); + RealViewCtrl(const Params &p); /** * Handle a read to the device @@ -202,7 +202,7 @@ class RealViewOsc : public ClockDomain, RealViewCtrl::Device { public: - RealViewOsc(RealViewOscParams *p); + RealViewOsc(const RealViewOscParams &p); virtual ~RealViewOsc() {}; void startup() override; @@ -228,11 +228,11 @@ class RealViewTemperatureSensor : public SimObject, RealViewCtrl::Device { public: - RealViewTemperatureSensor(RealViewTemperatureSensorParams *p) + RealViewTemperatureSensor(const RealViewTemperatureSensorParams &p) : SimObject(p), - RealViewCtrl::Device(*p->parent, RealViewCtrl::FUNC_TEMP, - p->site, p->position, p->dcc, p->device), - system(p->system) + RealViewCtrl::Device(*p.parent, RealViewCtrl::FUNC_TEMP, + p.site, p.position, p.dcc, p.device), + system(p.system) {} virtual ~RealViewTemperatureSensor() {}; diff --git a/src/dev/arm/smmu_v3.cc b/src/dev/arm/smmu_v3.cc index f9bdc277c..18870a260 100644 --- a/src/dev/arm/smmu_v3.cc +++ b/src/dev/arm/smmu_v3.cc @@ -51,49 +51,49 @@ #include "mem/packet_access.hh" #include "sim/system.hh" -SMMUv3::SMMUv3(SMMUv3Params *params) : +SMMUv3::SMMUv3(const SMMUv3Params ¶ms) : ClockedObject(params), - system(*params->system), - requestorId(params->system->getRequestorId(this)), + system(*params.system), + requestorId(params.system->getRequestorId(this)), requestPort(name() + ".request", *this), tableWalkPort(name() + ".walker", *this), - controlPort(name() + ".control", *this, params->reg_map), - tlb(params->tlb_entries, params->tlb_assoc, params->tlb_policy), - configCache(params->cfg_entries, params->cfg_assoc, params->cfg_policy), - ipaCache(params->ipa_entries, params->ipa_assoc, params->ipa_policy), - walkCache({ { params->walk_S1L0, params->walk_S1L1, - params->walk_S1L2, params->walk_S1L3, - params->walk_S2L0, params->walk_S2L1, - params->walk_S2L2, params->walk_S2L3 } }, - params->walk_assoc, params->walk_policy), - tlbEnable(params->tlb_enable), - configCacheEnable(params->cfg_enable), - ipaCacheEnable(params->ipa_enable), - walkCacheEnable(params->walk_enable), + controlPort(name() + ".control", *this, params.reg_map), + tlb(params.tlb_entries, params.tlb_assoc, params.tlb_policy), + configCache(params.cfg_entries, params.cfg_assoc, params.cfg_policy), + ipaCache(params.ipa_entries, params.ipa_assoc, params.ipa_policy), + walkCache({ { params.walk_S1L0, params.walk_S1L1, + params.walk_S1L2, params.walk_S1L3, + params.walk_S2L0, params.walk_S2L1, + params.walk_S2L2, params.walk_S2L3 } }, + params.walk_assoc, params.walk_policy), + tlbEnable(params.tlb_enable), + configCacheEnable(params.cfg_enable), + ipaCacheEnable(params.ipa_enable), + walkCacheEnable(params.walk_enable), tableWalkPortEnable(false), - walkCacheNonfinalEnable(params->wc_nonfinal_enable), - walkCacheS1Levels(params->wc_s1_levels), - walkCacheS2Levels(params->wc_s2_levels), - requestPortWidth(params->request_port_width), - tlbSem(params->tlb_slots), + walkCacheNonfinalEnable(params.wc_nonfinal_enable), + walkCacheS1Levels(params.wc_s1_levels), + walkCacheS2Levels(params.wc_s2_levels), + requestPortWidth(params.request_port_width), + tlbSem(params.tlb_slots), ifcSmmuSem(1), smmuIfcSem(1), - configSem(params->cfg_slots), - ipaSem(params->ipa_slots), - walkSem(params->walk_slots), + configSem(params.cfg_slots), + ipaSem(params.ipa_slots), + walkSem(params.walk_slots), requestPortSem(1), - transSem(params->xlate_slots), - ptwSem(params->ptw_slots), + transSem(params.xlate_slots), + ptwSem(params.ptw_slots), cycleSem(1), - tlbLat(params->tlb_lat), - ifcSmmuLat(params->ifc_smmu_lat), - smmuIfcLat(params->smmu_ifc_lat), - configLat(params->cfg_lat), - ipaLat(params->ipa_lat), - walkLat(params->walk_lat), - deviceInterfaces(params->device_interfaces), + tlbLat(params.tlb_lat), + ifcSmmuLat(params.ifc_smmu_lat), + smmuIfcLat(params.smmu_ifc_lat), + configLat(params.cfg_lat), + ipaLat(params.ipa_lat), + walkLat(params.walk_lat), + deviceInterfaces(params.device_interfaces), commandExecutor(name() + ".cmd_exec", *this), - regsMap(params->reg_map), + regsMap(params.reg_map), processCommandsEvent(this) { fatal_if(regsMap.size() != SMMU_REG_SIZE, @@ -104,14 +104,14 @@ SMMUv3::SMMUv3(SMMUv3Params *params) : memset(®s, 0, sizeof(regs)); // Setup RO ID registers - regs.idr0 = params->smmu_idr0; - regs.idr1 = params->smmu_idr1; - regs.idr2 = params->smmu_idr2; - regs.idr3 = params->smmu_idr3; - regs.idr4 = params->smmu_idr4; - regs.idr5 = params->smmu_idr5; - regs.iidr = params->smmu_iidr; - regs.aidr = params->smmu_aidr; + regs.idr0 = params.smmu_idr0; + regs.idr1 = params.smmu_idr1; + regs.idr2 = params.smmu_idr2; + regs.idr3 = params.smmu_idr3; + regs.idr4 = params.smmu_idr4; + regs.idr5 = params.smmu_idr5; + regs.iidr = params.smmu_iidr; + regs.aidr = params.smmu_aidr; // TODO: At the moment it possible to set the ID registers to hold // any possible value. It would be nice to have a sanity check here @@ -828,7 +828,7 @@ SMMUv3::getPort(const std::string &name, PortID id) } SMMUv3* -SMMUv3Params::create() +SMMUv3Params::create() const { - return new SMMUv3(this); + return new SMMUv3(*this); } diff --git a/src/dev/arm/smmu_v3.hh b/src/dev/arm/smmu_v3.hh index 6b3f3982b..7601e15d8 100644 --- a/src/dev/arm/smmu_v3.hh +++ b/src/dev/arm/smmu_v3.hh @@ -165,7 +165,7 @@ class SMMUv3 : public ClockedObject const PageTableOps *getPageTableOps(uint8_t trans_granule); public: - SMMUv3(SMMUv3Params *p); + SMMUv3(const SMMUv3Params &p); virtual ~SMMUv3() {} virtual void init() override; diff --git a/src/dev/arm/smmu_v3_deviceifc.cc b/src/dev/arm/smmu_v3_deviceifc.cc index 751605556..985ca1789 100644 --- a/src/dev/arm/smmu_v3_deviceifc.cc +++ b/src/dev/arm/smmu_v3_deviceifc.cc @@ -43,33 +43,33 @@ #include "dev/arm/smmu_v3_transl.hh" SMMUv3DeviceInterface::SMMUv3DeviceInterface( - const SMMUv3DeviceInterfaceParams *p) : + const SMMUv3DeviceInterfaceParams &p) : ClockedObject(p), smmu(nullptr), - microTLB(new SMMUTLB(p->utlb_entries, - p->utlb_assoc, - p->utlb_policy)), - mainTLB(new SMMUTLB(p->tlb_entries, - p->tlb_assoc, - p->tlb_policy)), - microTLBEnable(p->utlb_enable), - mainTLBEnable(p->tlb_enable), + microTLB(new SMMUTLB(p.utlb_entries, + p.utlb_assoc, + p.utlb_policy)), + mainTLB(new SMMUTLB(p.tlb_entries, + p.tlb_assoc, + p.tlb_policy)), + microTLBEnable(p.utlb_enable), + mainTLBEnable(p.tlb_enable), devicePortSem(1), - microTLBSem(p->utlb_slots), - mainTLBSem(p->tlb_slots), - microTLBLat(p->utlb_lat), - mainTLBLat(p->tlb_lat), + microTLBSem(p.utlb_slots), + mainTLBSem(p.tlb_slots), + microTLBLat(p.utlb_lat), + mainTLBLat(p.tlb_lat), devicePort(new SMMUDevicePort(csprintf("%s.device_port", name()), *this)), atsDevicePort(name() + ".atsDevicePort", *this), atsMemPort(name() + ".atsMemPort", *this), - portWidth(p->port_width), - wrBufSlotsRemaining(p->wrbuf_slots), - xlateSlotsRemaining(p->xlate_slots), + portWidth(p.port_width), + wrBufSlotsRemaining(p.wrbuf_slots), + xlateSlotsRemaining(p.xlate_slots), pendingMemAccesses(0), - prefetchEnable(p->prefetch_enable), + prefetchEnable(p.prefetch_enable), prefetchReserveLastWay( - p->prefetch_reserve_last_way), + p.prefetch_reserve_last_way), deviceNeedsRetry(false), atsDeviceNeedsRetry(false), sendDeviceRetryEvent(*this), @@ -254,14 +254,14 @@ DrainState SMMUv3DeviceInterface::drain() { // Wait until all SMMU translations are completed - if (xlateSlotsRemaining < params()->xlate_slots) { + if (xlateSlotsRemaining < params().xlate_slots) { return DrainState::Draining; } return DrainState::Drained; } SMMUv3DeviceInterface* -SMMUv3DeviceInterfaceParams::create() +SMMUv3DeviceInterfaceParams::create() const { - return new SMMUv3DeviceInterface(this); + return new SMMUv3DeviceInterface(*this); } diff --git a/src/dev/arm/smmu_v3_deviceifc.hh b/src/dev/arm/smmu_v3_deviceifc.hh index 64dcc5798..c324a6aa6 100644 --- a/src/dev/arm/smmu_v3_deviceifc.hh +++ b/src/dev/arm/smmu_v3_deviceifc.hh @@ -118,7 +118,7 @@ class SMMUv3DeviceInterface : public ClockedObject Port& getPort(const std::string &name, PortID id) override; public: - SMMUv3DeviceInterface(const SMMUv3DeviceInterfaceParams *p); + SMMUv3DeviceInterface(const SMMUv3DeviceInterfaceParams &p); ~SMMUv3DeviceInterface() { @@ -126,10 +126,10 @@ class SMMUv3DeviceInterface : public ClockedObject delete mainTLB; } - const SMMUv3DeviceInterfaceParams * + const SMMUv3DeviceInterfaceParams & params() const { - return static_cast(_params); + return static_cast(_params); } DrainState drain() override; diff --git a/src/dev/arm/timer_a9global.cc b/src/dev/arm/timer_a9global.cc index 9fea813d0..ddae9dfcb 100644 --- a/src/dev/arm/timer_a9global.cc +++ b/src/dev/arm/timer_a9global.cc @@ -46,9 +46,9 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -A9GlobalTimer::A9GlobalTimer(Params *p) - : BasicPioDevice(p, 0x1C), gic(p->gic), - global_timer(name() + ".globaltimer", this, p->int_num) +A9GlobalTimer::A9GlobalTimer(const Params &p) + : BasicPioDevice(p, 0x1C), gic(p.gic), + global_timer(name() + ".globaltimer", this, p.int_num) { } @@ -310,7 +310,7 @@ A9GlobalTimer::unserialize(CheckpointIn &cp) } A9GlobalTimer * -A9GlobalTimerParams::create() +A9GlobalTimerParams::create() const { - return new A9GlobalTimer(this); + return new A9GlobalTimer(*this); } diff --git a/src/dev/arm/timer_a9global.hh b/src/dev/arm/timer_a9global.hh index 31cb640ee..aea02cb57 100644 --- a/src/dev/arm/timer_a9global.hh +++ b/src/dev/arm/timer_a9global.hh @@ -143,16 +143,16 @@ class A9GlobalTimer : public BasicPioDevice public: typedef A9GlobalTimerParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * The constructor for RealView just registers itself with the MMU. * @param p params structure */ - A9GlobalTimer(Params *p); + A9GlobalTimer(const Params &p); /** * Handle a read to the device diff --git a/src/dev/arm/timer_cpulocal.cc b/src/dev/arm/timer_cpulocal.cc index 5ba0b16ba..0ae7777a2 100644 --- a/src/dev/arm/timer_cpulocal.cc +++ b/src/dev/arm/timer_cpulocal.cc @@ -46,7 +46,7 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -CpuLocalTimer::CpuLocalTimer(Params *p) +CpuLocalTimer::CpuLocalTimer(const Params &p) : BasicPioDevice(p, 0x38) { } @@ -54,7 +54,7 @@ CpuLocalTimer::CpuLocalTimer(Params *p) void CpuLocalTimer::init() { - auto p = params(); + const auto &p = params(); // Initialize the timer registers for each per cpu timer for (int i = 0; i < sys->threads.size(); i++) { ThreadContext* tc = sys->threads[i]; @@ -63,8 +63,8 @@ CpuLocalTimer::init() localTimer.emplace_back( new Timer(oss.str(), this, - p->int_timer->get(tc), - p->int_watchdog->get(tc))); + p.int_timer->get(tc), + p.int_watchdog->get(tc))); } BasicPioDevice::init(); @@ -441,7 +441,7 @@ CpuLocalTimer::unserialize(CheckpointIn &cp) } CpuLocalTimer * -CpuLocalTimerParams::create() +CpuLocalTimerParams::create() const { - return new CpuLocalTimer(this); + return new CpuLocalTimer(*this); } diff --git a/src/dev/arm/timer_cpulocal.hh b/src/dev/arm/timer_cpulocal.hh index a96331159..6966d3e83 100644 --- a/src/dev/arm/timer_cpulocal.hh +++ b/src/dev/arm/timer_cpulocal.hh @@ -157,16 +157,16 @@ class CpuLocalTimer : public BasicPioDevice public: typedef CpuLocalTimerParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * The constructor for RealView just registers itself with the MMU. * @param p params structure */ - CpuLocalTimer(Params *p); + CpuLocalTimer(const Params &p); /** Inits the local timers */ void init() override; diff --git a/src/dev/arm/timer_sp804.cc b/src/dev/arm/timer_sp804.cc index dbfa7ff60..52bc99258 100644 --- a/src/dev/arm/timer_sp804.cc +++ b/src/dev/arm/timer_sp804.cc @@ -45,10 +45,10 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -Sp804::Sp804(Params *p) +Sp804::Sp804(const Params &p) : AmbaPioDevice(p, 0x1000), - timer0(name() + ".timer0", this, p->int0->get(), p->clock0), - timer1(name() + ".timer1", this, p->int1->get(), p->clock1) + timer0(name() + ".timer0", this, p.int0->get(), p.clock0), + timer1(name() + ".timer1", this, p.int1->get(), p.clock1) { } @@ -282,7 +282,7 @@ Sp804::unserialize(CheckpointIn &cp) } Sp804 * -Sp804Params::create() +Sp804Params::create() const { - return new Sp804(this); + return new Sp804(*this); } diff --git a/src/dev/arm/timer_sp804.hh b/src/dev/arm/timer_sp804.hh index 1054b6a73..34df8aac7 100644 --- a/src/dev/arm/timer_sp804.hh +++ b/src/dev/arm/timer_sp804.hh @@ -130,16 +130,16 @@ class Sp804 : public AmbaPioDevice public: typedef Sp804Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * The constructor for RealView just registers itself with the MMU. * @param p params structure */ - Sp804(Params *p); + Sp804(const Params &p); /** * Handle a read to the device diff --git a/src/dev/arm/ufs_device.cc b/src/dev/arm/ufs_device.cc index b11eb7bc7..b9943c34a 100644 --- a/src/dev/arm/ufs_device.cc +++ b/src/dev/arm/ufs_device.cc @@ -72,14 +72,14 @@ /** * Constructor and destructor functions of UFSHCM device */ -UFSHostDevice::UFSSCSIDevice::UFSSCSIDevice(const UFSHostDeviceParams* p, +UFSHostDevice::UFSSCSIDevice::UFSSCSIDevice(const UFSHostDeviceParams &p, uint32_t lun_id, const Callback &transfer_cb, const Callback &read_cb): SimObject(p), - flashDisk(p->image[lun_id]), - flashDevice(p->internalflash[lun_id]), - blkSize(p->img_blk_size), - lunAvail(p->image.size()), + flashDisk(p.image[lun_id]), + flashDevice(p.internalflash[lun_id]), + blkSize(p.img_blk_size), + lunAvail(p.image.size()), diskSize(flashDisk->size()), capacityLower((diskSize - 1) & 0xffffffff), capacityUpper((diskSize - SectorSize) >> 32), @@ -712,15 +712,15 @@ UFSHostDevice::UFSSCSIDevice::writeFlash(uint8_t* writeaddr, uint64_t offset, * Constructor for the UFS Host device */ -UFSHostDevice::UFSHostDevice(const UFSHostDeviceParams* p) : +UFSHostDevice::UFSHostDevice(const UFSHostDeviceParams &p) : DmaDevice(p), - pioAddr(p->pio_addr), + pioAddr(p.pio_addr), pioSize(0x0FFF), - pioDelay(p->pio_latency), - intNum(p->int_num), - gic(p->gic), - lunAvail(p->image.size()), - UFSSlots(p->ufs_slots - 1), + pioDelay(p.pio_latency), + intNum(p.int_num), + gic(p.gic), + lunAvail(p.image.size()), + UFSSlots(p.ufs_slots - 1), readPendingNum(0), writePendingNum(0), activeDoorbells(0), @@ -757,9 +757,9 @@ UFSHostDevice::UFSHostDevice(const UFSHostDeviceParams* p) : */ UFSHostDevice* -UFSHostDeviceParams::create() +UFSHostDeviceParams::create() const { - return new UFSHostDevice(this); + return new UFSHostDevice(*this); } diff --git a/src/dev/arm/ufs_device.hh b/src/dev/arm/ufs_device.hh index d3ea35da6..2a6d1bf96 100644 --- a/src/dev/arm/ufs_device.hh +++ b/src/dev/arm/ufs_device.hh @@ -170,7 +170,7 @@ class UFSHostDevice : public DmaDevice { public: - UFSHostDevice(const UFSHostDeviceParams* p); + UFSHostDevice(const UFSHostDeviceParams &p); DrainState drain() override; void checkDrain(); @@ -541,7 +541,7 @@ class UFSHostDevice : public DmaDevice /** * Constructor and destructor */ - UFSSCSIDevice(const UFSHostDeviceParams* p, uint32_t lun_id, + UFSSCSIDevice(const UFSHostDeviceParams &p, uint32_t lun_id, const Callback &transfer_cb, const Callback &read_cb); ~UFSSCSIDevice(); diff --git a/src/dev/arm/vgic.cc b/src/dev/arm/vgic.cc index 154256179..daf29d92f 100644 --- a/src/dev/arm/vgic.cc +++ b/src/dev/arm/vgic.cc @@ -45,10 +45,10 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -VGic::VGic(const Params *p) - : PioDevice(p), gicvIIDR(p->gicv_iidr), platform(p->platform), - gic(p->gic), vcpuAddr(p->vcpu_addr), hvAddr(p->hv_addr), - pioDelay(p->pio_delay), maintInt(p->maint_int) +VGic::VGic(const Params &p) + : PioDevice(p), gicvIIDR(p.gicv_iidr), platform(p.platform), + gic(p.gic), vcpuAddr(p.vcpu_addr), hvAddr(p.hv_addr), + pioDelay(p.pio_delay), maintInt(p.maint_int) { for (int x = 0; x < VGIC_CPU_MAX; x++) { postVIntEvent[x] = new EventFunctionWrapper( @@ -554,7 +554,7 @@ VGic::vcpuIntData::unserialize(CheckpointIn &cp) } VGic * -VGicParams::create() +VGicParams::create() const { - return new VGic(this); + return new VGic(*this); } diff --git a/src/dev/arm/vgic.hh b/src/dev/arm/vgic.hh index e8bf9162d..7a79f43cf 100644 --- a/src/dev/arm/vgic.hh +++ b/src/dev/arm/vgic.hh @@ -186,13 +186,13 @@ class VGic : public PioDevice struct std::array vcpuData; public: - typedef VGicParams Params; - const Params * + typedef VGicParams Params; + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - VGic(const Params *p); + VGic(const Params &p); ~VGic(); AddrRangeList getAddrRanges() const override; diff --git a/src/dev/arm/vio_mmio.cc b/src/dev/arm/vio_mmio.cc index 2dfbc61a3..b402f1c19 100644 --- a/src/dev/arm/vio_mmio.cc +++ b/src/dev/arm/vio_mmio.cc @@ -42,11 +42,11 @@ #include "mem/packet_access.hh" #include "params/MmioVirtIO.hh" -MmioVirtIO::MmioVirtIO(const MmioVirtIOParams *params) - : BasicPioDevice(params, params->pio_size), +MmioVirtIO::MmioVirtIO(const MmioVirtIOParams ¶ms) + : BasicPioDevice(params, params.pio_size), hostFeaturesSelect(0), guestFeaturesSelect(0), pageSize(0), - interruptStatus(0), vio(*params->vio), - interrupt(params->interrupt->get()) + interruptStatus(0), vio(*params.vio), + interrupt(params.interrupt->get()) { fatal_if(!interrupt, "No MMIO VirtIO interrupt specified\n"); @@ -276,7 +276,7 @@ MmioVirtIO::setInterrupts(uint32_t value) MmioVirtIO * -MmioVirtIOParams::create() +MmioVirtIOParams::create() const { - return new MmioVirtIO(this); + return new MmioVirtIO(*this); } diff --git a/src/dev/arm/vio_mmio.hh b/src/dev/arm/vio_mmio.hh index d42d92a44..3ac695057 100644 --- a/src/dev/arm/vio_mmio.hh +++ b/src/dev/arm/vio_mmio.hh @@ -47,7 +47,7 @@ struct MmioVirtIOParams; class MmioVirtIO : public BasicPioDevice { public: - MmioVirtIO(const MmioVirtIOParams *params); + MmioVirtIO(const MmioVirtIOParams ¶ms); virtual ~MmioVirtIO(); protected: // BasicPioDevice diff --git a/src/dev/arm/watchdog_sp805.cc b/src/dev/arm/watchdog_sp805.cc index 32417e020..3ae4e64fd 100644 --- a/src/dev/arm/watchdog_sp805.cc +++ b/src/dev/arm/watchdog_sp805.cc @@ -42,7 +42,7 @@ #include "mem/packet_access.hh" #include "params/Sp805.hh" -Sp805::Sp805(Sp805Params const* params) +Sp805::Sp805(const Sp805Params ¶ms) : AmbaIntDevice(params, 0x1000), timeoutInterval(0xffffffff), timeoutStartTick(MaxTick), @@ -261,7 +261,7 @@ Sp805::unserialize(CheckpointIn &cp) } Sp805 * -Sp805Params::create() +Sp805Params::create() const { - return new Sp805(this); + return new Sp805(*this); } diff --git a/src/dev/arm/watchdog_sp805.hh b/src/dev/arm/watchdog_sp805.hh index 4d9094d17..a64e4c9f6 100644 --- a/src/dev/arm/watchdog_sp805.hh +++ b/src/dev/arm/watchdog_sp805.hh @@ -52,7 +52,7 @@ class Sp805Params; class Sp805 : public AmbaIntDevice { public: - Sp805(Sp805Params const* params); + Sp805(const Sp805Params ¶ms); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; diff --git a/src/dev/baddev.cc b/src/dev/baddev.cc index 48cdff3fa..104699f20 100644 --- a/src/dev/baddev.cc +++ b/src/dev/baddev.cc @@ -40,8 +40,8 @@ using namespace std; -BadDevice::BadDevice(Params *p) - : BasicPioDevice(p, 0x10), devname(p->devicename) +BadDevice::BadDevice(const Params &p) + : BasicPioDevice(p, 0x10), devname(p.devicename) { } @@ -58,7 +58,7 @@ BadDevice::write(PacketPtr pkt) } BadDevice * -BadDeviceParams::create() +BadDeviceParams::create() const { - return new BadDevice(this); + return new BadDevice(*this); } diff --git a/src/dev/baddev.hh b/src/dev/baddev.hh index 2772ce49b..2040b4907 100644 --- a/src/dev/baddev.hh +++ b/src/dev/baddev.hh @@ -52,10 +52,10 @@ class BadDevice : public BasicPioDevice typedef BadDeviceParams Params; protected: - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } public: @@ -64,7 +64,7 @@ class BadDevice : public BasicPioDevice * @param p object parameters * @param a base address of the write */ - BadDevice(Params *p); + BadDevice(const Params &p); virtual Tick read(PacketPtr pkt); virtual Tick write(PacketPtr pkt); diff --git a/src/dev/dma_device.cc b/src/dev/dma_device.cc index ace8f2c86..0caf2b947 100644 --- a/src/dev/dma_device.cc +++ b/src/dev/dma_device.cc @@ -114,8 +114,8 @@ DmaPort::recvTimingResp(PacketPtr pkt) return true; } -DmaDevice::DmaDevice(const Params *p) - : PioDevice(p), dmaPort(this, sys, p->sid, p->ssid) +DmaDevice::DmaDevice(const Params &p) + : PioDevice(p), dmaPort(this, sys, p.sid, p.ssid) { } void diff --git a/src/dev/dma_device.hh b/src/dev/dma_device.hh index 2369fc471..53ceff0e7 100644 --- a/src/dev/dma_device.hh +++ b/src/dev/dma_device.hh @@ -169,7 +169,7 @@ class DmaDevice : public PioDevice public: typedef DmaDeviceParams Params; - DmaDevice(const Params *p); + DmaDevice(const Params &p); virtual ~DmaDevice() { } void dmaWrite(Addr addr, int size, Event *event, uint8_t *data, diff --git a/src/dev/hsa/hsa_device.hh b/src/dev/hsa/hsa_device.hh index c396e435b..7e8f1b7bd 100644 --- a/src/dev/hsa/hsa_device.hh +++ b/src/dev/hsa/hsa_device.hh @@ -48,7 +48,7 @@ class HSADevice : public DmaDevice public: typedef HSADeviceParams Params; - HSADevice(const Params *p) : DmaDevice(p), hsaPP(p->hsapp) + HSADevice(const Params &p) : DmaDevice(p), hsaPP(p.hsapp) { assert(hsaPP); hsaPP->setDevice(this); diff --git a/src/dev/hsa/hsa_driver.cc b/src/dev/hsa/hsa_driver.cc index b165af4b1..190213a8b 100644 --- a/src/dev/hsa/hsa_driver.cc +++ b/src/dev/hsa/hsa_driver.cc @@ -45,8 +45,8 @@ #include "sim/proxy_ptr.hh" #include "sim/syscall_emul_buf.hh" -HSADriver::HSADriver(HSADriverParams *p) - : EmulatedDriver(p), device(p->device), queueId(0) +HSADriver::HSADriver(const HSADriverParams &p) + : EmulatedDriver(p), device(p.device), queueId(0) { } diff --git a/src/dev/hsa/hsa_driver.hh b/src/dev/hsa/hsa_driver.hh index 19982f757..429deddca 100644 --- a/src/dev/hsa/hsa_driver.hh +++ b/src/dev/hsa/hsa_driver.hh @@ -62,7 +62,7 @@ class ThreadContext; class HSADriver : public EmulatedDriver { public: - HSADriver(HSADriverParams *p); + HSADriver(const HSADriverParams &p); int open(ThreadContext *tc, int mode, int flags); Addr mmap(ThreadContext *tc, Addr start, uint64_t length, diff --git a/src/dev/hsa/hsa_packet_processor.cc b/src/dev/hsa/hsa_packet_processor.cc index 89399ced0..fef70df73 100644 --- a/src/dev/hsa/hsa_packet_processor.cc +++ b/src/dev/hsa/hsa_packet_processor.cc @@ -70,12 +70,12 @@ HSAPP_EVENT_DESCRIPTION_GENERATOR(CmdQueueCmdDmaEvent) HSAPP_EVENT_DESCRIPTION_GENERATOR(QueueProcessEvent) HSAPP_EVENT_DESCRIPTION_GENERATOR(DepSignalsReadDmaEvent) -HSAPacketProcessor::HSAPacketProcessor(const Params *p) - : DmaDevice(p), numHWQueues(p->numHWQueues), pioAddr(p->pioAddr), - pioSize(PAGE_SIZE), pioDelay(10), pktProcessDelay(p->pktProcessDelay) +HSAPacketProcessor::HSAPacketProcessor(const Params &p) + : DmaDevice(p), numHWQueues(p.numHWQueues), pioAddr(p.pioAddr), + pioSize(PAGE_SIZE), pioDelay(10), pktProcessDelay(p.pktProcessDelay) { DPRINTF(HSAPacketProcessor, "%s:\n", __FUNCTION__); - hwSchdlr = new HWScheduler(this, p->wakeupDelay); + hwSchdlr = new HWScheduler(this, p.wakeupDelay); regdQList.resize(numHWQueues); for (int i = 0; i < numHWQueues; i++) { regdQList[i] = new RQLEntry(this, i); @@ -658,9 +658,9 @@ AQLRingBuffer::allocEntry(uint32_t nBufReq) } HSAPacketProcessor * -HSAPacketProcessorParams::create() +HSAPacketProcessorParams::create() const { - return new HSAPacketProcessor(this); + return new HSAPacketProcessor(*this); } void diff --git a/src/dev/hsa/hsa_packet_processor.hh b/src/dev/hsa/hsa_packet_processor.hh index 551d09dda..27df90a85 100644 --- a/src/dev/hsa/hsa_packet_processor.hh +++ b/src/dev/hsa/hsa_packet_processor.hh @@ -309,7 +309,7 @@ class HSAPacketProcessor: public DmaDevice const Tick pktProcessDelay; typedef HSAPacketProcessorParams Params; - HSAPacketProcessor(const Params *p); + HSAPacketProcessor(const Params &p); ~HSAPacketProcessor(); void setDeviceQueueDesc(uint64_t hostReadIndexPointer, uint64_t basePointer, diff --git a/src/dev/i2c/bus.cc b/src/dev/i2c/bus.cc index 7a8d1a056..4c6fe00dc 100644 --- a/src/dev/i2c/bus.cc +++ b/src/dev/i2c/bus.cc @@ -51,13 +51,13 @@ using std::map; * 4KB - see e.g. * http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/Bbajihec.html */ -I2CBus::I2CBus(const I2CBusParams *p) +I2CBus::I2CBus(const I2CBusParams &p) : BasicPioDevice(p, 0x1000), scl(1), sda(1), state(IDLE), currBit(7), i2cAddr(0x00), message(0x00) { - vector devs = p->devices; + vector devs = p.devices; - for (auto d : p->devices) { + for (auto d : p.devices) { devices[d->i2cAddr()] = d; } } @@ -236,7 +236,7 @@ I2CBus::unserialize(CheckpointIn &cp) } I2CBus* -I2CBusParams::create() +I2CBusParams::create() const { - return new I2CBus(this); + return new I2CBus(*this); } diff --git a/src/dev/i2c/bus.hh b/src/dev/i2c/bus.hh index 3fcdcf3e5..9f92a6d44 100644 --- a/src/dev/i2c/bus.hh +++ b/src/dev/i2c/bus.hh @@ -140,7 +140,7 @@ class I2CBus : public BasicPioDevice public: - I2CBus(const I2CBusParams* p); + I2CBus(const I2CBusParams &p); Tick read(PacketPtr pkt) override; Tick write(PacketPtr pkt) override; diff --git a/src/dev/i2c/device.hh b/src/dev/i2c/device.hh index 71d1aca85..6d76e784e 100644 --- a/src/dev/i2c/device.hh +++ b/src/dev/i2c/device.hh @@ -56,8 +56,8 @@ class I2CDevice : public SimObject public: - I2CDevice(const I2CDeviceParams* p) - : SimObject(p), _addr(p->i2c_addr) + I2CDevice(const I2CDeviceParams &p) + : SimObject(p), _addr(p.i2c_addr) { } virtual ~I2CDevice() { } diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc index 5eb2b1340..ae6a5e3c2 100644 --- a/src/dev/io_device.cc +++ b/src/dev/io_device.cc @@ -44,8 +44,8 @@ #include "debug/AddrRanges.hh" #include "sim/system.hh" -PioDevice::PioDevice(const Params *p) - : ClockedObject(p), sys(p->system), pioPort(this) +PioDevice::PioDevice(const Params &p) + : ClockedObject(p), sys(p.system), pioPort(this) {} PioDevice::~PioDevice() @@ -69,9 +69,9 @@ PioDevice::getPort(const std::string &if_name, PortID idx) return ClockedObject::getPort(if_name, idx); } -BasicPioDevice::BasicPioDevice(const Params *p, Addr size) - : PioDevice(p), pioAddr(p->pio_addr), pioSize(size), - pioDelay(p->pio_latency) +BasicPioDevice::BasicPioDevice(const Params &p, Addr size) + : PioDevice(p), pioAddr(p.pio_addr), pioSize(size), + pioDelay(p.pio_latency) {} AddrRangeList diff --git a/src/dev/io_device.hh b/src/dev/io_device.hh index 842b98de3..fe74828e9 100644 --- a/src/dev/io_device.hh +++ b/src/dev/io_device.hh @@ -129,13 +129,13 @@ class PioDevice : public ClockedObject public: typedef PioDeviceParams Params; - PioDevice(const Params *p); + PioDevice(const Params &p); virtual ~PioDevice(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void init() override; @@ -161,12 +161,12 @@ class BasicPioDevice : public PioDevice public: typedef BasicPioDeviceParams Params; - BasicPioDevice(const Params *p, Addr size); + BasicPioDevice(const Params &p, Addr size); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc index 49e1df563..bcce91981 100644 --- a/src/dev/isa_fake.cc +++ b/src/dev/isa_fake.cc @@ -40,13 +40,13 @@ using namespace std; -IsaFake::IsaFake(Params *p) - : BasicPioDevice(p, p->ret_bad_addr ? 0 : p->pio_size) +IsaFake::IsaFake(const Params &p) + : BasicPioDevice(p, p.ret_bad_addr ? 0 : p.pio_size) { - retData8 = p->ret_data8; - retData16 = p->ret_data16; - retData32 = p->ret_data32; - retData64 = p->ret_data64; + retData8 = p.ret_data8; + retData16 = p.ret_data16; + retData32 = p.ret_data32; + retData64 = p.ret_data64; } Tick @@ -54,10 +54,10 @@ IsaFake::read(PacketPtr pkt) { pkt->makeAtomicResponse(); - if (params()->warn_access != "") + if (params().warn_access != "") warn("Device %s accessed by read to address %#x size=%d\n", name(), pkt->getAddr(), pkt->getSize()); - if (params()->ret_bad_addr) { + if (params().ret_bad_addr) { DPRINTF(IsaFake, "read to bad address va=%#x size=%d\n", pkt->getAddr(), pkt->getSize()); pkt->setBadAddress(); @@ -79,7 +79,7 @@ IsaFake::read(PacketPtr pkt) pkt->setLE(retData8); break; default: - if (params()->fake_mem) + if (params().fake_mem) std::memset(pkt->getPtr(), 0, pkt->getSize()); else panic("invalid access size! Device being accessed by cache?\n"); @@ -92,7 +92,7 @@ Tick IsaFake::write(PacketPtr pkt) { pkt->makeAtomicResponse(); - if (params()->warn_access != "") { + if (params().warn_access != "") { uint64_t data; switch (pkt->getSize()) { case sizeof(uint64_t): @@ -113,7 +113,7 @@ IsaFake::write(PacketPtr pkt) warn("Device %s accessed by write to address %#x size=%d data=%#x\n", name(), pkt->getAddr(), pkt->getSize(), data); } - if (params()->ret_bad_addr) { + if (params().ret_bad_addr) { DPRINTF(IsaFake, "write to bad address va=%#x size=%d \n", pkt->getAddr(), pkt->getSize()); pkt->setBadAddress(); @@ -121,7 +121,7 @@ IsaFake::write(PacketPtr pkt) DPRINTF(IsaFake, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize()); - if (params()->update_data) { + if (params().update_data) { switch (pkt->getSize()) { case sizeof(uint64_t): retData64 = pkt->getLE(); @@ -144,7 +144,7 @@ IsaFake::write(PacketPtr pkt) } IsaFake * -IsaFakeParams::create() +IsaFakeParams::create() const { - return new IsaFake(this); + return new IsaFake(*this); } diff --git a/src/dev/isa_fake.hh b/src/dev/isa_fake.hh index 43dfd35a9..75b120b9f 100644 --- a/src/dev/isa_fake.hh +++ b/src/dev/isa_fake.hh @@ -56,16 +56,16 @@ class IsaFake : public BasicPioDevice public: typedef IsaFakeParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * The constructor for Isa Fake just registers itself with the MMU. * @param p params structure */ - IsaFake(Params *p); + IsaFake(const Params &p); /** * This read always returns -1. diff --git a/src/dev/mips/malta.cc b/src/dev/mips/malta.cc index 61aa7ce48..eddc83867 100644 --- a/src/dev/mips/malta.cc +++ b/src/dev/mips/malta.cc @@ -45,8 +45,8 @@ using namespace std; -Malta::Malta(const Params *p) - : Platform(p), system(p->system) +Malta::Malta(const Params &p) + : Platform(p), system(p.system) { for (int i = 0; i < Malta::Max_CPUs; i++) intr_sum_type[i] = 0; @@ -97,7 +97,7 @@ Malta::unserialize(CheckpointIn &cp) } Malta * -MaltaParams::create() +MaltaParams::create() const { - return new Malta(this); + return new Malta(*this); } diff --git a/src/dev/mips/malta.hh b/src/dev/mips/malta.hh index d424dafa5..e99bd30c8 100644 --- a/src/dev/mips/malta.hh +++ b/src/dev/mips/malta.hh @@ -79,7 +79,7 @@ class Malta : public Platform * @param intctrl pointer to the interrupt controller */ typedef MaltaParams Params; - Malta(const Params *p); + Malta(const Params &p); /** * Cause the cpu to post a serial interrupt to the CPU. diff --git a/src/dev/mips/malta_cchip.cc b/src/dev/mips/malta_cchip.cc index c8fe7a840..81ec67eca 100644 --- a/src/dev/mips/malta_cchip.cc +++ b/src/dev/mips/malta_cchip.cc @@ -50,8 +50,8 @@ using namespace std; -MaltaCChip::MaltaCChip(Params *p) - : BasicPioDevice(p, 0xfffffff), malta(p->malta) +MaltaCChip::MaltaCChip(const Params &p) + : BasicPioDevice(p, 0xfffffff), malta(p.malta) { warn("MaltaCCHIP::MaltaCChip() not implemented."); @@ -141,8 +141,8 @@ MaltaCChip::unserialize(CheckpointIn &cp) } MaltaCChip * -MaltaCChipParams::create() +MaltaCChipParams::create() const { - return new MaltaCChip(this); + return new MaltaCChip(*this); } diff --git a/src/dev/mips/malta_cchip.hh b/src/dev/mips/malta_cchip.hh index 8df14cc93..0841ba87d 100644 --- a/src/dev/mips/malta_cchip.hh +++ b/src/dev/mips/malta_cchip.hh @@ -78,10 +78,10 @@ class MaltaCChip : public BasicPioDevice public: typedef MaltaCChipParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** @@ -89,7 +89,7 @@ class MaltaCChip : public BasicPioDevice * device register to 0. * @param p params struct */ - MaltaCChip(Params *p); + MaltaCChip(const Params &p); Tick read(PacketPtr pkt) override; diff --git a/src/dev/mips/malta_io.cc b/src/dev/mips/malta_io.cc index ef671a645..0f979cc65 100644 --- a/src/dev/mips/malta_io.cc +++ b/src/dev/mips/malta_io.cc @@ -53,15 +53,15 @@ using namespace std; -MaltaIO::RTC::RTC(const string &name, const MaltaIOParams *p) - : MC146818(p->malta, name, p->time, p->year_is_bcd, p->frequency), - malta(p->malta) +MaltaIO::RTC::RTC(const string &name, const MaltaIOParams &p) + : MC146818(p.malta, name, p.time, p.year_is_bcd, p.frequency), + malta(p.malta) { } -MaltaIO::MaltaIO(const Params *p) - : BasicPioDevice(p, 0x100), malta(p->malta), - pitimer(this, p->name + "pitimer"), rtc(p->name + ".rtc", p) +MaltaIO::MaltaIO(const Params &p) + : BasicPioDevice(p, 0x100), malta(p.malta), + pitimer(this, p.name + "pitimer"), rtc(p.name + ".rtc", p) { // set the back pointer from malta to myself malta->io = this; @@ -74,7 +74,7 @@ MaltaIO::MaltaIO(const Params *p) Tick MaltaIO::frequency() const { - return SimClock::Frequency / params()->frequency; + return SimClock::Frequency / params().frequency; } Tick @@ -145,7 +145,7 @@ MaltaIO::startup() } MaltaIO * -MaltaIOParams::create() +MaltaIOParams::create() const { - return new MaltaIO(this); + return new MaltaIO(*this); } diff --git a/src/dev/mips/malta_io.hh b/src/dev/mips/malta_io.hh index ef3b7a58c..96dfb1d81 100644 --- a/src/dev/mips/malta_io.hh +++ b/src/dev/mips/malta_io.hh @@ -53,7 +53,7 @@ class MaltaIO : public BasicPioDevice { public: Malta *malta; - RTC(const std::string &name, const MaltaIOParams *p); + RTC(const std::string &name, const MaltaIOParams &p); protected: void handleEvent() @@ -104,17 +104,17 @@ class MaltaIO : public BasicPioDevice typedef MaltaIOParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** * Initialize all the data for devices supported by Malta I/O. * @param p pointer to Params struct */ - MaltaIO(const Params *p); + MaltaIO(const Params &p); Tick read(PacketPtr pkt) override; Tick write(PacketPtr pkt) override; diff --git a/src/dev/net/dist_etherlink.cc b/src/dev/net/dist_etherlink.cc index 2d3034952..b55763308 100644 --- a/src/dev/net/dist_etherlink.cc +++ b/src/dev/net/dist_etherlink.cc @@ -68,32 +68,32 @@ using namespace std; -DistEtherLink::DistEtherLink(const Params *p) - : SimObject(p), linkDelay(p->delay) +DistEtherLink::DistEtherLink(const Params &p) + : SimObject(p), linkDelay(p.delay) { DPRINTF(DistEthernet,"DistEtherLink::DistEtherLink() " - "link delay:%llu ticksPerByte:%f\n", p->delay, p->speed); + "link delay:%llu ticksPerByte:%f\n", p.delay, p.speed); - txLink = new TxLink(name() + ".link0", this, p->speed, p->delay_var, - p->dump); - rxLink = new RxLink(name() + ".link1", this, p->delay, p->dump); + txLink = new TxLink(name() + ".link0", this, p.speed, p.delay_var, + p.dump); + rxLink = new RxLink(name() + ".link1", this, p.delay, p.dump); Tick sync_repeat; - if (p->sync_repeat != 0) { - if (p->sync_repeat != p->delay) + if (p.sync_repeat != 0) { + if (p.sync_repeat != p.delay) warn("DistEtherLink(): sync_repeat is %lu and linkdelay is %lu", - p->sync_repeat, p->delay); - sync_repeat = p->sync_repeat; + p.sync_repeat, p.delay); + sync_repeat = p.sync_repeat; } else { - sync_repeat = p->delay; + sync_repeat = p.delay; } // create the dist (TCP) interface to talk to the peer gem5 processes. - distIface = new TCPIface(p->server_name, p->server_port, - p->dist_rank, p->dist_size, - p->sync_start, sync_repeat, this, - p->dist_sync_on_pseudo_op, p->is_switch, - p->num_nodes); + distIface = new TCPIface(p.server_name, p.server_port, + p.dist_rank, p.dist_size, + p.sync_start, sync_repeat, this, + p.dist_sync_on_pseudo_op, p.is_switch, + p.num_nodes); localIface = new LocalIface(name() + ".int0", txLink, rxLink, distIface); } @@ -254,9 +254,9 @@ DistEtherLink::LocalIface::LocalIface(const std::string &name, } DistEtherLink * -DistEtherLinkParams::create() +DistEtherLinkParams::create() const { - return new DistEtherLink(this); + return new DistEtherLink(*this); } diff --git a/src/dev/net/dist_etherlink.hh b/src/dev/net/dist_etherlink.hh index e4c4e42ae..bb99c33be 100644 --- a/src/dev/net/dist_etherlink.hh +++ b/src/dev/net/dist_etherlink.hh @@ -212,13 +212,13 @@ class DistEtherLink : public SimObject public: typedef DistEtherLinkParams Params; - DistEtherLink(const Params *p); + DistEtherLink(const Params &p); ~DistEtherLink(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Port &getPort(const std::string &if_name, diff --git a/src/dev/net/etherbus.cc b/src/dev/net/etherbus.cc index 3b36d7b19..c92074cbf 100644 --- a/src/dev/net/etherbus.cc +++ b/src/dev/net/etherbus.cc @@ -48,10 +48,10 @@ using namespace std; -EtherBus::EtherBus(const Params *p) - : SimObject(p), ticksPerByte(p->speed), loopback(p->loopback), +EtherBus::EtherBus(const Params &p) + : SimObject(p), ticksPerByte(p.speed), loopback(p.loopback), event([this]{ txDone(); }, "ethernet bus completion"), - sender(0), dump(p->dump) + sender(0), dump(p.dump) { } @@ -107,7 +107,7 @@ EtherBus::send(EtherInt *sndr, EthPacketPtr &pkt) } EtherBus * -EtherBusParams::create() +EtherBusParams::create() const { - return new EtherBus(this); + return new EtherBus(*this); } diff --git a/src/dev/net/etherbus.hh b/src/dev/net/etherbus.hh index 0fae90e2c..c5cd4e6bf 100644 --- a/src/dev/net/etherbus.hh +++ b/src/dev/net/etherbus.hh @@ -56,13 +56,13 @@ class EtherBus : public SimObject public: typedef EtherBusParams Params; - EtherBus(const Params *p); + EtherBus(const Params &p); virtual ~EtherBus() {} - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void txDone(); diff --git a/src/dev/net/etherdevice.hh b/src/dev/net/etherdevice.hh index a54853eec..9aef1a5fc 100644 --- a/src/dev/net/etherdevice.hh +++ b/src/dev/net/etherdevice.hh @@ -46,14 +46,14 @@ class EtherDevice : public PciDevice { public: typedef EtherDeviceParams Params; - EtherDevice(const Params *params) + EtherDevice(const Params ¶ms) : PciDevice(params) {} - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } public: @@ -124,14 +124,14 @@ class EtherDevice : public PciDevice class EtherDevBase : public EtherDevice { public: - EtherDevBase(const EtherDevBaseParams *params) + EtherDevBase(const EtherDevBaseParams ¶ms) : EtherDevice(params) {} - const EtherDevBaseParams * + const EtherDevBaseParams & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } }; diff --git a/src/dev/net/etherdump.cc b/src/dev/net/etherdump.cc index 75736945a..6e0ae6316 100644 --- a/src/dev/net/etherdump.cc +++ b/src/dev/net/etherdump.cc @@ -42,9 +42,9 @@ using std::string; -EtherDump::EtherDump(const Params *p) - : SimObject(p), stream(simout.create(p->file, true)->stream()), - maxlen(p->maxlen) +EtherDump::EtherDump(const Params &p) + : SimObject(p), stream(simout.create(p.file, true)->stream()), + maxlen(p.maxlen) { } @@ -102,7 +102,7 @@ EtherDump::dumpPacket(EthPacketPtr &packet) } EtherDump * -EtherDumpParams::create() +EtherDumpParams::create() const { - return new EtherDump(this); + return new EtherDump(*this); } diff --git a/src/dev/net/etherdump.hh b/src/dev/net/etherdump.hh index 70f5f3629..594e56db8 100644 --- a/src/dev/net/etherdump.hh +++ b/src/dev/net/etherdump.hh @@ -52,7 +52,7 @@ class EtherDump : public SimObject public: typedef EtherDumpParams Params; - EtherDump(const Params *p); + EtherDump(const Params &p); inline void dump(EthPacketPtr &pkt) { dumpPacket(pkt); } }; diff --git a/src/dev/net/etherlink.cc b/src/dev/net/etherlink.cc index 36c46f420..9bbe000fd 100644 --- a/src/dev/net/etherlink.cc +++ b/src/dev/net/etherlink.cc @@ -63,13 +63,13 @@ using namespace std; -EtherLink::EtherLink(const Params *p) +EtherLink::EtherLink(const Params &p) : SimObject(p) { - link[0] = new Link(name() + ".link0", this, 0, p->speed, - p->delay, p->delay_var, p->dump); - link[1] = new Link(name() + ".link1", this, 1, p->speed, - p->delay, p->delay_var, p->dump); + link[0] = new Link(name() + ".link0", this, 0, p.speed, + p.delay, p.delay_var, p.dump); + link[1] = new Link(name() + ".link1", this, 1, p.speed, + p.delay, p.delay_var, p.dump); interface[0] = new Interface(name() + ".int0", link[0], link[1]); interface[1] = new Interface(name() + ".int1", link[1], link[0]); @@ -266,7 +266,7 @@ EtherLink::Link::unserialize(const string &base, CheckpointIn &cp) } EtherLink * -EtherLinkParams::create() +EtherLinkParams::create() const { - return new EtherLink(this); + return new EtherLink(*this); } diff --git a/src/dev/net/etherlink.hh b/src/dev/net/etherlink.hh index da031fa80..036d7defc 100644 --- a/src/dev/net/etherlink.hh +++ b/src/dev/net/etherlink.hh @@ -140,13 +140,13 @@ class EtherLink : public SimObject public: typedef EtherLinkParams Params; - EtherLink(const Params *p); + EtherLink(const Params &p); virtual ~EtherLink(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Port &getPort(const std::string &if_name, diff --git a/src/dev/net/etherswitch.cc b/src/dev/net/etherswitch.cc index 972cf56b8..19c3bdba8 100644 --- a/src/dev/net/etherswitch.cc +++ b/src/dev/net/etherswitch.cc @@ -39,14 +39,14 @@ using namespace std; -EtherSwitch::EtherSwitch(const Params *p) - : SimObject(p), ttl(p->time_to_live) +EtherSwitch::EtherSwitch(const Params &p) + : SimObject(p), ttl(p.time_to_live) { - for (int i = 0; i < p->port_interface_connection_count; ++i) { + for (int i = 0; i < p.port_interface_connection_count; ++i) { std::string interfaceName = csprintf("%s.interface%d", name(), i); Interface *interface = new Interface(interfaceName, this, - p->output_buffer_size, p->delay, - p->delay_var, p->fabric_speed, i); + p.output_buffer_size, p.delay, + p.delay_var, p.fabric_speed, i); interfaces.push_back(interface); } } @@ -347,7 +347,7 @@ EtherSwitch::Interface::PortFifo::unserialize(CheckpointIn &cp) } EtherSwitch * -EtherSwitchParams::create() +EtherSwitchParams::create() const { - return new EtherSwitch(this); + return new EtherSwitch(*this); } diff --git a/src/dev/net/etherswitch.hh b/src/dev/net/etherswitch.hh index 6eda171f6..7f7f36e96 100644 --- a/src/dev/net/etherswitch.hh +++ b/src/dev/net/etherswitch.hh @@ -50,12 +50,13 @@ class EtherSwitch : public SimObject public: typedef EtherSwitchParams Params; - EtherSwitch(const Params *p); + EtherSwitch(const Params &p); ~EtherSwitch(); - const Params * params() const + const Params & + params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Port &getPort(const std::string &if_name, diff --git a/src/dev/net/ethertap.cc b/src/dev/net/ethertap.cc index f4aba21aa..79a4f9491 100644 --- a/src/dev/net/ethertap.cc +++ b/src/dev/net/ethertap.cc @@ -89,8 +89,8 @@ class TapEvent : public PollEvent } }; -EtherTapBase::EtherTapBase(const Params *p) - : SimObject(p), buflen(p->bufsz), dump(p->dump), event(NULL), +EtherTapBase::EtherTapBase(const Params &p) + : SimObject(p), buflen(p.bufsz), dump(p.dump), event(NULL), interface(NULL), txEvent([this]{ retransmit(); }, "EtherTapBase retransmit") { @@ -283,12 +283,12 @@ TapListener::accept() } -EtherTapStub::EtherTapStub(const Params *p) : EtherTapBase(p), socket(-1) +EtherTapStub::EtherTapStub(const Params &p) : EtherTapBase(p), socket(-1) { if (ListenSocket::allDisabled()) fatal("All listeners are disabled! EtherTapStub can't work!"); - listener = new TapListener(this, p->port); + listener = new TapListener(this, p.port); listener->listen(); } @@ -399,16 +399,16 @@ EtherTapStub::sendReal(const void *data, size_t len) #if USE_TUNTAP -EtherTap::EtherTap(const Params *p) : EtherTapBase(p) +EtherTap::EtherTap(const Params &p) : EtherTapBase(p) { - int fd = open(p->tun_clone_device.c_str(), O_RDWR | O_NONBLOCK); + int fd = open(p.tun_clone_device.c_str(), O_RDWR | O_NONBLOCK); if (fd < 0) - panic("Couldn't open %s.\n", p->tun_clone_device); + panic("Couldn't open %s.\n", p.tun_clone_device); struct ifreq ifr; memset(&ifr, 0, sizeof(ifr)); ifr.ifr_flags = IFF_TAP | IFF_NO_PI; - strncpy(ifr.ifr_name, p->tap_device_name.c_str(), IFNAMSIZ - 1); + strncpy(ifr.ifr_name, p.tap_device_name.c_str(), IFNAMSIZ - 1); if (ioctl(fd, TUNSETIFF, (void *)&ifr) < 0) panic("Failed to access tap device %s.\n", ifr.ifr_name); @@ -470,15 +470,15 @@ EtherTap::sendReal(const void *data, size_t len) } EtherTap * -EtherTapParams::create() +EtherTapParams::create() const { - return new EtherTap(this); + return new EtherTap(*this); } #endif EtherTapStub * -EtherTapStubParams::create() +EtherTapStubParams::create() const { - return new EtherTapStub(this); + return new EtherTapStub(*this); } diff --git a/src/dev/net/ethertap.hh b/src/dev/net/ethertap.hh index af185f18d..d79cd0a39 100644 --- a/src/dev/net/ethertap.hh +++ b/src/dev/net/ethertap.hh @@ -57,13 +57,13 @@ class EtherTapBase : public SimObject { public: typedef EtherTapBaseParams Params; - EtherTapBase(const Params *p); + EtherTapBase(const Params &p); virtual ~EtherTapBase(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void serialize(CheckpointOut &cp) const override; @@ -137,13 +137,13 @@ class EtherTapStub : public EtherTapBase { public: typedef EtherTapStubParams Params; - EtherTapStub(const Params *p); + EtherTapStub(const Params &p); ~EtherTapStub(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } void serialize(CheckpointOut &cp) const override; @@ -172,13 +172,13 @@ class EtherTap : public EtherTapBase { public: typedef EtherTapParams Params; - EtherTap(const Params *p); + EtherTap(const Params &p); ~EtherTap(); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } diff --git a/src/dev/net/i8254xGBe.cc b/src/dev/net/i8254xGBe.cc index 950a9b7a3..72af0c9b7 100644 --- a/src/dev/net/i8254xGBe.cc +++ b/src/dev/net/i8254xGBe.cc @@ -55,21 +55,21 @@ using namespace iGbReg; using namespace Net; -IGbE::IGbE(const Params *p) +IGbE::IGbE(const Params &p) : EtherDevice(p), etherInt(NULL), - rxFifo(p->rx_fifo_size), txFifo(p->tx_fifo_size), inTick(false), + rxFifo(p.rx_fifo_size), txFifo(p.tx_fifo_size), inTick(false), rxTick(false), txTick(false), txFifoTick(false), rxDmaPacket(false), - pktOffset(0), fetchDelay(p->fetch_delay), wbDelay(p->wb_delay), - fetchCompDelay(p->fetch_comp_delay), wbCompDelay(p->wb_comp_delay), - rxWriteDelay(p->rx_write_delay), txReadDelay(p->tx_read_delay), + pktOffset(0), fetchDelay(p.fetch_delay), wbDelay(p.wb_delay), + fetchCompDelay(p.fetch_comp_delay), wbCompDelay(p.wb_comp_delay), + rxWriteDelay(p.rx_write_delay), txReadDelay(p.tx_read_delay), rdtrEvent([this]{ rdtrProcess(); }, name()), radvEvent([this]{ radvProcess(); }, name()), tadvEvent([this]{ tadvProcess(); }, name()), tidvEvent([this]{ tidvProcess(); }, name()), tickEvent([this]{ tick(); }, name()), interEvent([this]{ delayIntEvent(); }, name()), - rxDescCache(this, name()+".RxDesc", p->rx_desc_cache_size), - txDescCache(this, name()+".TxDesc", p->tx_desc_cache_size), + rxDescCache(this, name()+".RxDesc", p.rx_desc_cache_size), + txDescCache(this, name()+".TxDesc", p.tx_desc_cache_size), lastInterrupt(0) { etherInt = new IGbEInt(name() + ".int", this); @@ -106,7 +106,7 @@ IGbE::IGbE(const Params *p) memset(&flash, 0, EEPROM_SIZE*2); // Set the MAC address - memcpy(flash, p->hardware_address.bytes(), ETH_ADDR_LEN); + memcpy(flash, p.hardware_address.bytes(), ETH_ADDR_LEN); for (int x = 0; x < ETH_ADDR_LEN/2; x++) flash[x] = htobe(flash[x]); @@ -119,7 +119,7 @@ IGbE::IGbE(const Params *p) flash[EEPROM_SIZE-1] = htobe((uint16_t)(EEPROM_CSUM - csum)); // Store the MAC address as queue ID - macAddr = p->hardware_address; + macAddr = p.hardware_address; rxFifo.clear(); txFifo.clear(); @@ -468,10 +468,10 @@ IGbE::write(PacketPtr pkt) regs.mdic.data(0x796D); // link up break; case PHY_PID: - regs.mdic.data(params()->phy_pid); + regs.mdic.data(params().phy_pid); break; case PHY_EPID: - regs.mdic.data(params()->phy_epid); + regs.mdic.data(params().phy_epid); break; case PHY_GSTATUS: regs.mdic.data(0x7C00); @@ -2465,7 +2465,7 @@ IGbE::unserialize(CheckpointIn &cp) } IGbE * -IGbEParams::create() +IGbEParams::create() const { - return new IGbE(this); + return new IGbE(*this); } diff --git a/src/dev/net/i8254xGBe.hh b/src/dev/net/i8254xGBe.hh index 5d9761bed..070edde82 100644 --- a/src/dev/net/i8254xGBe.hh +++ b/src/dev/net/i8254xGBe.hh @@ -470,12 +470,13 @@ class IGbE : public EtherDevice public: typedef IGbEParams Params; - const Params * - params() const { - return dynamic_cast(_params); + const Params & + params() const + { + return dynamic_cast(_params); } - IGbE(const Params *params); + IGbE(const Params ¶ms); ~IGbE(); void init() override; diff --git a/src/dev/net/ns_gige.cc b/src/dev/net/ns_gige.cc index 71f449a4d..af9d02e07 100644 --- a/src/dev/net/ns_gige.cc +++ b/src/dev/net/ns_gige.cc @@ -91,9 +91,9 @@ using namespace Net; // // NSGigE PCI Device // -NSGigE::NSGigE(Params *p) +NSGigE::NSGigE(const Params &p) : EtherDevBase(p), ioEnable(false), - txFifo(p->tx_fifo_size), rxFifo(p->rx_fifo_size), + txFifo(p.tx_fifo_size), rxFifo(p.rx_fifo_size), txPacket(0), rxPacket(0), txPacketBufPtr(NULL), rxPacketBufPtr(NULL), txXferLen(0), rxXferLen(0), rxDmaFree(false), txDmaFree(false), txState(txIdle), txEnable(false), CTDD(false), txHalt(false), @@ -102,25 +102,25 @@ NSGigE::NSGigE(Params *p) rxFragPtr(0), rxDescCnt(0), rxDmaState(dmaIdle), extstsEnable(false), eepromState(eepromStart), eepromClk(false), eepromBitsToRx(0), eepromOpcode(0), eepromAddress(0), eepromData(0), - dmaReadDelay(p->dma_read_delay), dmaWriteDelay(p->dma_write_delay), - dmaReadFactor(p->dma_read_factor), dmaWriteFactor(p->dma_write_factor), + dmaReadDelay(p.dma_read_delay), dmaWriteDelay(p.dma_write_delay), + dmaReadFactor(p.dma_read_factor), dmaWriteFactor(p.dma_write_factor), rxDmaData(NULL), rxDmaAddr(0), rxDmaLen(0), txDmaData(NULL), txDmaAddr(0), txDmaLen(0), rxDmaReadEvent([this]{ rxDmaReadDone(); }, name()), rxDmaWriteEvent([this]{ rxDmaWriteDone(); }, name()), txDmaReadEvent([this]{ txDmaReadDone(); }, name()), txDmaWriteEvent([this]{ txDmaWriteDone(); }, name()), - dmaDescFree(p->dma_desc_free), dmaDataFree(p->dma_data_free), - txDelay(p->tx_delay), rxDelay(p->rx_delay), + dmaDescFree(p.dma_desc_free), dmaDataFree(p.dma_data_free), + txDelay(p.tx_delay), rxDelay(p.rx_delay), rxKickTick(0), rxKickEvent([this]{ rxKick(); }, name()), txKickTick(0), txKickEvent([this]{ txKick(); }, name()), txEvent([this]{ txEventTransmit(); }, name()), - rxFilterEnable(p->rx_filter), + rxFilterEnable(p.rx_filter), acceptBroadcast(false), acceptMulticast(false), acceptUnicast(false), acceptPerfect(false), acceptArp(false), multicastHashEnable(false), - intrDelay(p->intr_delay), intrTick(0), cpuPendingIntr(false), + intrDelay(p.intr_delay), intrTick(0), cpuPendingIntr(false), intrEvent(0), interface(0) { @@ -128,7 +128,7 @@ NSGigE::NSGigE(Params *p) interface = new NSGigEInt(name() + ".int0", this); regsReset(); - memcpy(&rom.perfectMatch, p->hardware_address.bytes(), ETH_ADDR_LEN); + memcpy(&rom.perfectMatch, p.hardware_address.bytes(), ETH_ADDR_LEN); memset(&rxDesc32, 0, sizeof(rxDesc32)); memset(&txDesc32, 0, sizeof(txDesc32)); @@ -383,11 +383,11 @@ NSGigE::read(PacketPtr pkt) case M5REG: reg = 0; - if (params()->rx_thread) + if (params().rx_thread) reg |= M5REG_RX_THREAD; - if (params()->tx_thread) + if (params().tx_thread) reg |= M5REG_TX_THREAD; - if (params()->rss) + if (params().rss) reg |= M5REG_RSS; break; @@ -2367,7 +2367,7 @@ NSGigE::unserialize(CheckpointIn &cp) } NSGigE * -NSGigEParams::create() +NSGigEParams::create() const { - return new NSGigE(this); + return new NSGigE(*this); } diff --git a/src/dev/net/ns_gige.hh b/src/dev/net/ns_gige.hh index d5018932a..f87896223 100644 --- a/src/dev/net/ns_gige.hh +++ b/src/dev/net/ns_gige.hh @@ -327,11 +327,13 @@ class NSGigE : public EtherDevBase public: typedef NSGigEParams Params; - const Params *params() const { - return dynamic_cast(_params); + const Params & + params() const + { + return dynamic_cast(_params); } - NSGigE(Params *params); + NSGigE(const Params ¶ms); ~NSGigE(); Port &getPort(const std::string &if_name, diff --git a/src/dev/net/sinic.cc b/src/dev/net/sinic.cc index bc6fdbd5a..85eba6f07 100644 --- a/src/dev/net/sinic.cc +++ b/src/dev/net/sinic.cc @@ -71,27 +71,26 @@ const char *TxStateStrings[] = // // Sinic PCI Device // -Base::Base(const Params *p) +Base::Base(const Params &p) : EtherDevBase(p), rxEnable(false), txEnable(false), - intrDelay(p->intr_delay), intrTick(0), cpuIntrEnable(false), + intrDelay(p.intr_delay), intrTick(0), cpuIntrEnable(false), cpuPendingIntr(false), intrEvent(0), interface(NULL) { } -Device::Device(const Params *p) +Device::Device(const Params &p) : Base(p), rxUnique(0), txUnique(0), - virtualRegs(p->virtual_count < 1 ? 1 : p->virtual_count), - rxFifo(p->rx_fifo_size), txFifo(p->tx_fifo_size), + virtualRegs(p.virtual_count < 1 ? 1 : p.virtual_count), + rxFifo(p.rx_fifo_size), txFifo(p.tx_fifo_size), rxKickTick(0), txKickTick(0), txEvent([this]{ txEventTransmit(); }, name()), rxDmaEvent([this]{ rxDmaDone(); }, name()), txDmaEvent([this]{ txDmaDone(); }, name()), - dmaReadDelay(p->dma_read_delay), dmaReadFactor(p->dma_read_factor), - dmaWriteDelay(p->dma_write_delay), dmaWriteFactor(p->dma_write_factor) + dmaReadDelay(p.dma_read_delay), dmaReadFactor(p.dma_read_factor), + dmaWriteDelay(p.dma_write_delay), dmaWriteFactor(p.dma_write_factor) { interface = new Interface(name() + ".int0", this); reset(); - } Device::~Device() @@ -611,36 +610,36 @@ Device::reset() memset(®s, 0, sizeof(regs)); regs.Config = 0; - if (params()->rx_thread) + if (params().rx_thread) regs.Config |= Config_RxThread; - if (params()->tx_thread) + if (params().tx_thread) regs.Config |= Config_TxThread; - if (params()->rss) + if (params().rss) regs.Config |= Config_RSS; - if (params()->zero_copy) + if (params().zero_copy) regs.Config |= Config_ZeroCopy; - if (params()->delay_copy) + if (params().delay_copy) regs.Config |= Config_DelayCopy; - if (params()->virtual_addr) + if (params().virtual_addr) regs.Config |= Config_Vaddr; - if (params()->delay_copy && params()->zero_copy) + if (params().delay_copy && params().zero_copy) panic("Can't delay copy and zero copy"); regs.IntrMask = Intr_Soft | Intr_RxHigh | Intr_RxPacket | Intr_TxLow; - regs.RxMaxCopy = params()->rx_max_copy; - regs.TxMaxCopy = params()->tx_max_copy; - regs.ZeroCopySize = params()->zero_copy_size; - regs.ZeroCopyMark = params()->zero_copy_threshold; - regs.VirtualCount = params()->virtual_count; - regs.RxMaxIntr = params()->rx_max_intr; - regs.RxFifoSize = params()->rx_fifo_size; - regs.TxFifoSize = params()->tx_fifo_size; - regs.RxFifoLow = params()->rx_fifo_low_mark; - regs.TxFifoLow = params()->tx_fifo_threshold; - regs.RxFifoHigh = params()->rx_fifo_threshold; - regs.TxFifoHigh = params()->tx_fifo_high_mark; - regs.HwAddr = params()->hardware_address; + regs.RxMaxCopy = params().rx_max_copy; + regs.TxMaxCopy = params().tx_max_copy; + regs.ZeroCopySize = params().zero_copy_size; + regs.ZeroCopyMark = params().zero_copy_threshold; + regs.VirtualCount = params().virtual_count; + regs.RxMaxIntr = params().rx_max_intr; + regs.RxFifoSize = params().rx_fifo_size; + regs.TxFifoSize = params().tx_fifo_size; + regs.RxFifoLow = params().rx_fifo_low_mark; + regs.TxFifoLow = params().tx_fifo_threshold; + regs.RxFifoHigh = params().rx_fifo_threshold; + regs.TxFifoHigh = params().tx_fifo_high_mark; + regs.HwAddr = params().hardware_address; if (regs.RxMaxCopy < regs.ZeroCopyMark) panic("Must be able to copy at least as many bytes as the threshold"); @@ -1500,7 +1499,7 @@ Device::unserialize(CheckpointIn &cp) } // namespace Sinic Sinic::Device * -SinicParams::create() +SinicParams::create() const { - return new Sinic::Device(this); + return new Sinic::Device(*this); } diff --git a/src/dev/net/sinic.hh b/src/dev/net/sinic.hh index becfce03e..1cf7f6f41 100644 --- a/src/dev/net/sinic.hh +++ b/src/dev/net/sinic.hh @@ -77,8 +77,8 @@ class Base : public EtherDevBase */ public: typedef SinicParams Params; - const Params *params() const { return (const Params *)_params; } - Base(const Params *p); + const Params ¶ms() const { return (const Params &)_params; } + Base(const Params &p); }; class Device : public Base @@ -290,7 +290,7 @@ class Device : public Base void unserialize(CheckpointIn &cp) override; public: - Device(const Params *p); + Device(const Params &p); ~Device(); }; diff --git a/src/dev/pci/copy_engine.cc b/src/dev/pci/copy_engine.cc index d526a3e07..7576bff2e 100644 --- a/src/dev/pci/copy_engine.cc +++ b/src/dev/pci/copy_engine.cc @@ -57,12 +57,12 @@ using namespace CopyEngineReg; -CopyEngine::CopyEngine(const Params *p) +CopyEngine::CopyEngine(const Params &p) : PciDevice(p) { // All Reg regs are initialized to 0 by default - regs.chanCount = p->ChanCnt; - regs.xferCap = findMsbSet(p->XferCap); + regs.chanCount = p.ChanCnt; + regs.xferCap = findMsbSet(p.XferCap); regs.attnStatus = 0; if (regs.chanCount > 64) @@ -78,8 +78,8 @@ CopyEngine::CopyEngine(const Params *p) CopyEngine::CopyEngineChannel::CopyEngineChannel(CopyEngine *_ce, int cid) : cePort(_ce, _ce->sys), ce(_ce), channelId(cid), busy(false), underReset(false), - refreshNext(false), latBeforeBegin(ce->params()->latBeforeBegin), - latAfterCompletion(ce->params()->latAfterCompletion), + refreshNext(false), latBeforeBegin(ce->params().latBeforeBegin), + latAfterCompletion(ce->params().latAfterCompletion), completionDataReg(0), nextState(Idle), fetchCompleteEvent([this]{ fetchDescComplete(); }, name()), addrCompleteEvent([this]{ fetchAddrComplete(); }, name()), @@ -94,7 +94,7 @@ CopyEngine::CopyEngineChannel::CopyEngineChannel(CopyEngine *_ce, int cid) curDmaDesc = new DmaDesc; memset(curDmaDesc, 0, sizeof(DmaDesc)); - copyBuffer = new uint8_t[ce->params()->XferCap]; + copyBuffer = new uint8_t[ce->params().XferCap]; } CopyEngine::~CopyEngine() @@ -675,7 +675,7 @@ CopyEngine::CopyEngineChannel::serialize(CheckpointOut &cp) const int nextState = this->nextState; SERIALIZE_SCALAR(nextState); arrayParamOut(cp, "curDmaDesc", (uint8_t*)curDmaDesc, sizeof(DmaDesc)); - SERIALIZE_ARRAY(copyBuffer, ce->params()->XferCap); + SERIALIZE_ARRAY(copyBuffer, ce->params().XferCap); cr.serialize(cp); } @@ -693,7 +693,7 @@ CopyEngine::CopyEngineChannel::unserialize(CheckpointIn &cp) UNSERIALIZE_SCALAR(nextState); this->nextState = (ChannelState)nextState; arrayParamIn(cp, "curDmaDesc", (uint8_t*)curDmaDesc, sizeof(DmaDesc)); - UNSERIALIZE_ARRAY(copyBuffer, ce->params()->XferCap); + UNSERIALIZE_ARRAY(copyBuffer, ce->params().XferCap); cr.unserialize(cp); } @@ -732,7 +732,7 @@ CopyEngine::CopyEngineChannel::drainResume() } CopyEngine * -CopyEngineParams::create() +CopyEngineParams::create() const { - return new CopyEngine(this); + return new CopyEngine(*this); } diff --git a/src/dev/pci/copy_engine.hh b/src/dev/pci/copy_engine.hh index eba8a9bb8..ec3c45304 100644 --- a/src/dev/pci/copy_engine.hh +++ b/src/dev/pci/copy_engine.hh @@ -150,12 +150,12 @@ class CopyEngine : public PciDevice public: typedef CopyEngineParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - CopyEngine(const Params *params); + CopyEngine(const Params ¶ms); ~CopyEngine(); void regStats() override; diff --git a/src/dev/pci/device.cc b/src/dev/pci/device.cc index 1158bc6ef..be132212a 100644 --- a/src/dev/pci/device.cc +++ b/src/dev/pci/device.cc @@ -59,86 +59,86 @@ #include "sim/byteswap.hh" #include "sim/core.hh" -PciDevice::PciDevice(const PciDeviceParams *p) +PciDevice::PciDevice(const PciDeviceParams &p) : DmaDevice(p), - _busAddr(p->pci_bus, p->pci_dev, p->pci_func), - PMCAP_BASE(p->PMCAPBaseOffset), - PMCAP_ID_OFFSET(p->PMCAPBaseOffset+PMCAP_ID), - PMCAP_PC_OFFSET(p->PMCAPBaseOffset+PMCAP_PC), - PMCAP_PMCS_OFFSET(p->PMCAPBaseOffset+PMCAP_PMCS), - MSICAP_BASE(p->MSICAPBaseOffset), - MSIXCAP_BASE(p->MSIXCAPBaseOffset), - MSIXCAP_ID_OFFSET(p->MSIXCAPBaseOffset+MSIXCAP_ID), - MSIXCAP_MXC_OFFSET(p->MSIXCAPBaseOffset+MSIXCAP_MXC), - MSIXCAP_MTAB_OFFSET(p->MSIXCAPBaseOffset+MSIXCAP_MTAB), - MSIXCAP_MPBA_OFFSET(p->MSIXCAPBaseOffset+MSIXCAP_MPBA), - PXCAP_BASE(p->PXCAPBaseOffset), - - hostInterface(p->host->registerDevice(this, _busAddr, - (PciIntPin)p->InterruptPin)), - pioDelay(p->pio_latency), - configDelay(p->config_latency) + _busAddr(p.pci_bus, p.pci_dev, p.pci_func), + PMCAP_BASE(p.PMCAPBaseOffset), + PMCAP_ID_OFFSET(p.PMCAPBaseOffset+PMCAP_ID), + PMCAP_PC_OFFSET(p.PMCAPBaseOffset+PMCAP_PC), + PMCAP_PMCS_OFFSET(p.PMCAPBaseOffset+PMCAP_PMCS), + MSICAP_BASE(p.MSICAPBaseOffset), + MSIXCAP_BASE(p.MSIXCAPBaseOffset), + MSIXCAP_ID_OFFSET(p.MSIXCAPBaseOffset+MSIXCAP_ID), + MSIXCAP_MXC_OFFSET(p.MSIXCAPBaseOffset+MSIXCAP_MXC), + MSIXCAP_MTAB_OFFSET(p.MSIXCAPBaseOffset+MSIXCAP_MTAB), + MSIXCAP_MPBA_OFFSET(p.MSIXCAPBaseOffset+MSIXCAP_MPBA), + PXCAP_BASE(p.PXCAPBaseOffset), + + hostInterface(p.host->registerDevice(this, _busAddr, + (PciIntPin)p.InterruptPin)), + pioDelay(p.pio_latency), + configDelay(p.config_latency) { - fatal_if(p->InterruptPin >= 5, - "Invalid PCI interrupt '%i' specified.", p->InterruptPin); - - config.vendor = htole(p->VendorID); - config.device = htole(p->DeviceID); - config.command = htole(p->Command); - config.status = htole(p->Status); - config.revision = htole(p->Revision); - config.progIF = htole(p->ProgIF); - config.subClassCode = htole(p->SubClassCode); - config.classCode = htole(p->ClassCode); - config.cacheLineSize = htole(p->CacheLineSize); - config.latencyTimer = htole(p->LatencyTimer); - config.headerType = htole(p->HeaderType); - config.bist = htole(p->BIST); - - config.baseAddr[0] = htole(p->BAR0); - config.baseAddr[1] = htole(p->BAR1); - config.baseAddr[2] = htole(p->BAR2); - config.baseAddr[3] = htole(p->BAR3); - config.baseAddr[4] = htole(p->BAR4); - config.baseAddr[5] = htole(p->BAR5); - config.cardbusCIS = htole(p->CardbusCIS); - config.subsystemVendorID = htole(p->SubsystemVendorID); - config.subsystemID = htole(p->SubsystemID); - config.expansionROM = htole(p->ExpansionROM); - config.capabilityPtr = htole(p->CapabilityPtr); + fatal_if(p.InterruptPin >= 5, + "Invalid PCI interrupt '%i' specified.", p.InterruptPin); + + config.vendor = htole(p.VendorID); + config.device = htole(p.DeviceID); + config.command = htole(p.Command); + config.status = htole(p.Status); + config.revision = htole(p.Revision); + config.progIF = htole(p.ProgIF); + config.subClassCode = htole(p.SubClassCode); + config.classCode = htole(p.ClassCode); + config.cacheLineSize = htole(p.CacheLineSize); + config.latencyTimer = htole(p.LatencyTimer); + config.headerType = htole(p.HeaderType); + config.bist = htole(p.BIST); + + config.baseAddr[0] = htole(p.BAR0); + config.baseAddr[1] = htole(p.BAR1); + config.baseAddr[2] = htole(p.BAR2); + config.baseAddr[3] = htole(p.BAR3); + config.baseAddr[4] = htole(p.BAR4); + config.baseAddr[5] = htole(p.BAR5); + config.cardbusCIS = htole(p.CardbusCIS); + config.subsystemVendorID = htole(p.SubsystemVendorID); + config.subsystemID = htole(p.SubsystemID); + config.expansionROM = htole(p.ExpansionROM); + config.capabilityPtr = htole(p.CapabilityPtr); // Zero out the 7 bytes of reserved space in the PCI Config space register. bzero(config.reserved, 7*sizeof(uint8_t)); - config.interruptLine = htole(p->InterruptLine); - config.interruptPin = htole(p->InterruptPin); - config.minimumGrant = htole(p->MinimumGrant); - config.maximumLatency = htole(p->MaximumLatency); + config.interruptLine = htole(p.InterruptLine); + config.interruptPin = htole(p.InterruptPin); + config.minimumGrant = htole(p.MinimumGrant); + config.maximumLatency = htole(p.MaximumLatency); // Initialize the capability lists // These structs are bitunions, meaning the data is stored in host // endianess and must be converted to Little Endian when accessed // by the guest // PMCAP - pmcap.pid = (uint16_t)p->PMCAPCapId; // pid.cid - pmcap.pid |= (uint16_t)p->PMCAPNextCapability << 8; //pid.next - pmcap.pc = p->PMCAPCapabilities; - pmcap.pmcs = p->PMCAPCtrlStatus; + pmcap.pid = (uint16_t)p.PMCAPCapId; // pid.cid + pmcap.pid |= (uint16_t)p.PMCAPNextCapability << 8; //pid.next + pmcap.pc = p.PMCAPCapabilities; + pmcap.pmcs = p.PMCAPCtrlStatus; // MSICAP - msicap.mid = (uint16_t)p->MSICAPCapId; //mid.cid - msicap.mid |= (uint16_t)p->MSICAPNextCapability << 8; //mid.next - msicap.mc = p->MSICAPMsgCtrl; - msicap.ma = p->MSICAPMsgAddr; - msicap.mua = p->MSICAPMsgUpperAddr; - msicap.md = p->MSICAPMsgData; - msicap.mmask = p->MSICAPMaskBits; - msicap.mpend = p->MSICAPPendingBits; + msicap.mid = (uint16_t)p.MSICAPCapId; //mid.cid + msicap.mid |= (uint16_t)p.MSICAPNextCapability << 8; //mid.next + msicap.mc = p.MSICAPMsgCtrl; + msicap.ma = p.MSICAPMsgAddr; + msicap.mua = p.MSICAPMsgUpperAddr; + msicap.md = p.MSICAPMsgData; + msicap.mmask = p.MSICAPMaskBits; + msicap.mpend = p.MSICAPPendingBits; // MSIXCAP - msixcap.mxid = (uint16_t)p->MSIXCAPCapId; //mxid.cid - msixcap.mxid |= (uint16_t)p->MSIXCAPNextCapability << 8; //mxid.next - msixcap.mxc = p->MSIXMsgCtrl; - msixcap.mtab = p->MSIXTableOffset; - msixcap.mpba = p->MSIXPbaOffset; + msixcap.mxid = (uint16_t)p.MSIXCAPCapId; //mxid.cid + msixcap.mxid |= (uint16_t)p.MSIXCAPNextCapability << 8; //mxid.next + msixcap.mxc = p.MSIXMsgCtrl; + msixcap.mtab = p.MSIXTableOffset; + msixcap.mpba = p.MSIXPbaOffset; // allocate MSIX structures if MSIXCAP_BASE // indicates the MSIXCAP is being used by having a @@ -172,35 +172,35 @@ PciDevice::PciDevice(const PciDeviceParams *p) } // PXCAP - pxcap.pxid = (uint16_t)p->PXCAPCapId; //pxid.cid - pxcap.pxid |= (uint16_t)p->PXCAPNextCapability << 8; //pxid.next - pxcap.pxcap = p->PXCAPCapabilities; - pxcap.pxdcap = p->PXCAPDevCapabilities; - pxcap.pxdc = p->PXCAPDevCtrl; - pxcap.pxds = p->PXCAPDevStatus; - pxcap.pxlcap = p->PXCAPLinkCap; - pxcap.pxlc = p->PXCAPLinkCtrl; - pxcap.pxls = p->PXCAPLinkStatus; - pxcap.pxdcap2 = p->PXCAPDevCap2; - pxcap.pxdc2 = p->PXCAPDevCtrl2; - - BARSize[0] = p->BAR0Size; - BARSize[1] = p->BAR1Size; - BARSize[2] = p->BAR2Size; - BARSize[3] = p->BAR3Size; - BARSize[4] = p->BAR4Size; - BARSize[5] = p->BAR5Size; - - legacyIO[0] = p->BAR0LegacyIO; - legacyIO[1] = p->BAR1LegacyIO; - legacyIO[2] = p->BAR2LegacyIO; - legacyIO[3] = p->BAR3LegacyIO; - legacyIO[4] = p->BAR4LegacyIO; - legacyIO[5] = p->BAR5LegacyIO; + pxcap.pxid = (uint16_t)p.PXCAPCapId; //pxid.cid + pxcap.pxid |= (uint16_t)p.PXCAPNextCapability << 8; //pxid.next + pxcap.pxcap = p.PXCAPCapabilities; + pxcap.pxdcap = p.PXCAPDevCapabilities; + pxcap.pxdc = p.PXCAPDevCtrl; + pxcap.pxds = p.PXCAPDevStatus; + pxcap.pxlcap = p.PXCAPLinkCap; + pxcap.pxlc = p.PXCAPLinkCtrl; + pxcap.pxls = p.PXCAPLinkStatus; + pxcap.pxdcap2 = p.PXCAPDevCap2; + pxcap.pxdc2 = p.PXCAPDevCtrl2; + + BARSize[0] = p.BAR0Size; + BARSize[1] = p.BAR1Size; + BARSize[2] = p.BAR2Size; + BARSize[3] = p.BAR3Size; + BARSize[4] = p.BAR4Size; + BARSize[5] = p.BAR5Size; + + legacyIO[0] = p.BAR0LegacyIO; + legacyIO[1] = p.BAR1LegacyIO; + legacyIO[2] = p.BAR2LegacyIO; + legacyIO[3] = p.BAR3LegacyIO; + legacyIO[4] = p.BAR4LegacyIO; + legacyIO[5] = p.BAR5LegacyIO; for (int i = 0; i < 6; ++i) { if (legacyIO[i]) { - BARAddrs[i] = p->LegacyIOBase + letoh(config.baseAddr[i]); + BARAddrs[i] = p.LegacyIOBase + letoh(config.baseAddr[i]); config.baseAddr[i] = 0; } else { BARAddrs[i] = 0; diff --git a/src/dev/pci/device.hh b/src/dev/pci/device.hh index 6f28376bb..73e38566a 100644 --- a/src/dev/pci/device.hh +++ b/src/dev/pci/device.hh @@ -212,7 +212,7 @@ class PciDevice : public DmaDevice * config file object PCIConfigData and registers the device with * a PciHost object. */ - PciDevice(const PciDeviceParams *params); + PciDevice(const PciDeviceParams ¶ms); /** * Serialize this object to the given output stream. diff --git a/src/dev/pci/host.cc b/src/dev/pci/host.cc index 53f6b3275..84b140358 100644 --- a/src/dev/pci/host.cc +++ b/src/dev/pci/host.cc @@ -45,7 +45,7 @@ #include "params/GenericPciHost.hh" #include "params/PciHost.hh" -PciHost::PciHost(const PciHostParams *p) +PciHost::PciHost(const PciHostParams &p) : PioDevice(p) { } @@ -115,13 +115,13 @@ PciHost::DeviceInterface::clearInt() } -GenericPciHost::GenericPciHost(const GenericPciHostParams *p) +GenericPciHost::GenericPciHost(const GenericPciHostParams &p) : PciHost(p), - platform(*p->platform), - confBase(p->conf_base), confSize(p->conf_size), - confDeviceBits(p->conf_device_bits), - pciPioBase(p->pci_pio_base), pciMemBase(p->pci_mem_base), - pciDmaBase(p->pci_dma_base) + platform(*p.platform), + confBase(p.conf_base), confSize(p.conf_size), + confDeviceBits(p.conf_device_bits), + pciPioBase(p.pci_pio_base), pciMemBase(p.pci_mem_base), + pciDmaBase(p.pci_dma_base) { } @@ -219,7 +219,7 @@ GenericPciHost::mapPciInterrupt(const PciBusAddr &addr, PciIntPin pin) const GenericPciHost * -GenericPciHostParams::create() +GenericPciHostParams::create() const { - return new GenericPciHost(this); + return new GenericPciHost(*this); } diff --git a/src/dev/pci/host.hh b/src/dev/pci/host.hh index cacb5d1de..8cf5f34e1 100644 --- a/src/dev/pci/host.hh +++ b/src/dev/pci/host.hh @@ -72,7 +72,7 @@ class Platform; class PciHost : public PioDevice { public: - PciHost(const PciHostParams *p); + PciHost(const PciHostParams &p); virtual ~PciHost(); public: @@ -273,7 +273,7 @@ class PciHost : public PioDevice class GenericPciHost : public PciHost { public: - GenericPciHost(const GenericPciHostParams *p); + GenericPciHost(const GenericPciHostParams &p); virtual ~GenericPciHost(); public: // PioDevice diff --git a/src/dev/platform.cc b/src/dev/platform.cc index 0abdf5435..718f76711 100644 --- a/src/dev/platform.cc +++ b/src/dev/platform.cc @@ -33,8 +33,8 @@ using namespace std; -Platform::Platform(const Params *p) - : SimObject(p), intrctrl(p->intrctrl) +Platform::Platform(const Params &p) + : SimObject(p), intrctrl(p.intrctrl) { } diff --git a/src/dev/platform.hh b/src/dev/platform.hh index ba5322a09..3b586c6aa 100644 --- a/src/dev/platform.hh +++ b/src/dev/platform.hh @@ -54,7 +54,7 @@ class Platform : public SimObject public: typedef PlatformParams Params; - Platform(const Params *p); + Platform(const Params &p); virtual ~Platform(); /** diff --git a/src/dev/ps2/device.cc b/src/dev/ps2/device.cc index 81c26187b..c32288e3e 100644 --- a/src/dev/ps2/device.cc +++ b/src/dev/ps2/device.cc @@ -46,7 +46,7 @@ #include "dev/ps2/types.hh" #include "params/PS2Device.hh" -PS2Device::PS2Device(const PS2DeviceParams *p) +PS2Device::PS2Device(const PS2DeviceParams &p) : SimObject(p) { inBuffer.reserve(16); diff --git a/src/dev/ps2/device.hh b/src/dev/ps2/device.hh index f068d543a..9671876df 100644 --- a/src/dev/ps2/device.hh +++ b/src/dev/ps2/device.hh @@ -51,7 +51,7 @@ struct PS2DeviceParams; class PS2Device : public SimObject { public: - PS2Device(const PS2DeviceParams *p); + PS2Device(const PS2DeviceParams &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; diff --git a/src/dev/ps2/keyboard.cc b/src/dev/ps2/keyboard.cc index a825ee1fc..2075c4bbe 100644 --- a/src/dev/ps2/keyboard.cc +++ b/src/dev/ps2/keyboard.cc @@ -46,13 +46,13 @@ #include "dev/ps2/types.hh" #include "params/PS2Keyboard.hh" -PS2Keyboard::PS2Keyboard(const PS2KeyboardParams *p) +PS2Keyboard::PS2Keyboard(const PS2KeyboardParams &p) : PS2Device(p), shiftDown(false), enabled(false) { - if (p->vnc) - p->vnc->setKeyboard(this); + if (p.vnc) + p.vnc->setKeyboard(this); } void @@ -174,7 +174,7 @@ PS2Keyboard::keyPress(uint32_t key, bool down) PS2Keyboard * -PS2KeyboardParams::create() +PS2KeyboardParams::create() const { - return new PS2Keyboard(this); + return new PS2Keyboard(*this); } diff --git a/src/dev/ps2/keyboard.hh b/src/dev/ps2/keyboard.hh index eaed055d6..68514cc4f 100644 --- a/src/dev/ps2/keyboard.hh +++ b/src/dev/ps2/keyboard.hh @@ -56,7 +56,7 @@ class PS2Keyboard : public PS2Device, VncKeyboard bool enabled; public: - PS2Keyboard(const PS2KeyboardParams *p); + PS2Keyboard(const PS2KeyboardParams &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; diff --git a/src/dev/ps2/mouse.cc b/src/dev/ps2/mouse.cc index 7966bf866..756b51736 100644 --- a/src/dev/ps2/mouse.cc +++ b/src/dev/ps2/mouse.cc @@ -46,7 +46,7 @@ #include "dev/ps2/types.hh" #include "params/PS2Mouse.hh" -PS2Mouse::PS2Mouse(const PS2MouseParams *p) +PS2Mouse::PS2Mouse(const PS2MouseParams &p) : PS2Device(p), status(0), resolution(4), sampleRate(100) { @@ -168,7 +168,7 @@ PS2Mouse::unserialize(CheckpointIn &cp) } PS2Mouse * -PS2MouseParams::create() +PS2MouseParams::create() const { - return new PS2Mouse(this); + return new PS2Mouse(*this); } diff --git a/src/dev/ps2/mouse.hh b/src/dev/ps2/mouse.hh index 0378c1fe1..7a1ef21c9 100644 --- a/src/dev/ps2/mouse.hh +++ b/src/dev/ps2/mouse.hh @@ -61,7 +61,7 @@ class PS2Mouse : public PS2Device uint8_t sampleRate; public: - PS2Mouse(const PS2MouseParams *p); + PS2Mouse(const PS2MouseParams &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; diff --git a/src/dev/ps2/touchkit.cc b/src/dev/ps2/touchkit.cc index 7d651a648..7ffd273d8 100644 --- a/src/dev/ps2/touchkit.cc +++ b/src/dev/ps2/touchkit.cc @@ -46,9 +46,9 @@ #include "dev/ps2/types.hh" #include "params/PS2TouchKit.hh" -PS2TouchKit::PS2TouchKit(const PS2TouchKitParams *p) +PS2TouchKit::PS2TouchKit(const PS2TouchKitParams &p) : PS2Device(p), - vnc(p->vnc), + vnc(p.vnc), enabled(false), touchKitEnabled(false) { if (vnc) @@ -206,7 +206,7 @@ PS2TouchKit::mouseAt(uint16_t x, uint16_t y, uint8_t buttons) } PS2TouchKit * -PS2TouchKitParams::create() +PS2TouchKitParams::create() const { - return new PS2TouchKit(this); + return new PS2TouchKit(*this); } diff --git a/src/dev/ps2/touchkit.hh b/src/dev/ps2/touchkit.hh index 383bda909..161cf392a 100644 --- a/src/dev/ps2/touchkit.hh +++ b/src/dev/ps2/touchkit.hh @@ -58,7 +58,7 @@ class PS2TouchKit : public PS2Device, public VncMouse }; public: - PS2TouchKit(const PS2TouchKitParams *p); + PS2TouchKit(const PS2TouchKitParams &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; diff --git a/src/dev/serial/serial.cc b/src/dev/serial/serial.cc index 366c3887a..90bdbf104 100644 --- a/src/dev/serial/serial.cc +++ b/src/dev/serial/serial.cc @@ -41,7 +41,7 @@ #include "params/SerialDevice.hh" #include "params/SerialNullDevice.hh" -SerialDevice::SerialDevice(const SerialDeviceParams *p) : SimObject(p) +SerialDevice::SerialDevice(const SerialDeviceParams &p) : SimObject(p) { } @@ -72,7 +72,7 @@ SerialDevice::notifyInterface() -SerialNullDevice::SerialNullDevice(const SerialNullDeviceParams *p) +SerialNullDevice::SerialNullDevice(const SerialNullDeviceParams &p) : SerialDevice(p) { } @@ -86,7 +86,7 @@ SerialNullDevice::readData() SerialNullDevice * -SerialNullDeviceParams::create() +SerialNullDeviceParams::create() const { - return new SerialNullDevice(this); + return new SerialNullDevice(*this); } diff --git a/src/dev/serial/serial.hh b/src/dev/serial/serial.hh index 838c0ab51..5ba4f7005 100644 --- a/src/dev/serial/serial.hh +++ b/src/dev/serial/serial.hh @@ -91,7 +91,7 @@ struct SerialNullDeviceParams; class SerialDevice : public SimObject { public: - SerialDevice(const SerialDeviceParams *p); + SerialDevice(const SerialDeviceParams &p); ~SerialDevice(); public: // Serial device API (UART->Device) @@ -146,7 +146,7 @@ class SerialDevice : public SimObject class SerialNullDevice : public SerialDevice { public: - SerialNullDevice(const SerialNullDeviceParams *p); + SerialNullDevice(const SerialNullDeviceParams &p); public: bool dataAvailable() const override { return false; } diff --git a/src/dev/serial/simple.cc b/src/dev/serial/simple.cc index 339d6b96d..6a7b94db8 100644 --- a/src/dev/serial/simple.cc +++ b/src/dev/serial/simple.cc @@ -42,8 +42,8 @@ #include "params/SimpleUart.hh" #include "sim/sim_exit.hh" -SimpleUart::SimpleUart(const SimpleUartParams *p) - : Uart(p, p->pio_size), byteOrder(p->byte_order), endOnEOT(p->end_on_eot) +SimpleUart::SimpleUart(const SimpleUartParams &p) + : Uart(p, p.pio_size), byteOrder(p.byte_order), endOnEOT(p.end_on_eot) { } @@ -80,7 +80,7 @@ SimpleUart::write(PacketPtr pkt) } SimpleUart * -SimpleUartParams::create() +SimpleUartParams::create() const { - return new SimpleUart(this); + return new SimpleUart(*this); } diff --git a/src/dev/serial/simple.hh b/src/dev/serial/simple.hh index cfcf8afbc..3d841f063 100644 --- a/src/dev/serial/simple.hh +++ b/src/dev/serial/simple.hh @@ -46,7 +46,7 @@ struct SimpleUartParams; class SimpleUart : public Uart { public: - SimpleUart(const SimpleUartParams *p); + SimpleUart(const SimpleUartParams &p); public: // PioDevice Tick read(PacketPtr pkt) override; diff --git a/src/dev/serial/terminal.cc b/src/dev/serial/terminal.cc index 8b420dae2..9d5254eba 100644 --- a/src/dev/serial/terminal.cc +++ b/src/dev/serial/terminal.cc @@ -115,9 +115,9 @@ Terminal::DataEvent::process(int revent) /* * Terminal code */ -Terminal::Terminal(const Params *p) +Terminal::Terminal(const Params &p) : SerialDevice(p), listenEvent(NULL), dataEvent(NULL), - number(p->number), data_fd(-1), txbuf(16384), rxbuf(16384), + number(p.number), data_fd(-1), txbuf(16384), rxbuf(16384), outfile(terminalDump(p)) #if TRACING_ON == 1 , linebuf(16384) @@ -126,8 +126,8 @@ Terminal::Terminal(const Params *p) if (outfile) outfile->stream()->setf(ios::unitbuf); - if (p->port) - listen(p->port); + if (p.port) + listen(p.port); } Terminal::~Terminal() @@ -143,9 +143,9 @@ Terminal::~Terminal() } OutputStream * -Terminal::terminalDump(const TerminalParams* p) +Terminal::terminalDump(const TerminalParams &p) { - switch (p->outfile) { + switch (p.outfile) { case TerminalDump::none: return nullptr; case TerminalDump::stdoutput: @@ -153,7 +153,7 @@ Terminal::terminalDump(const TerminalParams* p) case TerminalDump::stderror: return simout.findOrCreate("stderr"); case TerminalDump::file: - return simout.findOrCreate(p->name); + return simout.findOrCreate(p.name); default: panic("Invalid option\n"); } @@ -361,7 +361,7 @@ Terminal::writeData(uint8_t c) } Terminal * -TerminalParams::create() +TerminalParams::create() const { - return new Terminal(this); + return new Terminal(*this); } diff --git a/src/dev/serial/terminal.hh b/src/dev/serial/terminal.hh index b9fd7df43..ba9399874 100644 --- a/src/dev/serial/terminal.hh +++ b/src/dev/serial/terminal.hh @@ -93,9 +93,9 @@ class Terminal : public SerialDevice public: typedef TerminalParams Params; - Terminal(const Params *p); + Terminal(const Params &p); ~Terminal(); - OutputStream * terminalDump(const TerminalParams* p); + OutputStream * terminalDump(const TerminalParams &p); protected: ListenSocket listener; diff --git a/src/dev/serial/uart.cc b/src/dev/serial/uart.cc index 3e9131c48..60edf71a1 100644 --- a/src/dev/serial/uart.cc +++ b/src/dev/serial/uart.cc @@ -32,8 +32,8 @@ #include "dev/serial/uart.hh" -Uart::Uart(const Params *p, Addr pio_size) : - BasicPioDevice(p, pio_size), platform(p->platform), device(p->device) +Uart::Uart(const Params &p, Addr pio_size) : + BasicPioDevice(p, pio_size), platform(p.platform), device(p.device) { status = 0; diff --git a/src/dev/serial/uart.hh b/src/dev/serial/uart.hh index 21ea5789e..0291b42eb 100644 --- a/src/dev/serial/uart.hh +++ b/src/dev/serial/uart.hh @@ -52,12 +52,12 @@ class Uart : public BasicPioDevice public: typedef UartParams Params; - Uart(const Params *p, Addr pio_size); + Uart(const Params &p, Addr pio_size); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** diff --git a/src/dev/serial/uart8250.cc b/src/dev/serial/uart8250.cc index 0b6f07a91..4b7e9fe63 100644 --- a/src/dev/serial/uart8250.cc +++ b/src/dev/serial/uart8250.cc @@ -83,7 +83,7 @@ Uart8250::scheduleIntr(Event *event) } -Uart8250::Uart8250(const Params *p) +Uart8250::Uart8250(const Params &p) : Uart(p, 8), IER(0), DLAB(0), LCR(0), MCR(0), lastTxInt(0), txIntrEvent([this]{ processIntrEvent(TX_INT); }, "TX"), rxIntrEvent([this]{ processIntrEvent(RX_INT); }, "RX") @@ -321,7 +321,7 @@ Uart8250::unserialize(CheckpointIn &cp) } Uart8250 * -Uart8250Params::create() +Uart8250Params::create() const { - return new Uart8250(this); + return new Uart8250(*this); } diff --git a/src/dev/serial/uart8250.hh b/src/dev/serial/uart8250.hh index 3b934c9ff..3209416c6 100644 --- a/src/dev/serial/uart8250.hh +++ b/src/dev/serial/uart8250.hh @@ -79,12 +79,12 @@ class Uart8250 : public Uart public: typedef Uart8250Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Uart8250(const Params *p); + Uart8250(const Params &p); Tick read(PacketPtr pkt) override; Tick write(PacketPtr pkt) override; diff --git a/src/dev/sparc/dtod.cc b/src/dev/sparc/dtod.cc index 195e45b05..a1d096701 100644 --- a/src/dev/sparc/dtod.cc +++ b/src/dev/sparc/dtod.cc @@ -46,10 +46,10 @@ using namespace std; -DumbTOD::DumbTOD(const Params *p) +DumbTOD::DumbTOD(const Params &p) : BasicPioDevice(p, 0x08) { - struct tm tm = p->time; + struct tm tm = p.time; todTime = mkutctime(&tm); DPRINTFN("Real-time clock set to %s\n", asctime(&tm)); @@ -88,7 +88,7 @@ DumbTOD::unserialize(CheckpointIn &cp) } DumbTOD * -DumbTODParams::create() +DumbTODParams::create() const { - return new DumbTOD(this); + return new DumbTOD(*this); } diff --git a/src/dev/sparc/dtod.hh b/src/dev/sparc/dtod.hh index 68caa62e4..74da99063 100644 --- a/src/dev/sparc/dtod.hh +++ b/src/dev/sparc/dtod.hh @@ -50,12 +50,12 @@ class DumbTOD : public BasicPioDevice public: typedef DumbTODParams Params; - DumbTOD(const Params *p); + DumbTOD(const Params &p); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Tick read(PacketPtr pkt) override; diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc index 44e7dc867..d8f108738 100644 --- a/src/dev/sparc/iob.cc +++ b/src/dev/sparc/iob.cc @@ -51,16 +51,16 @@ #include "sim/faults.hh" #include "sim/system.hh" -Iob::Iob(const Params *p) - : PioDevice(p), ic(p->platform->intrctrl) +Iob::Iob(const Params &p) + : PioDevice(p), ic(p.platform->intrctrl) { iobManAddr = ULL(0x9800000000); iobManSize = ULL(0x0100000000); iobJBusAddr = ULL(0x9F00000000); iobJBusSize = ULL(0x0100000000); - assert(params()->system->threads.size() <= MaxNiagaraProcs); + assert(params().system->threads.size() <= MaxNiagaraProcs); - pioDelay = p->pio_latency; + pioDelay = p.pio_latency; for (int x = 0; x < NumDeviceIds; ++x) { intMan[x].cpu = 0; @@ -377,7 +377,7 @@ Iob::unserialize(CheckpointIn &cp) } Iob * -IobParams::create() +IobParams::create() const { - return new Iob(this); + return new Iob(*this); } diff --git a/src/dev/sparc/iob.hh b/src/dev/sparc/iob.hh index 3da17a370..8f2ff3cd6 100644 --- a/src/dev/sparc/iob.hh +++ b/src/dev/sparc/iob.hh @@ -122,12 +122,12 @@ class Iob : public PioDevice public: typedef IobParams Params; - Iob(const Params *p); + Iob(const Params &p); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Tick read(PacketPtr pkt) override; diff --git a/src/dev/sparc/mm_disk.cc b/src/dev/sparc/mm_disk.cc index f99f1f476..ab4562884 100644 --- a/src/dev/sparc/mm_disk.cc +++ b/src/dev/sparc/mm_disk.cc @@ -43,9 +43,9 @@ #include "sim/byteswap.hh" #include "sim/system.hh" -MmDisk::MmDisk(const Params *p) - : BasicPioDevice(p, p->image->size() * SectorSize), - image(p->image), curSector((off_t)-1), dirty(false) +MmDisk::MmDisk(const Params &p) + : BasicPioDevice(p, p.image->size() * SectorSize), + image(p.image), curSector((off_t)-1), dirty(false) { std::memset(&diskData, 0, SectorSize); } @@ -184,7 +184,7 @@ MmDisk::serialize(CheckpointOut &cp) const } MmDisk * -MmDiskParams::create() +MmDiskParams::create() const { - return new MmDisk(this); + return new MmDisk(*this); } diff --git a/src/dev/sparc/mm_disk.hh b/src/dev/sparc/mm_disk.hh index dffa5cf4c..03f9cae6f 100644 --- a/src/dev/sparc/mm_disk.hh +++ b/src/dev/sparc/mm_disk.hh @@ -48,12 +48,12 @@ class MmDisk : public BasicPioDevice public: typedef MmDiskParams Params; - MmDisk(const Params *p); + MmDisk(const Params &p); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } Tick read(PacketPtr pkt) override; diff --git a/src/dev/sparc/t1000.cc b/src/dev/sparc/t1000.cc index 6cf716a05..3cb99b53f 100644 --- a/src/dev/sparc/t1000.cc +++ b/src/dev/sparc/t1000.cc @@ -41,8 +41,8 @@ using namespace std; -T1000::T1000(const Params *p) - : Platform(p), system(p->system) +T1000::T1000(const Params &p) + : Platform(p), system(p.system) {} void @@ -97,7 +97,7 @@ T1000::calcPciMemAddr(Addr addr) } T1000 * -T1000Params::create() +T1000Params::create() const { - return new T1000(this); + return new T1000(*this); } diff --git a/src/dev/sparc/t1000.hh b/src/dev/sparc/t1000.hh index 4ec242faf..1cc8abf54 100644 --- a/src/dev/sparc/t1000.hh +++ b/src/dev/sparc/t1000.hh @@ -55,7 +55,7 @@ class T1000 : public Platform * @param s system the object belongs to * @param intctrl pointer to the interrupt controller */ - T1000(const Params *p); + T1000(const Params &p); /** * Cause the cpu to post a serial interrupt to the CPU. diff --git a/src/dev/storage/disk_image.cc b/src/dev/storage/disk_image.cc index e4b1ce02c..3ff29ae5c 100644 --- a/src/dev/storage/disk_image.cc +++ b/src/dev/storage/disk_image.cc @@ -55,12 +55,16 @@ using namespace std; // // Raw Disk image // -RawDiskImage::RawDiskImage(const Params* p) +RawDiskImage::RawDiskImage(const Params &p) : DiskImage(p), disk_size(0) -{ open(p->image_file, p->read_only); } +{ + open(p.image_file, p.read_only); +} RawDiskImage::~RawDiskImage() -{ close(); } +{ + close(); +} void RawDiskImage::notifyFork() @@ -68,9 +72,9 @@ RawDiskImage::notifyFork() if (initialized && !readonly) panic("Attempting to fork system with read-write raw disk image."); - const Params *p(dynamic_cast(params())); + const Params &p = dynamic_cast(params()); close(); - open(p->image_file, p->read_only); + open(p.image_file, p.read_only); } void @@ -156,9 +160,9 @@ RawDiskImage::write(const uint8_t *data, std::streampos offset) } RawDiskImage * -RawDiskImageParams::create() +RawDiskImageParams::create() const { - return new RawDiskImage(this); + return new RawDiskImage(*this); } //////////////////////////////////////////////////////////////////////// @@ -168,19 +172,19 @@ RawDiskImageParams::create() const uint32_t CowDiskImage::VersionMajor = 1; const uint32_t CowDiskImage::VersionMinor = 0; -CowDiskImage::CowDiskImage(const Params *p) - : DiskImage(p), filename(p->image_file), child(p->child), table(NULL) +CowDiskImage::CowDiskImage(const Params &p) + : DiskImage(p), filename(p.image_file), child(p.child), table(NULL) { if (filename.empty()) { - initSectorTable(p->table_size); + initSectorTable(p.table_size); } else { if (!open(filename)) { - if (p->read_only) + if (p.read_only) fatal("could not open read-only file"); - initSectorTable(p->table_size); + initSectorTable(p.table_size); } - if (!p->read_only) + if (!p.read_only) registerExitCallback([this]() { save(); }); } } @@ -199,7 +203,7 @@ CowDiskImage::~CowDiskImage() void CowDiskImage::notifyFork() { - if (!dynamic_cast(params())->read_only && + if (!dynamic_cast(params()).read_only && !filename.empty()) { inform("Disabling saving of COW image in forked child process.\n"); filename = ""; @@ -439,7 +443,7 @@ CowDiskImage::unserialize(CheckpointIn &cp) } CowDiskImage * -CowDiskImageParams::create() +CowDiskImageParams::create() const { - return new CowDiskImage(this); + return new CowDiskImage(*this); } diff --git a/src/dev/storage/disk_image.hh b/src/dev/storage/disk_image.hh index 41a00947f..aa60f1dcc 100644 --- a/src/dev/storage/disk_image.hh +++ b/src/dev/storage/disk_image.hh @@ -53,7 +53,7 @@ class DiskImage : public SimObject public: typedef DiskImageParams Params; - DiskImage(const Params *p) : SimObject(p), initialized(false) {} + DiskImage(const Params &p) : SimObject(p), initialized(false) {} virtual ~DiskImage() {} virtual std::streampos size() const = 0; @@ -77,7 +77,7 @@ class RawDiskImage : public DiskImage public: typedef RawDiskImageParams Params; - RawDiskImage(const Params *p); + RawDiskImage(const Params &p); ~RawDiskImage(); void notifyFork() override; @@ -120,7 +120,7 @@ class CowDiskImage : public DiskImage public: typedef CowDiskImageParams Params; - CowDiskImage(const Params *p); + CowDiskImage(const Params &p); ~CowDiskImage(); void notifyFork() override; diff --git a/src/dev/storage/ide_ctrl.cc b/src/dev/storage/ide_ctrl.cc index 5efa42b18..bf1d72f7f 100644 --- a/src/dev/storage/ide_ctrl.cc +++ b/src/dev/storage/ide_ctrl.cc @@ -88,7 +88,7 @@ IdeController::Channel::~Channel() { } -IdeController::IdeController(Params *p) +IdeController::IdeController(const Params &p) : PciDevice(p), primary(name() + ".primary", BARSize[0], BARSize[1]), secondary(name() + ".secondary", BARSize[2], BARSize[3]), bmiAddr(0), bmiSize(BARSize[4]), @@ -96,32 +96,32 @@ IdeController::IdeController(Params *p) secondaryTiming(htole(timeRegWithDecodeEn)), deviceTiming(0), udmaControl(0), udmaTiming(0), ideConfig(0), ioEnabled(false), bmEnabled(false), - ioShift(p->io_shift), ctrlOffset(p->ctrl_offset) + ioShift(p.io_shift), ctrlOffset(p.ctrl_offset) { // Assign the disks to channels - for (int i = 0; i < params()->disks.size(); i++) { - if (!params()->disks[i]) + for (int i = 0; i < params().disks.size(); i++) { + if (!params().disks[i]) continue; switch (i) { case 0: - primary.device0 = params()->disks[0]; + primary.device0 = params().disks[0]; break; case 1: - primary.device1 = params()->disks[1]; + primary.device1 = params().disks[1]; break; case 2: - secondary.device0 = params()->disks[2]; + secondary.device0 = params().disks[2]; break; case 3: - secondary.device1 = params()->disks[3]; + secondary.device1 = params().disks[3]; break; default: panic("IDE controllers support a maximum " "of 4 devices attached!\n"); } // Arbitrarily set the chunk size to 4K. - params()->disks[i]->setController(this, 4 * 1024); + params().disks[i]->setController(this, 4 * 1024); } primary.select(false); @@ -649,7 +649,7 @@ IdeController::Channel::unserialize(const std::string &base, CheckpointIn &cp) } IdeController * -IdeControllerParams::create() +IdeControllerParams::create() const { - return new IdeController(this); + return new IdeController(*this); } diff --git a/src/dev/storage/ide_ctrl.hh b/src/dev/storage/ide_ctrl.hh index 51e1603f1..470ffd928 100644 --- a/src/dev/storage/ide_ctrl.hh +++ b/src/dev/storage/ide_ctrl.hh @@ -143,8 +143,8 @@ class IdeController : public PciDevice public: typedef IdeControllerParams Params; - const Params *params() const { return (const Params *)_params; } - IdeController(Params *p); + const Params ¶ms() const { return (const Params &)_params; } + IdeController(const Params &p); /** See if a disk is selected based on its pointer */ bool isDiskSelected(IdeDisk *diskPtr); diff --git a/src/dev/storage/ide_disk.cc b/src/dev/storage/ide_disk.cc index 57fa07632..25516ec44 100644 --- a/src/dev/storage/ide_disk.cc +++ b/src/dev/storage/ide_disk.cc @@ -58,8 +58,8 @@ #include "sim/core.hh" #include "sim/sim_object.hh" -IdeDisk::IdeDisk(const Params *p) - : SimObject(p), ctrl(NULL), image(p->image), diskDelay(p->delay), +IdeDisk::IdeDisk(const Params &p) + : SimObject(p), ctrl(NULL), image(p.image), diskDelay(p.delay), dmaTransferEvent([this]{ doDmaTransfer(); }, name()), dmaReadCG(NULL), dmaReadWaitEvent([this]{ doDmaRead(); }, name()), @@ -70,7 +70,7 @@ IdeDisk::IdeDisk(const Params *p) dmaWriteEvent([this]{ dmaWriteDone(); }, name()) { // Reset the device state - reset(p->driveID); + reset(p.driveID); // fill out the drive ID structure memset(&driveID, 0, sizeof(struct ataparams)); @@ -1199,7 +1199,7 @@ IdeDisk::unserialize(CheckpointIn &cp) } IdeDisk * -IdeDiskParams::create() +IdeDiskParams::create() const { - return new IdeDisk(this); + return new IdeDisk(*this); } diff --git a/src/dev/storage/ide_disk.hh b/src/dev/storage/ide_disk.hh index 90cbf5705..ba2bad2a1 100644 --- a/src/dev/storage/ide_disk.hh +++ b/src/dev/storage/ide_disk.hh @@ -261,7 +261,7 @@ class IdeDisk : public SimObject public: typedef IdeDiskParams Params; - IdeDisk(const Params *p); + IdeDisk(const Params &p); /** * Delete the data buffer. diff --git a/src/dev/storage/simple_disk.cc b/src/dev/storage/simple_disk.cc index 0b37a884f..1e16685df 100644 --- a/src/dev/storage/simple_disk.cc +++ b/src/dev/storage/simple_disk.cc @@ -50,8 +50,8 @@ using namespace std; -SimpleDisk::SimpleDisk(const Params *p) - : SimObject(p), system(p->system), image(p->disk) +SimpleDisk::SimpleDisk(const Params &p) + : SimObject(p), system(p.system), image(p.disk) {} SimpleDisk::~SimpleDisk() @@ -84,7 +84,7 @@ SimpleDisk::write(Addr addr, baddr_t block, int count) } SimpleDisk * -SimpleDiskParams::create() +SimpleDiskParams::create() const { - return new SimpleDisk(this); + return new SimpleDisk(*this); } diff --git a/src/dev/storage/simple_disk.hh b/src/dev/storage/simple_disk.hh index 726e2cc7c..e0442c677 100644 --- a/src/dev/storage/simple_disk.hh +++ b/src/dev/storage/simple_disk.hh @@ -53,7 +53,7 @@ class SimpleDisk : public SimObject public: typedef SimpleDiskParams Params; - SimpleDisk(const Params *p); + SimpleDisk(const Params &p); ~SimpleDisk(); void read(Addr addr, baddr_t block, int count) const; diff --git a/src/dev/virtio/base.cc b/src/dev/virtio/base.cc index 84841af4c..0443fb498 100644 --- a/src/dev/virtio/base.cc +++ b/src/dev/virtio/base.cc @@ -322,11 +322,11 @@ VirtQueue::onNotify() } -VirtIODeviceBase::VirtIODeviceBase(Params *params, DeviceId id, +VirtIODeviceBase::VirtIODeviceBase(const Params ¶ms, DeviceId id, size_t config_size, FeatureBits features) : SimObject(params), guestFeatures(0), - byteOrder(params->byte_order), + byteOrder(params.byte_order), deviceId(id), configSize(config_size), deviceFeatures(features), _deviceStatus(0), _queueSelect(0) { @@ -480,13 +480,13 @@ VirtIODeviceBase::registerQueue(VirtQueue &queue) } -VirtIODummyDevice::VirtIODummyDevice(VirtIODummyDeviceParams *params) +VirtIODummyDevice::VirtIODummyDevice(const VirtIODummyDeviceParams ¶ms) : VirtIODeviceBase(params, ID_INVALID, 0, 0) { } VirtIODummyDevice * -VirtIODummyDeviceParams::create() +VirtIODummyDeviceParams::create() const { - return new VirtIODummyDevice(this); + return new VirtIODummyDevice(*this); } diff --git a/src/dev/virtio/base.hh b/src/dev/virtio/base.hh index e03237285..776c2a351 100644 --- a/src/dev/virtio/base.hh +++ b/src/dev/virtio/base.hh @@ -577,7 +577,7 @@ class VirtIODeviceBase : public SimObject EndBitUnion(DeviceStatus) typedef VirtIODeviceBaseParams Params; - VirtIODeviceBase(Params *params, DeviceId id, size_t config_size, + VirtIODeviceBase(const Params ¶ms, DeviceId id, size_t config_size, FeatureBits features); virtual ~VirtIODeviceBase(); @@ -877,7 +877,7 @@ class VirtIODeviceBase : public SimObject class VirtIODummyDevice : public VirtIODeviceBase { public: - VirtIODummyDevice(VirtIODummyDeviceParams *params); + VirtIODummyDevice(const VirtIODummyDeviceParams ¶ms); protected: /** VirtIO device ID */ diff --git a/src/dev/virtio/block.cc b/src/dev/virtio/block.cc index c03f9a577..e7d7c4164 100644 --- a/src/dev/virtio/block.cc +++ b/src/dev/virtio/block.cc @@ -41,11 +41,11 @@ #include "params/VirtIOBlock.hh" #include "sim/system.hh" -VirtIOBlock::VirtIOBlock(Params *params) +VirtIOBlock::VirtIOBlock(const Params ¶ms) : VirtIODeviceBase(params, ID_BLOCK, sizeof(Config), 0), - qRequests(params->system->physProxy, byteOrder, - params->queueSize, *this), - image(*params->image) + qRequests(params.system->physProxy, byteOrder, + params.queueSize, *this), + image(*params.image) { registerQueue(qRequests); @@ -166,7 +166,7 @@ VirtIOBlock::RequestQueue::onNotifyDescriptor(VirtDescriptor *desc) } VirtIOBlock * -VirtIOBlockParams::create() +VirtIOBlockParams::create() const { - return new VirtIOBlock(this); + return new VirtIOBlock(*this); } diff --git a/src/dev/virtio/block.hh b/src/dev/virtio/block.hh index f160a18ca..4e6dfb793 100644 --- a/src/dev/virtio/block.hh +++ b/src/dev/virtio/block.hh @@ -67,7 +67,7 @@ class VirtIOBlock : public VirtIODeviceBase { public: typedef VirtIOBlockParams Params; - VirtIOBlock(Params *params); + VirtIOBlock(const Params ¶ms); virtual ~VirtIOBlock(); void readConfig(PacketPtr pkt, Addr cfgOffset); diff --git a/src/dev/virtio/console.cc b/src/dev/virtio/console.cc index 1bb6adaba..eb4981fdb 100644 --- a/src/dev/virtio/console.cc +++ b/src/dev/virtio/console.cc @@ -41,11 +41,11 @@ #include "params/VirtIOConsole.hh" #include "sim/system.hh" -VirtIOConsole::VirtIOConsole(Params *params) +VirtIOConsole::VirtIOConsole(const Params ¶ms) : VirtIODeviceBase(params, ID_CONSOLE, sizeof(Config), F_SIZE), - qRecv(params->system->physProxy, byteOrder, params->qRecvSize, *this), - qTrans(params->system->physProxy, byteOrder, params->qTransSize, *this), - device(*params->device) + qRecv(params.system->physProxy, byteOrder, params.qRecvSize, *this), + qTrans(params.system->physProxy, byteOrder, params.qTransSize, *this), + device(*params.device) { registerQueue(qRecv); registerQueue(qTrans); @@ -114,7 +114,7 @@ VirtIOConsole::TermTransQueue::onNotifyDescriptor(VirtDescriptor *desc) } VirtIOConsole * -VirtIOConsoleParams::create() +VirtIOConsoleParams::create() const { - return new VirtIOConsole(this); + return new VirtIOConsole(*this); } diff --git a/src/dev/virtio/console.hh b/src/dev/virtio/console.hh index 73afb9c07..ef9a5cb29 100644 --- a/src/dev/virtio/console.hh +++ b/src/dev/virtio/console.hh @@ -65,7 +65,7 @@ class VirtIOConsole : public VirtIODeviceBase { public: typedef VirtIOConsoleParams Params; - VirtIOConsole(Params *params); + VirtIOConsole(const Params ¶ms); virtual ~VirtIOConsole(); void readConfig(PacketPtr pkt, Addr cfgOffset); diff --git a/src/dev/virtio/fs9p.cc b/src/dev/virtio/fs9p.cc index 2392c0b91..18395f79d 100644 --- a/src/dev/virtio/fs9p.cc +++ b/src/dev/virtio/fs9p.cc @@ -112,16 +112,16 @@ static const P9MsgInfoMap p9_msg_info { #undef P9MSG -VirtIO9PBase::VirtIO9PBase(Params *params) +VirtIO9PBase::VirtIO9PBase(const Params ¶ms) : VirtIODeviceBase(params, ID_9P, - sizeof(Config) + params->tag.size(), + sizeof(Config) + params.tag.size(), F_MOUNT_TAG), - queue(params->system->physProxy, byteOrder, params->queueSize, *this) + queue(params.system->physProxy, byteOrder, params.queueSize, *this) { config.reset((Config *) operator new(configSize)); - config->len = htog(params->tag.size(), byteOrder); - memcpy(config->tag, params->tag.c_str(), params->tag.size()); + config->len = htog(params.tag.size(), byteOrder); + memcpy(config->tag, params.tag.c_str(), params.tag.size()); registerQueue(queue); } @@ -209,7 +209,7 @@ VirtIO9PBase::dumpMsg(const P9MsgHeader &header, const uint8_t *data, size_t siz } -VirtIO9PProxy::VirtIO9PProxy(Params *params) +VirtIO9PProxy::VirtIO9PProxy(const Params ¶ms) : VirtIO9PBase(params), deviceUsed(false) { } @@ -310,7 +310,7 @@ VirtIO9PProxy::writeAll(const uint8_t *data, size_t len) -VirtIO9PDiod::VirtIO9PDiod(Params *params) +VirtIO9PDiod::VirtIO9PDiod(const Params ¶ms) : VirtIO9PProxy(params), fd_to_diod(-1), fd_from_diod(-1), diod_pid(-1) { @@ -333,15 +333,15 @@ VirtIO9PDiod::startup() void VirtIO9PDiod::startDiod() { - const Params *p(dynamic_cast(params())); + const Params &p = dynamic_cast(params()); int pipe_rfd[2]; int pipe_wfd[2]; const int DIOD_RFD = 3; const int DIOD_WFD = 4; - const char *diod(p->diod.c_str()); + const char *diod(p.diod.c_str()); - DPRINTF(VIO9P, "Using diod at %s \n", p->diod.c_str()); + DPRINTF(VIO9P, "Using diod at %s \n", p.diod.c_str()); if (pipe(pipe_rfd) == -1 || pipe(pipe_wfd) == -1) panic("Failed to create DIOD pipes: %i\n", errno); @@ -359,7 +359,7 @@ VirtIO9PDiod::startDiod() memset(&socket_address, 0, sizeof(struct sockaddr_un)); socket_address.sun_family = AF_UNIX; - const std::string socket_path = simout.resolve(p->socketPath); + const std::string socket_path = simout.resolve(p.socketPath); fatal_if(!OutputDirectory::isAbsolute(socket_path), "Please make the" \ " output directory an absolute path, else diod will fail!\n"); @@ -394,7 +394,7 @@ VirtIO9PDiod::startDiod() "-f", // start in foreground "-r", "3", // setup read FD "-w", "4", // setup write FD - "-e", p->root.c_str(), // path to export + "-e", p.root.c_str(), // path to export "-n", // disable security "-S", // squash all users "-l", socket_path.c_str(), // pass the socket @@ -475,15 +475,15 @@ VirtIO9PDiod::terminateDiod() } VirtIO9PDiod * -VirtIO9PDiodParams::create() +VirtIO9PDiodParams::create() const { - return new VirtIO9PDiod(this); + return new VirtIO9PDiod(*this); } -VirtIO9PSocket::VirtIO9PSocket(Params *params) +VirtIO9PSocket::VirtIO9PSocket(const Params ¶ms) : VirtIO9PProxy(params), fdSocket(-1) { } @@ -503,7 +503,7 @@ VirtIO9PSocket::startup() void VirtIO9PSocket::connectSocket() { - const Params &p(dynamic_cast(*params())); + const Params &p = dynamic_cast(params()); int ret; struct addrinfo hints, *result; @@ -572,7 +572,7 @@ VirtIO9PSocket::SocketDataEvent::process(int revent) VirtIO9PSocket * -VirtIO9PSocketParams::create() +VirtIO9PSocketParams::create() const { - return new VirtIO9PSocket(this); + return new VirtIO9PSocket(*this); } diff --git a/src/dev/virtio/fs9p.hh b/src/dev/virtio/fs9p.hh index 7751b36c2..3ba499c5e 100644 --- a/src/dev/virtio/fs9p.hh +++ b/src/dev/virtio/fs9p.hh @@ -108,7 +108,7 @@ class VirtIO9PBase : public VirtIODeviceBase { public: typedef VirtIO9PBaseParams Params; - VirtIO9PBase(Params *params); + VirtIO9PBase(const Params ¶ms); virtual ~VirtIO9PBase(); void readConfig(PacketPtr pkt, Addr cfgOffset); @@ -212,7 +212,7 @@ class VirtIO9PProxy : public VirtIO9PBase { public: typedef VirtIO9PProxyParams Params; - VirtIO9PProxy(Params *params); + VirtIO9PProxy(const Params ¶ms); virtual ~VirtIO9PProxy(); void serialize(CheckpointOut &cp) const override; @@ -291,7 +291,7 @@ class VirtIO9PDiod : public VirtIO9PProxy { public: typedef VirtIO9PDiodParams Params; - VirtIO9PDiod(Params *params); + VirtIO9PDiod(const Params ¶ms); virtual ~VirtIO9PDiod(); void startup(); @@ -343,7 +343,7 @@ class VirtIO9PSocket : public VirtIO9PProxy { public: typedef VirtIO9PSocketParams Params; - VirtIO9PSocket(Params *params); + VirtIO9PSocket(const Params ¶ms); virtual ~VirtIO9PSocket(); void startup(); diff --git a/src/dev/virtio/pci.cc b/src/dev/virtio/pci.cc index fdded203a..34f27bb22 100644 --- a/src/dev/virtio/pci.cc +++ b/src/dev/virtio/pci.cc @@ -42,9 +42,9 @@ #include "mem/packet_access.hh" #include "params/PciVirtIO.hh" -PciVirtIO::PciVirtIO(const Params *params) +PciVirtIO::PciVirtIO(const Params ¶ms) : PciDevice(params), queueNotify(0), interruptDeliveryPending(false), - vio(*params->vio) + vio(*params.vio) { // Override the subsystem ID with the device ID from VirtIO config.subsystemID = htole(vio.deviceId); @@ -224,7 +224,7 @@ PciVirtIO::kick() } PciVirtIO * -PciVirtIOParams::create() +PciVirtIOParams::create() const { - return new PciVirtIO(this); + return new PciVirtIO(*this); } diff --git a/src/dev/virtio/pci.hh b/src/dev/virtio/pci.hh index b6c162c79..598f07e0f 100644 --- a/src/dev/virtio/pci.hh +++ b/src/dev/virtio/pci.hh @@ -48,7 +48,7 @@ class PciVirtIO : public PciDevice { public: typedef PciVirtIOParams Params; - PciVirtIO(const Params *params); + PciVirtIO(const Params ¶ms); virtual ~PciVirtIO(); Tick read(PacketPtr pkt); diff --git a/src/dev/x86/cmos.cc b/src/dev/x86/cmos.cc index 5d8c68037..eab4ad2b7 100644 --- a/src/dev/x86/cmos.cc +++ b/src/dev/x86/cmos.cc @@ -140,7 +140,7 @@ X86ISA::Cmos::unserialize(CheckpointIn &cp) } X86ISA::Cmos * -CmosParams::create() +CmosParams::create() const { - return new X86ISA::Cmos(this); + return new X86ISA::Cmos(*this); } diff --git a/src/dev/x86/cmos.hh b/src/dev/x86/cmos.hh index babbaa940..29a883b5b 100644 --- a/src/dev/x86/cmos.hh +++ b/src/dev/x86/cmos.hh @@ -72,9 +72,9 @@ class Cmos : public BasicPioDevice public: typedef CmosParams Params; - Cmos(const Params *p) : BasicPioDevice(p, 2), latency(p->pio_latency), - rtc(this, name() + ".rtc", p->time, true, ULL(5000000000), - p->port_int_pin_connection_count) + Cmos(const Params &p) : BasicPioDevice(p, 2), latency(p.pio_latency), + rtc(this, name() + ".rtc", p.time, true, ULL(5000000000), + p.port_int_pin_connection_count) { memset(regs, 0, numRegs * sizeof(uint8_t)); address = 0; diff --git a/src/dev/x86/i8042.cc b/src/dev/x86/i8042.cc index 35a86b242..3756cf944 100644 --- a/src/dev/x86/i8042.cc +++ b/src/dev/x86/i8042.cc @@ -44,12 +44,12 @@ const uint8_t RamSize = 32; const uint8_t NumOutputBits = 14; -X86ISA::I8042::I8042(Params *p) +X86ISA::I8042::I8042(const Params &p) : BasicPioDevice(p, 0), // pioSize arg is dummy value... not used - latency(p->pio_latency), - dataPort(p->data_port), commandPort(p->command_port), + latency(p.pio_latency), + dataPort(p.data_port), commandPort(p.command_port), statusReg(0), commandByte(0), dataReg(0), lastCommand(NoCommand), - mouse(p->mouse), keyboard(p->keyboard) + mouse(p.mouse), keyboard(p.keyboard) { fatal_if(!mouse, "The i8042 model requires a mouse instance"); fatal_if(!keyboard, "The i8042 model requires a keyboard instance"); @@ -62,11 +62,11 @@ X86ISA::I8042::I8042(Params *p) commandByte.passedSelfTest = 1; commandByte.keyboardFullInt = 1; - for (int i = 0; i < p->port_keyboard_int_pin_connection_count; i++) { + for (int i = 0; i < p.port_keyboard_int_pin_connection_count; i++) { keyboardIntPin.push_back(new IntSourcePin( csprintf("%s.keyboard_int_pin[%d]", name(), i), i, this)); } - for (int i = 0; i < p->port_mouse_int_pin_connection_count; i++) { + for (int i = 0; i < p.port_mouse_int_pin_connection_count; i++) { mouseIntPin.push_back(new IntSourcePin( csprintf("%s.mouse_int_pin[%d]", name(), i), i, this)); } @@ -307,7 +307,7 @@ X86ISA::I8042::unserialize(CheckpointIn &cp) } X86ISA::I8042 * -I8042Params::create() +I8042Params::create() const { - return new X86ISA::I8042(this); + return new X86ISA::I8042(*this); } diff --git a/src/dev/x86/i8042.hh b/src/dev/x86/i8042.hh index 83ca7d74e..10681da92 100644 --- a/src/dev/x86/i8042.hh +++ b/src/dev/x86/i8042.hh @@ -118,13 +118,13 @@ class I8042 : public BasicPioDevice public: typedef I8042Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - I8042(Params *p); + I8042(const Params &p); Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc index bb28a8a3f..12ac70ca8 100644 --- a/src/dev/x86/i82094aa.cc +++ b/src/dev/x86/i82094aa.cc @@ -39,17 +39,17 @@ #include "mem/packet_access.hh" #include "sim/system.hh" -X86ISA::I82094AA::I82094AA(Params *p) - : BasicPioDevice(p, 20), extIntPic(p->external_int_pic), +X86ISA::I82094AA::I82094AA(const Params &p) + : BasicPioDevice(p, 20), extIntPic(p.external_int_pic), lowestPriorityOffset(0), - intRequestPort(name() + ".int_request", this, this, p->int_latency) + intRequestPort(name() + ".int_request", this, this, p.int_latency) { // This assumes there's only one I/O APIC in the system and since the apic // id is stored in a 8-bit field with 0xff meaning broadcast, the id must // be less than 0xff - assert(p->apic_id < 0xff); - initialApicId = id = p->apic_id; + assert(p.apic_id < 0xff); + initialApicId = id = p.apic_id; arbId = id; regSel = 0; RedirTableEntry entry = 0; @@ -59,7 +59,7 @@ X86ISA::I82094AA::I82094AA(Params *p) pinStates[i] = false; } - for (int i = 0; i < p->port_inputs_connection_count; i++) + for (int i = 0; i < p.port_inputs_connection_count; i++) inputs.push_back(new IntSinkPin( csprintf("%s.inputs[%d]", name(), i), i, this)); } @@ -293,7 +293,7 @@ X86ISA::I82094AA::unserialize(CheckpointIn &cp) } X86ISA::I82094AA * -I82094AAParams::create() +I82094AAParams::create() const { - return new X86ISA::I82094AA(this); + return new X86ISA::I82094AA(*this); } diff --git a/src/dev/x86/i82094aa.hh b/src/dev/x86/i82094aa.hh index a5263b37d..517b88870 100644 --- a/src/dev/x86/i82094aa.hh +++ b/src/dev/x86/i82094aa.hh @@ -87,13 +87,13 @@ class I82094AA : public BasicPioDevice public: typedef I82094AAParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - I82094AA(Params *p); + I82094AA(const Params &p); void init() override; diff --git a/src/dev/x86/i8237.cc b/src/dev/x86/i8237.cc index 9724d6c2f..2423c5175 100644 --- a/src/dev/x86/i8237.cc +++ b/src/dev/x86/i8237.cc @@ -137,7 +137,7 @@ X86ISA::I8237::unserialize(CheckpointIn &cp) } X86ISA::I8237 * -I8237Params::create() +I8237Params::create() const { - return new X86ISA::I8237(this); + return new X86ISA::I8237(*this); } diff --git a/src/dev/x86/i8237.hh b/src/dev/x86/i8237.hh index ebca108f3..d5044d648 100644 --- a/src/dev/x86/i8237.hh +++ b/src/dev/x86/i8237.hh @@ -39,22 +39,20 @@ class I8237 : public BasicPioDevice { protected: Tick latency; - uint8_t maskReg; + uint8_t maskReg = 0; public: typedef I8237Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - I8237(Params *p) : BasicPioDevice(p, 16), latency(p->pio_latency), maskReg(0) - { - } - Tick read(PacketPtr pkt) override; + I8237(const Params &p) : BasicPioDevice(p, 16), latency(p.pio_latency) {} + Tick read(PacketPtr pkt) override; Tick write(PacketPtr pkt) override; void serialize(CheckpointOut &cp) const override; diff --git a/src/dev/x86/i8254.cc b/src/dev/x86/i8254.cc index 34f9632ff..b23f09af0 100644 --- a/src/dev/x86/i8254.cc +++ b/src/dev/x86/i8254.cc @@ -97,7 +97,7 @@ X86ISA::I8254::startup() } X86ISA::I8254 * -I8254Params::create() +I8254Params::create() const { - return new X86ISA::I8254(this); + return new X86ISA::I8254(*this); } diff --git a/src/dev/x86/i8254.hh b/src/dev/x86/i8254.hh index 2a7d7ad69..cbde5fea3 100644 --- a/src/dev/x86/i8254.hh +++ b/src/dev/x86/i8254.hh @@ -77,22 +77,22 @@ class I8254 : public BasicPioDevice return BasicPioDevice::getPort(if_name, idx); } - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - I8254(Params *p) : BasicPioDevice(p, 4), latency(p->pio_latency), - pit(p->name, this) + I8254(const Params &p) : BasicPioDevice(p, 4), latency(p.pio_latency), + pit(p.name, this) { - for (int i = 0; i < p->port_int_pin_connection_count; i++) { + for (int i = 0; i < p.port_int_pin_connection_count; i++) { intPin.push_back(new IntSourcePin(csprintf( "%s.int_pin[%d]", name(), i), i, this)); } } - Tick read(PacketPtr pkt) override; + Tick read(PacketPtr pkt) override; Tick write(PacketPtr pkt) override; bool diff --git a/src/dev/x86/i8259.cc b/src/dev/x86/i8259.cc index 8ba1235a4..780c8ddd0 100644 --- a/src/dev/x86/i8259.cc +++ b/src/dev/x86/i8259.cc @@ -35,19 +35,19 @@ #include "mem/packet.hh" #include "mem/packet_access.hh" -X86ISA::I8259::I8259(Params * p) +X86ISA::I8259::I8259(const Params &p) : BasicPioDevice(p, 2), - latency(p->pio_latency), - mode(p->mode), slave(p->slave), + latency(p.pio_latency), + mode(p.mode), slave(p.slave), IRR(0), ISR(0), IMR(0), readIRR(true), initControlWord(0), autoEOI(false) { - for (int i = 0; i < p->port_output_connection_count; i++) { + for (int i = 0; i < p.port_output_connection_count; i++) { output.push_back(new IntSourcePin( csprintf("%s.output[%d]", name(), i), i, this)); } - int in_count = p->port_inputs_connection_count; + int in_count = p.port_inputs_connection_count; panic_if(in_count >= NumLines, "I8259 only supports 8 inputs, but there are %d.", in_count); for (int i = 0; i < in_count; i++) { @@ -366,7 +366,7 @@ X86ISA::I8259::unserialize(CheckpointIn &cp) } X86ISA::I8259 * -I8259Params::create() +I8259Params::create() const { - return new X86ISA::I8259(this); + return new X86ISA::I8259(*this); } diff --git a/src/dev/x86/i8259.hh b/src/dev/x86/i8259.hh index 889a8cb9c..9a82720b2 100644 --- a/src/dev/x86/i8259.hh +++ b/src/dev/x86/i8259.hh @@ -83,13 +83,13 @@ class I8259 : public BasicPioDevice public: typedef I8259Params Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - I8259(Params * p); + I8259(const Params &p); Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc index 38c0517ca..4001c2021 100644 --- a/src/dev/x86/pc.cc +++ b/src/dev/x86/pc.cc @@ -45,8 +45,8 @@ #include "dev/x86/south_bridge.hh" #include "sim/system.hh" -Pc::Pc(const Params *p) - : Platform(p), system(p->system) +Pc::Pc(const Params &p) + : Platform(p), system(p.system) { southBridge = NULL; } @@ -136,7 +136,7 @@ Pc::clearPciInt(int line) } Pc * -PcParams::create() +PcParams::create() const { - return new Pc(this); + return new Pc(*this); } diff --git a/src/dev/x86/pc.hh b/src/dev/x86/pc.hh index 8c43cec07..74e37ddfb 100644 --- a/src/dev/x86/pc.hh +++ b/src/dev/x86/pc.hh @@ -57,7 +57,7 @@ class Pc : public Platform */ void init() override; - Pc(const Params *p); + Pc(const Params &p); public: void postConsoleInt() override; diff --git a/src/dev/x86/south_bridge.cc b/src/dev/x86/south_bridge.cc index 15f475f68..4f713bd9d 100644 --- a/src/dev/x86/south_bridge.cc +++ b/src/dev/x86/south_bridge.cc @@ -34,9 +34,9 @@ using namespace X86ISA; -SouthBridge::SouthBridge(const Params *p) : SimObject(p), - platform(p->platform), pit(p->pit), pic1(p->pic1), pic2(p->pic2), - cmos(p->cmos), speaker(p->speaker), ioApic(p->io_apic) +SouthBridge::SouthBridge(const Params &p) : SimObject(p), + platform(p.platform), pit(p.pit), pic1(p.pic1), pic2(p.pic2), + cmos(p.cmos), speaker(p.speaker), ioApic(p.io_apic) { // Let the platform know where we are Pc * pc = dynamic_cast(platform); @@ -45,7 +45,7 @@ SouthBridge::SouthBridge(const Params *p) : SimObject(p), } SouthBridge * -SouthBridgeParams::create() +SouthBridgeParams::create() const { - return new SouthBridge(this); + return new SouthBridge(*this); } diff --git a/src/dev/x86/south_bridge.hh b/src/dev/x86/south_bridge.hh index 223b29b38..3a1b15ca6 100644 --- a/src/dev/x86/south_bridge.hh +++ b/src/dev/x86/south_bridge.hh @@ -56,12 +56,12 @@ class SouthBridge : public SimObject public: typedef SouthBridgeParams Params; - SouthBridge(const Params *p); + SouthBridge(const Params &p); - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } }; diff --git a/src/dev/x86/speaker.cc b/src/dev/x86/speaker.cc index ed6805832..90f30be25 100644 --- a/src/dev/x86/speaker.cc +++ b/src/dev/x86/speaker.cc @@ -85,7 +85,7 @@ X86ISA::Speaker::unserialize(CheckpointIn &cp) } X86ISA::Speaker * -PcSpeakerParams::create() +PcSpeakerParams::create() const { - return new X86ISA::Speaker(this); + return new X86ISA::Speaker(*this); } diff --git a/src/dev/x86/speaker.hh b/src/dev/x86/speaker.hh index 134ea451e..d672048c1 100644 --- a/src/dev/x86/speaker.hh +++ b/src/dev/x86/speaker.hh @@ -56,14 +56,14 @@ class Speaker : public BasicPioDevice public: typedef PcSpeakerParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Speaker(Params *p) : BasicPioDevice(p, 1), - latency(p->pio_latency), controlVal(0), timer(p->i8254) + Speaker(const Params &p) : BasicPioDevice(p, 1), + latency(p.pio_latency), controlVal(0), timer(p.i8254) { } diff --git a/src/gpu-compute/comm.cc b/src/gpu-compute/comm.cc index b1dd03143..674f453ef 100644 --- a/src/gpu-compute/comm.cc +++ b/src/gpu-compute/comm.cc @@ -44,15 +44,15 @@ * Scoreboard/Schedule stage interface. */ ScoreboardCheckToSchedule::ScoreboardCheckToSchedule(const ComputeUnitParams - *p) + &p) { - int num_func_units = p->num_SIMDs + p->num_scalar_cores - + p->num_global_mem_pipes + p->num_shared_mem_pipes - + p->num_scalar_mem_pipes; + int num_func_units = p.num_SIMDs + p.num_scalar_cores + + p.num_global_mem_pipes + p.num_shared_mem_pipes + + p.num_scalar_mem_pipes; _readyWFs.resize(num_func_units); for (auto &func_unit_wf_list : _readyWFs) { - func_unit_wf_list.reserve(p->n_wf); + func_unit_wf_list.reserve(p.n_wf); } } @@ -103,11 +103,11 @@ ScoreboardCheckToSchedule::updateReadyList(int func_unit_id) /** * Schedule/Execute stage interface. */ -ScheduleToExecute::ScheduleToExecute(const ComputeUnitParams *p) +ScheduleToExecute::ScheduleToExecute(const ComputeUnitParams &p) { - int num_func_units = p->num_SIMDs + p->num_scalar_cores - + p->num_global_mem_pipes + p->num_shared_mem_pipes - + p->num_scalar_mem_pipes; + int num_func_units = p.num_SIMDs + p.num_scalar_cores + + p.num_global_mem_pipes + p.num_shared_mem_pipes + + p.num_scalar_mem_pipes; _readyInsts.resize(num_func_units, nullptr); _dispatchStatus.resize(num_func_units, EMPTY); } diff --git a/src/gpu-compute/comm.hh b/src/gpu-compute/comm.hh index bc3ec7b86..12c5f8a68 100644 --- a/src/gpu-compute/comm.hh +++ b/src/gpu-compute/comm.hh @@ -64,7 +64,7 @@ class ScoreboardCheckToSchedule : public PipeStageIFace { public: ScoreboardCheckToSchedule() = delete; - ScoreboardCheckToSchedule(const ComputeUnitParams *p); + ScoreboardCheckToSchedule(const ComputeUnitParams &p); void reset() override; /** * Mark the WF as ready for execution on a particular functional @@ -100,7 +100,7 @@ class ScheduleToExecute : public PipeStageIFace { public: ScheduleToExecute() = delete; - ScheduleToExecute(const ComputeUnitParams *p); + ScheduleToExecute(const ComputeUnitParams &p); void reset() override; GPUDynInstPtr& readyInst(int func_unit_id); /** diff --git a/src/gpu-compute/compute_unit.cc b/src/gpu-compute/compute_unit.cc index 81080297c..d15c4328b 100644 --- a/src/gpu-compute/compute_unit.cc +++ b/src/gpu-compute/compute_unit.cc @@ -59,15 +59,15 @@ #include "sim/process.hh" #include "sim/sim_exit.hh" -ComputeUnit::ComputeUnit(const Params *p) : ClockedObject(p), - numVectorGlobalMemUnits(p->num_global_mem_pipes), - numVectorSharedMemUnits(p->num_shared_mem_pipes), - numScalarMemUnits(p->num_scalar_mem_pipes), - numVectorALUs(p->num_SIMDs), - numScalarALUs(p->num_scalar_cores), - vrfToCoalescerBusWidth(p->vrf_to_coalescer_bus_width), - coalescerToVrfBusWidth(p->coalescer_to_vrf_bus_width), - registerManager(p->register_manager), +ComputeUnit::ComputeUnit(const Params &p) : ClockedObject(p), + numVectorGlobalMemUnits(p.num_global_mem_pipes), + numVectorSharedMemUnits(p.num_shared_mem_pipes), + numScalarMemUnits(p.num_scalar_mem_pipes), + numVectorALUs(p.num_SIMDs), + numScalarALUs(p.num_scalar_cores), + vrfToCoalescerBusWidth(p.vrf_to_coalescer_bus_width), + coalescerToVrfBusWidth(p.coalescer_to_vrf_bus_width), + registerManager(p.register_manager), fetchStage(p, *this), scoreboardCheckStage(p, *this, scoreboardCheckToSchedule), scheduleStage(p, *this, scoreboardCheckToSchedule, scheduleToExecute), @@ -77,34 +77,34 @@ ComputeUnit::ComputeUnit(const Params *p) : ClockedObject(p), scalarMemoryPipe(p, *this), tickEvent([this]{ exec(); }, "Compute unit tick event", false, Event::CPU_Tick_Pri), - cu_id(p->cu_id), - vrf(p->vector_register_file), srf(p->scalar_register_file), - simdWidth(p->simd_width), - spBypassPipeLength(p->spbypass_pipe_length), - dpBypassPipeLength(p->dpbypass_pipe_length), - scalarPipeStages(p->scalar_pipe_length), - operandNetworkLength(p->operand_network_length), - issuePeriod(p->issue_period), - vrf_gm_bus_latency(p->vrf_gm_bus_latency), - srf_scm_bus_latency(p->srf_scm_bus_latency), - vrf_lm_bus_latency(p->vrf_lm_bus_latency), - perLaneTLB(p->perLaneTLB), prefetchDepth(p->prefetch_depth), - prefetchStride(p->prefetch_stride), prefetchType(p->prefetch_prev_type), - debugSegFault(p->debugSegFault), - functionalTLB(p->functionalTLB), localMemBarrier(p->localMemBarrier), - countPages(p->countPages), - req_tick_latency(p->mem_req_latency * p->clk_domain->clockPeriod()), - resp_tick_latency(p->mem_resp_latency * p->clk_domain->clockPeriod()), - _requestorId(p->system->getRequestorId(this, "ComputeUnit")), - lds(*p->localDataStore), gmTokenPort(name() + ".gmTokenPort", this), + cu_id(p.cu_id), + vrf(p.vector_register_file), srf(p.scalar_register_file), + simdWidth(p.simd_width), + spBypassPipeLength(p.spbypass_pipe_length), + dpBypassPipeLength(p.dpbypass_pipe_length), + scalarPipeStages(p.scalar_pipe_length), + operandNetworkLength(p.operand_network_length), + issuePeriod(p.issue_period), + vrf_gm_bus_latency(p.vrf_gm_bus_latency), + srf_scm_bus_latency(p.srf_scm_bus_latency), + vrf_lm_bus_latency(p.vrf_lm_bus_latency), + perLaneTLB(p.perLaneTLB), prefetchDepth(p.prefetch_depth), + prefetchStride(p.prefetch_stride), prefetchType(p.prefetch_prev_type), + debugSegFault(p.debugSegFault), + functionalTLB(p.functionalTLB), localMemBarrier(p.localMemBarrier), + countPages(p.countPages), + req_tick_latency(p.mem_req_latency * p.clk_domain->clockPeriod()), + resp_tick_latency(p.mem_resp_latency * p.clk_domain->clockPeriod()), + _requestorId(p.system->getRequestorId(this, "ComputeUnit")), + lds(*p.localDataStore), gmTokenPort(name() + ".gmTokenPort", this), ldsPort(csprintf("%s-port", name()), this), scalarDataPort(csprintf("%s-port", name()), this), scalarDTLBPort(csprintf("%s-port", name()), this), sqcPort(csprintf("%s-port", name()), this), sqcTLBPort(csprintf("%s-port", name()), this), - _cacheLineSize(p->system->cacheLineSize()), - _numBarrierSlots(p->num_barrier_slots), - globalSeqNum(0), wavefrontSize(p->wf_size), + _cacheLineSize(p.system->cacheLineSize()), + _numBarrierSlots(p.num_barrier_slots), + globalSeqNum(0), wavefrontSize(p.wf_size), scoreboardCheckToSchedule(p), scheduleToExecute(p) { @@ -117,8 +117,8 @@ ComputeUnit::ComputeUnit(const Params *p) : ClockedObject(p), * to_long() or to_ullong() so we can have wavefrontSize greater than 64b, * however until that is done this assert is required. */ - fatal_if(p->wf_size > std::numeric_limits::digits || - p->wf_size <= 0, + fatal_if(p.wf_size > std::numeric_limits::digits || + p.wf_size <= 0, "WF size is larger than the host can support"); fatal_if(!isPowerOf2(wavefrontSize), "Wavefront size should be a power of 2"); @@ -132,23 +132,23 @@ ComputeUnit::ComputeUnit(const Params *p) : ClockedObject(p), / coalescerToVrfBusWidth; // Initialization: all WF slots are assumed STOPPED - idleWfs = p->n_wf * numVectorALUs; + idleWfs = p.n_wf * numVectorALUs; lastVaddrWF.resize(numVectorALUs); wfList.resize(numVectorALUs); - wfBarrierSlots.resize(p->num_barrier_slots, WFBarrier()); + wfBarrierSlots.resize(p.num_barrier_slots, WFBarrier()); - for (int i = 0; i < p->num_barrier_slots; ++i) { + for (int i = 0; i < p.num_barrier_slots; ++i) { freeBarrierIds.insert(i); } for (int j = 0; j < numVectorALUs; ++j) { - lastVaddrWF[j].resize(p->n_wf); + lastVaddrWF[j].resize(p.n_wf); - for (int i = 0; i < p->n_wf; ++i) { + for (int i = 0; i < p.n_wf; ++i) { lastVaddrWF[j][i].resize(wfSize()); - wfList[j].push_back(p->wavefronts[j * p->n_wf + i]); + wfList[j].push_back(p.wavefronts[j * p.n_wf + i]); wfList[j][i]->setParent(this); for (int k = 0; k < wfSize(); ++k) { @@ -167,25 +167,25 @@ ComputeUnit::ComputeUnit(const Params *p) : ClockedObject(p), lds.setParent(this); - if (p->execPolicy == "OLDEST-FIRST") { + if (p.execPolicy == "OLDEST-FIRST") { exec_policy = EXEC_POLICY::OLDEST; - } else if (p->execPolicy == "ROUND-ROBIN") { + } else if (p.execPolicy == "ROUND-ROBIN") { exec_policy = EXEC_POLICY::RR; } else { fatal("Invalid WF execution policy (CU)\n"); } - for (int i = 0; i < p->port_memory_port_connection_count; ++i) { + for (int i = 0; i < p.port_memory_port_connection_count; ++i) { memPort.emplace_back(csprintf("%s-port%d", name(), i), this, i); } - for (int i = 0; i < p->port_translation_port_connection_count; ++i) { + for (int i = 0; i < p.port_translation_port_connection_count; ++i) { tlbPort.emplace_back(csprintf("%s-port%d", name(), i), this, i); } // Setup tokens for response ports. The number of tokens in memPortTokens // is the total token count for the entire vector port (i.e., this CU). - memPortTokens = new TokenManager(p->max_cu_tokens); + memPortTokens = new TokenManager(p.max_cu_tokens); registerExitCallback([this]() { exitCallback(); }); @@ -1381,9 +1381,9 @@ ComputeUnit::DataPort::processMemRespEvent(PacketPtr pkt) } ComputeUnit* -ComputeUnitParams::create() +ComputeUnitParams::create() const { - return new ComputeUnit(this); + return new ComputeUnit(*this); } bool diff --git a/src/gpu-compute/compute_unit.hh b/src/gpu-compute/compute_unit.hh index 2df4807d2..5b1e8de95 100644 --- a/src/gpu-compute/compute_unit.hh +++ b/src/gpu-compute/compute_unit.hh @@ -383,7 +383,7 @@ class ComputeUnit : public ClockedObject void insertInPipeMap(Wavefront *w); void deleteFromPipeMap(Wavefront *w); - ComputeUnit(const Params *p); + ComputeUnit(const Params &p); ~ComputeUnit(); // Timing Functions diff --git a/src/gpu-compute/dispatcher.cc b/src/gpu-compute/dispatcher.cc index 6a8242f11..7c173e855 100644 --- a/src/gpu-compute/dispatcher.cc +++ b/src/gpu-compute/dispatcher.cc @@ -44,7 +44,7 @@ #include "sim/syscall_emul_buf.hh" #include "sim/system.hh" -GPUDispatcher::GPUDispatcher(const Params *p) +GPUDispatcher::GPUDispatcher(const Params &p) : SimObject(p), shader(nullptr), gpuCmdProc(nullptr), tickEvent([this]{ exec(); }, "GPU Dispatcher tick", false, Event::CPU_Tick_Pri), @@ -361,7 +361,8 @@ GPUDispatcher::scheduleDispatch() } } -GPUDispatcher *GPUDispatcherParams::create() +GPUDispatcher * +GPUDispatcherParams::create() const { - return new GPUDispatcher(this); + return new GPUDispatcher(*this); } diff --git a/src/gpu-compute/dispatcher.hh b/src/gpu-compute/dispatcher.hh index cd282b9cb..b8cd3f1ef 100644 --- a/src/gpu-compute/dispatcher.hh +++ b/src/gpu-compute/dispatcher.hh @@ -62,7 +62,7 @@ class GPUDispatcher : public SimObject public: typedef GPUDispatcherParams Params; - GPUDispatcher(const Params *p); + GPUDispatcher(const Params &p); ~GPUDispatcher(); void serialize(CheckpointOut &cp) const override; diff --git a/src/gpu-compute/exec_stage.cc b/src/gpu-compute/exec_stage.cc index 79fca724f..81806270c 100644 --- a/src/gpu-compute/exec_stage.cc +++ b/src/gpu-compute/exec_stage.cc @@ -41,7 +41,7 @@ #include "gpu-compute/vector_register_file.hh" #include "gpu-compute/wavefront.hh" -ExecStage::ExecStage(const ComputeUnitParams *p, ComputeUnit &cu, +ExecStage::ExecStage(const ComputeUnitParams &p, ComputeUnit &cu, ScheduleToExecute &from_schedule) : computeUnit(cu), fromSchedule(from_schedule), lastTimeInstExecuted(false), diff --git a/src/gpu-compute/exec_stage.hh b/src/gpu-compute/exec_stage.hh index 23e9369b3..4051b31d9 100644 --- a/src/gpu-compute/exec_stage.hh +++ b/src/gpu-compute/exec_stage.hh @@ -71,7 +71,7 @@ enum DISPATCH_STATUS class ExecStage { public: - ExecStage(const ComputeUnitParams* p, ComputeUnit &cu, + ExecStage(const ComputeUnitParams &p, ComputeUnit &cu, ScheduleToExecute &from_schedule); ~ExecStage() { } void init(); diff --git a/src/gpu-compute/fetch_stage.cc b/src/gpu-compute/fetch_stage.cc index 6c3b8f40c..8a37756db 100644 --- a/src/gpu-compute/fetch_stage.cc +++ b/src/gpu-compute/fetch_stage.cc @@ -36,8 +36,8 @@ #include "gpu-compute/compute_unit.hh" #include "gpu-compute/wavefront.hh" -FetchStage::FetchStage(const ComputeUnitParams* p, ComputeUnit &cu) - : numVectorALUs(p->num_SIMDs), computeUnit(cu), +FetchStage::FetchStage(const ComputeUnitParams &p, ComputeUnit &cu) + : numVectorALUs(p.num_SIMDs), computeUnit(cu), _name(cu.name() + ".FetchStage") { for (int j = 0; j < numVectorALUs; ++j) { diff --git a/src/gpu-compute/fetch_stage.hh b/src/gpu-compute/fetch_stage.hh index ea556611a..16c35d8c7 100644 --- a/src/gpu-compute/fetch_stage.hh +++ b/src/gpu-compute/fetch_stage.hh @@ -51,7 +51,7 @@ class Wavefront; class FetchStage { public: - FetchStage(const ComputeUnitParams* p, ComputeUnit &cu); + FetchStage(const ComputeUnitParams &p, ComputeUnit &cu); ~FetchStage(); void init(); void exec(); diff --git a/src/gpu-compute/fetch_unit.cc b/src/gpu-compute/fetch_unit.cc index 5d9828845..62b9e73a1 100644 --- a/src/gpu-compute/fetch_unit.cc +++ b/src/gpu-compute/fetch_unit.cc @@ -46,9 +46,9 @@ uint32_t FetchUnit::globalFetchUnitID; -FetchUnit::FetchUnit(const ComputeUnitParams *p, ComputeUnit &cu) +FetchUnit::FetchUnit(const ComputeUnitParams &p, ComputeUnit &cu) : timingSim(true), computeUnit(cu), fetchScheduler(p), - waveList(nullptr), fetchDepth(p->fetch_depth) + waveList(nullptr), fetchDepth(p.fetch_depth) { } diff --git a/src/gpu-compute/fetch_unit.hh b/src/gpu-compute/fetch_unit.hh index 36ab9c365..ad341b3ee 100644 --- a/src/gpu-compute/fetch_unit.hh +++ b/src/gpu-compute/fetch_unit.hh @@ -49,7 +49,7 @@ class Wavefront; class FetchUnit { public: - FetchUnit(const ComputeUnitParams* p, ComputeUnit &cu); + FetchUnit(const ComputeUnitParams &p, ComputeUnit &cu); ~FetchUnit(); void init(); void exec(); diff --git a/src/gpu-compute/global_memory_pipeline.cc b/src/gpu-compute/global_memory_pipeline.cc index 9fc515aef..01f986c25 100644 --- a/src/gpu-compute/global_memory_pipeline.cc +++ b/src/gpu-compute/global_memory_pipeline.cc @@ -43,11 +43,11 @@ #include "gpu-compute/vector_register_file.hh" #include "gpu-compute/wavefront.hh" -GlobalMemPipeline::GlobalMemPipeline(const ComputeUnitParams* p, +GlobalMemPipeline::GlobalMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu) : computeUnit(cu), _name(cu.name() + ".GlobalMemPipeline"), - gmQueueSize(p->global_mem_queue_size), - maxWaveRequests(p->max_wave_requests), inflightStores(0), + gmQueueSize(p.global_mem_queue_size), + maxWaveRequests(p.max_wave_requests), inflightStores(0), inflightLoads(0) { } diff --git a/src/gpu-compute/global_memory_pipeline.hh b/src/gpu-compute/global_memory_pipeline.hh index c53789ee5..a1b652a7d 100644 --- a/src/gpu-compute/global_memory_pipeline.hh +++ b/src/gpu-compute/global_memory_pipeline.hh @@ -56,7 +56,7 @@ class ComputeUnit; class GlobalMemPipeline { public: - GlobalMemPipeline(const ComputeUnitParams *p, ComputeUnit &cu); + GlobalMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu); void init(); void exec(); diff --git a/src/gpu-compute/gpu_command_processor.cc b/src/gpu-compute/gpu_command_processor.cc index fccc03582..c2d07f795 100644 --- a/src/gpu-compute/gpu_command_processor.cc +++ b/src/gpu-compute/gpu_command_processor.cc @@ -40,8 +40,8 @@ #include "gpu-compute/dispatcher.hh" #include "params/GPUCommandProcessor.hh" -GPUCommandProcessor::GPUCommandProcessor(const Params *p) - : HSADevice(p), dispatcher(*p->dispatcher) +GPUCommandProcessor::GPUCommandProcessor(const Params &p) + : HSADevice(p), dispatcher(*p.dispatcher) { dispatcher.setCommandProcessor(this); } @@ -223,7 +223,7 @@ GPUCommandProcessor::shader() } GPUCommandProcessor* -GPUCommandProcessorParams::create() +GPUCommandProcessorParams::create() const { - return new GPUCommandProcessor(this); + return new GPUCommandProcessor(*this); } diff --git a/src/gpu-compute/gpu_command_processor.hh b/src/gpu-compute/gpu_command_processor.hh index 7253dd421..d38ee1f0b 100644 --- a/src/gpu-compute/gpu_command_processor.hh +++ b/src/gpu-compute/gpu_command_processor.hh @@ -60,7 +60,7 @@ class GPUCommandProcessor : public HSADevice typedef GPUCommandProcessorParams Params; GPUCommandProcessor() = delete; - GPUCommandProcessor(const Params *p); + GPUCommandProcessor(const Params &p); void setShader(Shader *shader); Shader* shader(); diff --git a/src/gpu-compute/gpu_compute_driver.cc b/src/gpu-compute/gpu_compute_driver.cc index b4d65ce65..325a844dc 100644 --- a/src/gpu-compute/gpu_compute_driver.cc +++ b/src/gpu-compute/gpu_compute_driver.cc @@ -44,7 +44,7 @@ #include "params/GPUComputeDriver.hh" #include "sim/syscall_emul_buf.hh" -GPUComputeDriver::GPUComputeDriver(Params *p) +GPUComputeDriver::GPUComputeDriver(const Params &p) : HSADriver(p) { DPRINTF(GPUDriver, "Constructing KFD: device\n"); @@ -412,7 +412,7 @@ GPUComputeDriver::ldsApeLimit(Addr apeBase) const } GPUComputeDriver* -GPUComputeDriverParams::create() +GPUComputeDriverParams::create() const { - return new GPUComputeDriver(this); + return new GPUComputeDriver(*this); } diff --git a/src/gpu-compute/gpu_compute_driver.hh b/src/gpu-compute/gpu_compute_driver.hh index b13531de4..53dfb748f 100644 --- a/src/gpu-compute/gpu_compute_driver.hh +++ b/src/gpu-compute/gpu_compute_driver.hh @@ -53,7 +53,7 @@ class GPUComputeDriver final : public HSADriver { public: typedef GPUComputeDriverParams Params; - GPUComputeDriver(Params *p); + GPUComputeDriver(const Params &p); int ioctl(ThreadContext *tc, unsigned req, Addr ioc_buf) override; private: diff --git a/src/gpu-compute/gpu_tlb.cc b/src/gpu-compute/gpu_tlb.cc index 54c3729e9..c4450faba 100644 --- a/src/gpu-compute/gpu_tlb.cc +++ b/src/gpu-compute/gpu_tlb.cc @@ -63,18 +63,18 @@ namespace X86ISA { - GpuTLB::GpuTLB(const Params *p) - : ClockedObject(p), configAddress(0), size(p->size), + GpuTLB::GpuTLB(const Params &p) + : ClockedObject(p), configAddress(0), size(p.size), cleanupEvent([this]{ cleanup(); }, name(), false, Event::Maximum_Pri), exitEvent([this]{ exitCallback(); }, name()) { - assoc = p->assoc; + assoc = p.assoc; assert(assoc <= size); numSets = size/assoc; - allocationPolicy = p->allocationPolicy; + allocationPolicy = p.allocationPolicy; hasMemSidePort = false; - accessDistance = p->accessDistance; + accessDistance = p.accessDistance; tlb.assign(size, TlbEntry()); @@ -100,7 +100,7 @@ namespace X86ISA */ setMask = numSets - 1; - maxCoalescedReqs = p->maxOutstandingReqs; + maxCoalescedReqs = p.maxOutstandingReqs; // Do not allow maxCoalescedReqs to be more than the TLB associativity if (maxCoalescedReqs > assoc) { @@ -109,18 +109,18 @@ namespace X86ISA } outstandingReqs = 0; - hitLatency = p->hitLatency; - missLatency1 = p->missLatency1; - missLatency2 = p->missLatency2; + hitLatency = p.hitLatency; + missLatency1 = p.missLatency1; + missLatency2 = p.missLatency2; // create the response ports based on the number of connected ports - for (size_t i = 0; i < p->port_cpu_side_ports_connection_count; ++i) { + for (size_t i = 0; i < p.port_cpu_side_ports_connection_count; ++i) { cpuSidePort.push_back(new CpuSidePort(csprintf("%s-port%d", name(), i), this, i)); } // create the request ports based on the number of connected ports - for (size_t i = 0; i < p->port_mem_side_ports_connection_count; ++i) { + for (size_t i = 0; i < p.port_mem_side_ports_connection_count; ++i) { memSidePort.push_back(new MemSidePort(csprintf("%s-port%d", name(), i), this, i)); } @@ -1516,8 +1516,8 @@ namespace X86ISA } // namespace X86ISA X86ISA::GpuTLB* -X86GPUTLBParams::create() +X86GPUTLBParams::create() const { - return new X86ISA::GpuTLB(this); + return new X86ISA::GpuTLB(*this); } diff --git a/src/gpu-compute/gpu_tlb.hh b/src/gpu-compute/gpu_tlb.hh index 03b22bd91..edf5914a7 100644 --- a/src/gpu-compute/gpu_tlb.hh +++ b/src/gpu-compute/gpu_tlb.hh @@ -71,7 +71,7 @@ namespace X86ISA public: typedef X86GPUTLBParams Params; - GpuTLB(const Params *p); + GpuTLB(const Params &p); ~GpuTLB(); typedef enum BaseTLB::Mode Mode; diff --git a/src/gpu-compute/lds_state.cc b/src/gpu-compute/lds_state.cc index 58c5d986e..f07b9c297 100644 --- a/src/gpu-compute/lds_state.cc +++ b/src/gpu-compute/lds_state.cc @@ -44,22 +44,22 @@ /** * the default constructor that works with SWIG */ -LdsState::LdsState(const Params *params) : +LdsState::LdsState(const Params ¶ms) : ClockedObject(params), tickEvent(this), cuPort(name() + ".port", this), - maximumSize(params->size), - range(params->range), - bankConflictPenalty(params->bankConflictPenalty), - banks(params->banks) + maximumSize(params.size), + range(params.range), + bankConflictPenalty(params.bankConflictPenalty), + banks(params.banks) { - fatal_if(params->banks <= 0, + fatal_if(params.banks <= 0, "Number of LDS banks should be positive number"); - fatal_if((params->banks & (params->banks - 1)) != 0, + fatal_if((params.banks & (params.banks - 1)) != 0, "Number of LDS banks should be a power of 2"); - fatal_if(params->size <= 0, + fatal_if(params.size <= 0, "cannot allocate an LDS with a size less than 1"); - fatal_if(params->size % 2, + fatal_if(params.size % 2, "the LDS should be an even number"); } @@ -67,9 +67,9 @@ LdsState::LdsState(const Params *params) : * Needed by the SWIG compiler */ LdsState * -LdsStateParams::create() +LdsStateParams::create() const { - return new LdsState(this); + return new LdsState(*this); } /** diff --git a/src/gpu-compute/lds_state.hh b/src/gpu-compute/lds_state.hh index 1caf41290..9b13a8f77 100644 --- a/src/gpu-compute/lds_state.hh +++ b/src/gpu-compute/lds_state.hh @@ -261,7 +261,7 @@ class LdsState: public ClockedObject public: typedef LdsStateParams Params; - LdsState(const Params *params); + LdsState(const Params ¶ms); // prevent copy construction LdsState(const LdsState&) = delete; @@ -271,10 +271,10 @@ class LdsState: public ClockedObject parent = nullptr; } - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } bool diff --git a/src/gpu-compute/local_memory_pipeline.cc b/src/gpu-compute/local_memory_pipeline.cc index ca090e956..3b39820f3 100644 --- a/src/gpu-compute/local_memory_pipeline.cc +++ b/src/gpu-compute/local_memory_pipeline.cc @@ -41,9 +41,9 @@ #include "gpu-compute/vector_register_file.hh" #include "gpu-compute/wavefront.hh" -LocalMemPipeline::LocalMemPipeline(const ComputeUnitParams* p, ComputeUnit &cu) +LocalMemPipeline::LocalMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu) : computeUnit(cu), _name(cu.name() + ".LocalMemPipeline"), - lmQueueSize(p->local_mem_queue_size) + lmQueueSize(p.local_mem_queue_size) { } diff --git a/src/gpu-compute/local_memory_pipeline.hh b/src/gpu-compute/local_memory_pipeline.hh index 3ff3b79ec..98cc75b7a 100644 --- a/src/gpu-compute/local_memory_pipeline.hh +++ b/src/gpu-compute/local_memory_pipeline.hh @@ -55,7 +55,7 @@ class Wavefront; class LocalMemPipeline { public: - LocalMemPipeline(const ComputeUnitParams *p, ComputeUnit &cu); + LocalMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu); void exec(); std::queue &getLMRespFIFO() { return lmReturnedRequests; } diff --git a/src/gpu-compute/pool_manager.cc b/src/gpu-compute/pool_manager.cc index 6c95ca25a..0a0911f80 100644 --- a/src/gpu-compute/pool_manager.cc +++ b/src/gpu-compute/pool_manager.cc @@ -33,8 +33,8 @@ #include "gpu-compute/pool_manager.hh" -PoolManager::PoolManager(const PoolManagerParams *p) - : SimObject(p), _minAllocation(p->min_alloc), _poolSize(p->pool_size) +PoolManager::PoolManager(const PoolManagerParams &p) + : SimObject(p), _minAllocation(p.min_alloc), _poolSize(p.pool_size) { assert(_poolSize > 0); } diff --git a/src/gpu-compute/pool_manager.hh b/src/gpu-compute/pool_manager.hh index 9bbaa6459..0f102c2d8 100644 --- a/src/gpu-compute/pool_manager.hh +++ b/src/gpu-compute/pool_manager.hh @@ -45,7 +45,7 @@ class PoolManager : public SimObject { public: - PoolManager(const PoolManagerParams *p); + PoolManager(const PoolManagerParams &p); virtual ~PoolManager() { _poolSize = 0; } uint32_t minAllocation() { return _minAllocation; } virtual std::string printRegion() = 0; diff --git a/src/gpu-compute/register_file.cc b/src/gpu-compute/register_file.cc index eb6474cd2..51d5693c1 100644 --- a/src/gpu-compute/register_file.cc +++ b/src/gpu-compute/register_file.cc @@ -48,8 +48,8 @@ #include "gpu-compute/wavefront.hh" #include "params/RegisterFile.hh" -RegisterFile::RegisterFile(const RegisterFileParams *p) - : SimObject(p), simdId(p->simd_id), _numRegs(p->num_regs) +RegisterFile::RegisterFile(const RegisterFileParams &p) + : SimObject(p), simdId(p.simd_id), _numRegs(p.num_regs) { fatal_if((_numRegs % 2) != 0, "VRF size is illegal\n"); fatal_if(simdId < 0, "Illegal SIMD id for VRF"); @@ -172,9 +172,9 @@ RegisterFile::waveExecuteInst(Wavefront *w, GPUDynInstPtr ii) } RegisterFile* -RegisterFileParams::create() +RegisterFileParams::create() const { - return new RegisterFile(this); + return new RegisterFile(*this); } // Events diff --git a/src/gpu-compute/register_file.hh b/src/gpu-compute/register_file.hh index 4bd705a5e..8a417a357 100644 --- a/src/gpu-compute/register_file.hh +++ b/src/gpu-compute/register_file.hh @@ -58,7 +58,7 @@ struct RegisterFileParams; class RegisterFile : public SimObject { public: - RegisterFile(const RegisterFileParams *p); + RegisterFile(const RegisterFileParams &p); virtual ~RegisterFile(); virtual void setParent(ComputeUnit *_computeUnit); int numRegs() const { return _numRegs; } diff --git a/src/gpu-compute/register_manager.cc b/src/gpu-compute/register_manager.cc index 65c126066..fefb32960 100644 --- a/src/gpu-compute/register_manager.cc +++ b/src/gpu-compute/register_manager.cc @@ -44,11 +44,11 @@ #include "gpu-compute/wavefront.hh" #include "params/RegisterManager.hh" -RegisterManager::RegisterManager(const RegisterManagerParams *p) - : SimObject(p), srfPoolMgrs(p->srf_pool_managers), - vrfPoolMgrs(p->vrf_pool_managers) +RegisterManager::RegisterManager(const RegisterManagerParams &p) + : SimObject(p), srfPoolMgrs(p.srf_pool_managers), + vrfPoolMgrs(p.vrf_pool_managers) { - if (p->policy == "static") { + if (p.policy == "static") { policy = new StaticRegisterManagerPolicy(); } else { fatal("Unimplemented Register Manager Policy"); @@ -137,7 +137,7 @@ RegisterManager::regStats() } RegisterManager* -RegisterManagerParams::create() +RegisterManagerParams::create() const { - return new RegisterManager(this); + return new RegisterManager(*this); } diff --git a/src/gpu-compute/register_manager.hh b/src/gpu-compute/register_manager.hh index 60acf9533..e09a748f1 100644 --- a/src/gpu-compute/register_manager.hh +++ b/src/gpu-compute/register_manager.hh @@ -58,7 +58,7 @@ struct RegisterManagerParams; class RegisterManager : public SimObject { public: - RegisterManager(const RegisterManagerParams* params); + RegisterManager(const RegisterManagerParams ¶ms); ~RegisterManager(); void setParent(ComputeUnit *cu); void exec(); diff --git a/src/gpu-compute/scalar_memory_pipeline.cc b/src/gpu-compute/scalar_memory_pipeline.cc index 5e4496d51..35db8a351 100644 --- a/src/gpu-compute/scalar_memory_pipeline.cc +++ b/src/gpu-compute/scalar_memory_pipeline.cc @@ -43,10 +43,10 @@ #include "gpu-compute/shader.hh" #include "gpu-compute/wavefront.hh" -ScalarMemPipeline::ScalarMemPipeline(const ComputeUnitParams* p, +ScalarMemPipeline::ScalarMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu) : computeUnit(cu), _name(cu.name() + ".ScalarMemPipeline"), - queueSize(p->scalar_mem_queue_size), + queueSize(p.scalar_mem_queue_size), inflightStores(0), inflightLoads(0) { } diff --git a/src/gpu-compute/scalar_memory_pipeline.hh b/src/gpu-compute/scalar_memory_pipeline.hh index b839701ae..7f1acecbb 100644 --- a/src/gpu-compute/scalar_memory_pipeline.hh +++ b/src/gpu-compute/scalar_memory_pipeline.hh @@ -59,7 +59,7 @@ class ComputeUnit; class ScalarMemPipeline { public: - ScalarMemPipeline(const ComputeUnitParams *p, ComputeUnit &cu); + ScalarMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu); void exec(); std::queue &getGMReqFIFO() { return issuedRequests; } diff --git a/src/gpu-compute/scalar_register_file.cc b/src/gpu-compute/scalar_register_file.cc index 150587676..fbb81fe69 100644 --- a/src/gpu-compute/scalar_register_file.cc +++ b/src/gpu-compute/scalar_register_file.cc @@ -44,7 +44,7 @@ #include "gpu-compute/wavefront.hh" #include "params/ScalarRegisterFile.hh" -ScalarRegisterFile::ScalarRegisterFile(const ScalarRegisterFileParams *p) +ScalarRegisterFile::ScalarRegisterFile(const ScalarRegisterFileParams &p) : RegisterFile(p) { regFile.resize(numRegs(), 0); @@ -158,7 +158,7 @@ ScalarRegisterFile::scheduleWriteOperandsFromLoad(Wavefront *w, } ScalarRegisterFile* -ScalarRegisterFileParams::create() +ScalarRegisterFileParams::create() const { - return new ScalarRegisterFile(this); + return new ScalarRegisterFile(*this); } diff --git a/src/gpu-compute/scalar_register_file.hh b/src/gpu-compute/scalar_register_file.hh index 8002334b3..8b1b126dc 100644 --- a/src/gpu-compute/scalar_register_file.hh +++ b/src/gpu-compute/scalar_register_file.hh @@ -53,7 +53,7 @@ class ScalarRegisterFile : public RegisterFile public: using ScalarRegU32 = TheGpuISA::ScalarRegU32; - ScalarRegisterFile(const ScalarRegisterFileParams *p); + ScalarRegisterFile(const ScalarRegisterFileParams &p); ~ScalarRegisterFile() { } virtual bool operandsReady(Wavefront *w, GPUDynInstPtr ii) const override; diff --git a/src/gpu-compute/schedule_stage.cc b/src/gpu-compute/schedule_stage.cc index a311f5db4..851cca81b 100644 --- a/src/gpu-compute/schedule_stage.cc +++ b/src/gpu-compute/schedule_stage.cc @@ -43,7 +43,7 @@ #include "gpu-compute/vector_register_file.hh" #include "gpu-compute/wavefront.hh" -ScheduleStage::ScheduleStage(const ComputeUnitParams *p, ComputeUnit &cu, +ScheduleStage::ScheduleStage(const ComputeUnitParams &p, ComputeUnit &cu, ScoreboardCheckToSchedule &from_scoreboard_check, ScheduleToExecute &to_execute) : computeUnit(cu), fromScoreboardCheck(from_scoreboard_check), diff --git a/src/gpu-compute/schedule_stage.hh b/src/gpu-compute/schedule_stage.hh index c4dc28237..1a9aca17e 100644 --- a/src/gpu-compute/schedule_stage.hh +++ b/src/gpu-compute/schedule_stage.hh @@ -59,7 +59,7 @@ struct ComputeUnitParams; class ScheduleStage { public: - ScheduleStage(const ComputeUnitParams *p, ComputeUnit &cu, + ScheduleStage(const ComputeUnitParams &p, ComputeUnit &cu, ScoreboardCheckToSchedule &from_scoreboard_check, ScheduleToExecute &to_execute); ~ScheduleStage(); diff --git a/src/gpu-compute/scheduler.cc b/src/gpu-compute/scheduler.cc index 3986658e0..6b3de0313 100644 --- a/src/gpu-compute/scheduler.cc +++ b/src/gpu-compute/scheduler.cc @@ -37,11 +37,11 @@ #include "gpu-compute/rr_scheduling_policy.hh" #include "params/ComputeUnit.hh" -Scheduler::Scheduler(const ComputeUnitParams *p) +Scheduler::Scheduler(const ComputeUnitParams &p) { - if (p->execPolicy == "OLDEST-FIRST") { + if (p.execPolicy == "OLDEST-FIRST") { schedPolicy = new OFSchedulingPolicy(); - } else if (p->execPolicy == "ROUND-ROBIN") { + } else if (p.execPolicy == "ROUND-ROBIN") { schedPolicy = new RRSchedulingPolicy(); } else { fatal("Unimplemented scheduling policy.\n"); diff --git a/src/gpu-compute/scheduler.hh b/src/gpu-compute/scheduler.hh index 630433595..1acf64374 100644 --- a/src/gpu-compute/scheduler.hh +++ b/src/gpu-compute/scheduler.hh @@ -43,7 +43,7 @@ class ComputeUnitParams; class Scheduler { public: - Scheduler(const ComputeUnitParams *params); + Scheduler(const ComputeUnitParams ¶ms); Wavefront *chooseWave(); void bindList(std::vector *sched_list); diff --git a/src/gpu-compute/scoreboard_check_stage.cc b/src/gpu-compute/scoreboard_check_stage.cc index 0e52d310c..dfda0ad79 100644 --- a/src/gpu-compute/scoreboard_check_stage.cc +++ b/src/gpu-compute/scoreboard_check_stage.cc @@ -44,7 +44,7 @@ #include "gpu-compute/wavefront.hh" #include "params/ComputeUnit.hh" -ScoreboardCheckStage::ScoreboardCheckStage(const ComputeUnitParams *p, +ScoreboardCheckStage::ScoreboardCheckStage(const ComputeUnitParams &p, ComputeUnit &cu, ScoreboardCheckToSchedule &to_schedule) diff --git a/src/gpu-compute/scoreboard_check_stage.hh b/src/gpu-compute/scoreboard_check_stage.hh index 87582759b..c45ea7571 100644 --- a/src/gpu-compute/scoreboard_check_stage.hh +++ b/src/gpu-compute/scoreboard_check_stage.hh @@ -71,7 +71,7 @@ class ScoreboardCheckStage NRDY_CONDITIONS }; - ScoreboardCheckStage(const ComputeUnitParams* p, ComputeUnit &cu, + ScoreboardCheckStage(const ComputeUnitParams &p, ComputeUnit &cu, ScoreboardCheckToSchedule &to_schedule); ~ScoreboardCheckStage(); void exec(); diff --git a/src/gpu-compute/shader.cc b/src/gpu-compute/shader.cc index cc039d2f7..0b4119336 100644 --- a/src/gpu-compute/shader.cc +++ b/src/gpu-compute/shader.cc @@ -51,20 +51,20 @@ #include "mem/ruby/system/RubySystem.hh" #include "sim/sim_exit.hh" -Shader::Shader(const Params *p) : ClockedObject(p), +Shader::Shader(const Params &p) : ClockedObject(p), _activeCus(0), _lastInactiveTick(0), cpuThread(nullptr), - gpuTc(nullptr), cpuPointer(p->cpu_pointer), + gpuTc(nullptr), cpuPointer(p.cpu_pointer), tickEvent([this]{ execScheduledAdds(); }, "Shader scheduled adds event", false, Event::CPU_Tick_Pri), - timingSim(p->timing), hsail_mode(SIMT), - impl_kern_launch_acq(p->impl_kern_launch_acq), - impl_kern_end_rel(p->impl_kern_end_rel), + timingSim(p.timing), hsail_mode(SIMT), + impl_kern_launch_acq(p.impl_kern_launch_acq), + impl_kern_end_rel(p.impl_kern_end_rel), coissue_return(1), - trace_vgpr_all(1), n_cu((p->CUs).size()), n_wf(p->n_wf), - globalMemSize(p->globalmem), - nextSchedCu(0), sa_n(0), gpuCmdProc(*p->gpu_cmd_proc), - _dispatcher(*p->dispatcher), - max_valu_insts(p->max_valu_insts), total_valu_insts(0) + trace_vgpr_all(1), n_cu((p.CUs).size()), n_wf(p.n_wf), + globalMemSize(p.globalmem), + nextSchedCu(0), sa_n(0), gpuCmdProc(*p.gpu_cmd_proc), + _dispatcher(*p.dispatcher), + max_valu_insts(p.max_valu_insts), total_valu_insts(0) { gpuCmdProc.setShader(this); _dispatcher.setShader(this); @@ -85,10 +85,10 @@ Shader::Shader(const Params *p) : ClockedObject(p), panic_if(n_wf <= 0, "Must have at least 1 WF Slot per SIMD"); for (int i = 0; i < n_cu; ++i) { - cuList[i] = p->CUs[i]; + cuList[i] = p.CUs[i]; assert(i == cuList[i]->cu_id); cuList[i]->shader = this; - cuList[i]->idleCUTimeout = p->idlecu_timeout; + cuList[i]->idleCUTimeout = p.idlecu_timeout; } } @@ -155,9 +155,9 @@ Shader::updateContext(int cid) { } Shader* -ShaderParams::create() +ShaderParams::create() const { - return new Shader(this); + return new Shader(*this); } void diff --git a/src/gpu-compute/shader.hh b/src/gpu-compute/shader.hh index baf6df46c..76ee3c9f7 100644 --- a/src/gpu-compute/shader.hh +++ b/src/gpu-compute/shader.hh @@ -260,7 +260,7 @@ class Shader : public ClockedObject int64_t max_valu_insts; int64_t total_valu_insts; - Shader(const Params *p); + Shader(const Params &p); ~Shader(); virtual void init(); diff --git a/src/gpu-compute/simple_pool_manager.cc b/src/gpu-compute/simple_pool_manager.cc index 1d0f1b8d7..78f4907bd 100644 --- a/src/gpu-compute/simple_pool_manager.cc +++ b/src/gpu-compute/simple_pool_manager.cc @@ -36,9 +36,9 @@ #include "base/logging.hh" SimplePoolManager * -SimplePoolManagerParams::create() +SimplePoolManagerParams::create() const { - return new SimplePoolManager(this); + return new SimplePoolManager(*this); } // return the min number of elements that the manager can reserve given diff --git a/src/gpu-compute/simple_pool_manager.hh b/src/gpu-compute/simple_pool_manager.hh index 9fd90a505..06b04e5f2 100644 --- a/src/gpu-compute/simple_pool_manager.hh +++ b/src/gpu-compute/simple_pool_manager.hh @@ -45,7 +45,7 @@ class SimplePoolManager : public PoolManager { public: - SimplePoolManager(const PoolManagerParams *p) + SimplePoolManager(const PoolManagerParams &p) : PoolManager(p), _regionSize(0), _nxtFreeIdx(0), _reservedGroups(0) { diff --git a/src/gpu-compute/tlb_coalescer.cc b/src/gpu-compute/tlb_coalescer.cc index da4030b72..55be11e06 100644 --- a/src/gpu-compute/tlb_coalescer.cc +++ b/src/gpu-compute/tlb_coalescer.cc @@ -40,11 +40,11 @@ #include "debug/GPUTLB.hh" #include "sim/process.hh" -TLBCoalescer::TLBCoalescer(const Params *p) +TLBCoalescer::TLBCoalescer(const Params &p) : ClockedObject(p), - TLBProbesPerCycle(p->probesPerCycle), - coalescingWindow(p->coalescingWindow), - disableCoalescing(p->disableCoalescing), + TLBProbesPerCycle(p.probesPerCycle), + coalescingWindow(p.coalescingWindow), + disableCoalescing(p.disableCoalescing), probeTLBEvent([this]{ processProbeTLBEvent(); }, "Probe the TLB below", false, Event::CPU_Tick_Pri), @@ -53,13 +53,13 @@ TLBCoalescer::TLBCoalescer(const Params *p) false, Event::Maximum_Pri) { // create the response ports based on the number of connected ports - for (size_t i = 0; i < p->port_cpu_side_ports_connection_count; ++i) { + for (size_t i = 0; i < p.port_cpu_side_ports_connection_count; ++i) { cpuSidePort.push_back(new CpuSidePort(csprintf("%s-port%d", name(), i), this, i)); } // create the request ports based on the number of connected ports - for (size_t i = 0; i < p->port_mem_side_ports_connection_count; ++i) { + for (size_t i = 0; i < p.port_mem_side_ports_connection_count; ++i) { memSidePort.push_back(new MemSidePort(csprintf("%s-port%d", name(), i), this, i)); } @@ -555,8 +555,8 @@ TLBCoalescer::regStats() TLBCoalescer* -TLBCoalescerParams::create() +TLBCoalescerParams::create() const { - return new TLBCoalescer(this); + return new TLBCoalescer(*this); } diff --git a/src/gpu-compute/tlb_coalescer.hh b/src/gpu-compute/tlb_coalescer.hh index 4ab76f613..8b71a982d 100644 --- a/src/gpu-compute/tlb_coalescer.hh +++ b/src/gpu-compute/tlb_coalescer.hh @@ -66,7 +66,7 @@ class TLBCoalescer : public ClockedObject { public: typedef TLBCoalescerParams Params; - TLBCoalescer(const Params *p); + TLBCoalescer(const Params &p); ~TLBCoalescer() { } // Number of TLB probes per cycle. Parameterizable - default 2. diff --git a/src/gpu-compute/vector_register_file.cc b/src/gpu-compute/vector_register_file.cc index 3bddfccc1..a4cc1275e 100644 --- a/src/gpu-compute/vector_register_file.cc +++ b/src/gpu-compute/vector_register_file.cc @@ -44,7 +44,7 @@ #include "gpu-compute/wavefront.hh" #include "params/VectorRegisterFile.hh" -VectorRegisterFile::VectorRegisterFile(const VectorRegisterFileParams *p) +VectorRegisterFile::VectorRegisterFile(const VectorRegisterFileParams &p) : RegisterFile(p) { regFile.resize(numRegs(), VecRegContainer()); @@ -209,7 +209,7 @@ VectorRegisterFile::scheduleWriteOperandsFromLoad( } VectorRegisterFile* -VectorRegisterFileParams::create() +VectorRegisterFileParams::create() const { - return new VectorRegisterFile(this); + return new VectorRegisterFile(*this); } diff --git a/src/gpu-compute/vector_register_file.hh b/src/gpu-compute/vector_register_file.hh index 0ad086d68..a9f60b4fb 100644 --- a/src/gpu-compute/vector_register_file.hh +++ b/src/gpu-compute/vector_register_file.hh @@ -48,7 +48,7 @@ class VectorRegisterFile : public RegisterFile public: using VecRegContainer = TheGpuISA::VecRegContainerU32; - VectorRegisterFile(const VectorRegisterFileParams *p); + VectorRegisterFile(const VectorRegisterFileParams &p); ~VectorRegisterFile() { } virtual bool operandsReady(Wavefront *w, GPUDynInstPtr ii) const override; diff --git a/src/gpu-compute/wavefront.cc b/src/gpu-compute/wavefront.cc index dd914ca2e..08acb5ed0 100644 --- a/src/gpu-compute/wavefront.cc +++ b/src/gpu-compute/wavefront.cc @@ -45,14 +45,14 @@ #include "gpu-compute/vector_register_file.hh" Wavefront* -WavefrontParams::create() +WavefrontParams::create() const { - return new Wavefront(this); + return new Wavefront(*this); } -Wavefront::Wavefront(const Params *p) - : SimObject(p), wfSlotId(p->wf_slot_id), simdId(p->simdId), - maxIbSize(p->max_ib_size), _gpuISA(*this), +Wavefront::Wavefront(const Params &p) + : SimObject(p), wfSlotId(p.wf_slot_id), simdId(p.simdId), + maxIbSize(p.max_ib_size), _gpuISA(*this), vmWaitCnt(-1), expWaitCnt(-1), lgkmWaitCnt(-1), vmemInstsIssued(0), expInstsIssued(0), lgkmInstsIssued(0), barId(WFBarrier::InvalidID) @@ -83,18 +83,18 @@ Wavefront::Wavefront(const Params *p) memTraceBusy = 0; oldVgprTcnt = 0xffffffffffffffffll; oldDgprTcnt = 0xffffffffffffffffll; - oldVgpr.resize(p->wf_size); + oldVgpr.resize(p.wf_size); pendingFetch = false; dropFetch = false; maxVgprs = 0; maxSgprs = 0; - lastAddr.resize(p->wf_size); - workItemFlatId.resize(p->wf_size); - oldDgpr.resize(p->wf_size); + lastAddr.resize(p.wf_size); + workItemFlatId.resize(p.wf_size); + oldDgpr.resize(p.wf_size); for (int i = 0; i < 3; ++i) { - workItemId[i].resize(p->wf_size); + workItemId[i].resize(p.wf_size); } _execMask.set(); diff --git a/src/gpu-compute/wavefront.hh b/src/gpu-compute/wavefront.hh index 34e45facf..80fc3248a 100644 --- a/src/gpu-compute/wavefront.hh +++ b/src/gpu-compute/wavefront.hh @@ -273,7 +273,7 @@ class Wavefront : public SimObject uint8_t *context; typedef WavefrontParams Params; - Wavefront(const Params *p); + Wavefront(const Params &p); ~Wavefront(); virtual void init(); diff --git a/src/learning_gem5/part2/goodbye_object.cc b/src/learning_gem5/part2/goodbye_object.cc index 090458db3..4be0cc69e 100644 --- a/src/learning_gem5/part2/goodbye_object.cc +++ b/src/learning_gem5/part2/goodbye_object.cc @@ -32,9 +32,9 @@ #include "debug/HelloExample.hh" #include "sim/sim_exit.hh" -GoodbyeObject::GoodbyeObject(GoodbyeObjectParams *params) : +GoodbyeObject::GoodbyeObject(const GoodbyeObjectParams ¶ms) : SimObject(params), event([this]{ processEvent(); }, name() + ".event"), - bandwidth(params->write_bandwidth), bufferSize(params->buffer_size), + bandwidth(params.write_bandwidth), bufferSize(params.buffer_size), buffer(nullptr), bufferUsed(0) { buffer = new char[bufferSize](); @@ -96,7 +96,7 @@ GoodbyeObject::fillBuffer() } GoodbyeObject* -GoodbyeObjectParams::create() +GoodbyeObjectParams::create() const { - return new GoodbyeObject(this); + return new GoodbyeObject(*this); } diff --git a/src/learning_gem5/part2/goodbye_object.hh b/src/learning_gem5/part2/goodbye_object.hh index 1e6546bd6..eaf3c5c8f 100644 --- a/src/learning_gem5/part2/goodbye_object.hh +++ b/src/learning_gem5/part2/goodbye_object.hh @@ -67,7 +67,7 @@ class GoodbyeObject : public SimObject int bufferUsed; public: - GoodbyeObject(GoodbyeObjectParams *p); + GoodbyeObject(const GoodbyeObjectParams &p); ~GoodbyeObject(); /** diff --git a/src/learning_gem5/part2/hello_object.cc b/src/learning_gem5/part2/hello_object.cc index 7207051da..b987c3807 100644 --- a/src/learning_gem5/part2/hello_object.cc +++ b/src/learning_gem5/part2/hello_object.cc @@ -32,16 +32,16 @@ #include "base/trace.hh" #include "debug/HelloExample.hh" -HelloObject::HelloObject(HelloObjectParams *params) : +HelloObject::HelloObject(const HelloObjectParams ¶ms) : SimObject(params), // This is a C++ lambda. When the event is triggered, it will call the // processEvent() function. (this must be captured) event([this]{ processEvent(); }, name() + ".event"), - goodbye(params->goodbye_object), + goodbye(params.goodbye_object), // Note: This is not needed as you can *always* reference this->name() - myName(params->name), - latency(params->time_to_wait), - timesLeft(params->number_of_fires) + myName(params.name), + latency(params.time_to_wait), + timesLeft(params.number_of_fires) { DPRINTF(HelloExample, "Created the hello object\n"); panic_if(!goodbye, "HelloObject must have a non-null GoodbyeObject"); @@ -70,7 +70,7 @@ HelloObject::processEvent() } HelloObject* -HelloObjectParams::create() +HelloObjectParams::create() const { - return new HelloObject(this); + return new HelloObject(*this); } diff --git a/src/learning_gem5/part2/hello_object.hh b/src/learning_gem5/part2/hello_object.hh index b1dd6cc3a..ce167ff1d 100644 --- a/src/learning_gem5/part2/hello_object.hh +++ b/src/learning_gem5/part2/hello_object.hh @@ -59,7 +59,7 @@ class HelloObject : public SimObject int timesLeft; public: - HelloObject(HelloObjectParams *p); + HelloObject(const HelloObjectParams &p); /** * Part of a SimObject's initilaization. Startup is called after all diff --git a/src/learning_gem5/part2/simple_cache.cc b/src/learning_gem5/part2/simple_cache.cc index d91eb3c62..056520204 100644 --- a/src/learning_gem5/part2/simple_cache.cc +++ b/src/learning_gem5/part2/simple_cache.cc @@ -32,21 +32,20 @@ #include "debug/SimpleCache.hh" #include "sim/system.hh" -SimpleCache::SimpleCache(SimpleCacheParams *params) : +SimpleCache::SimpleCache(const SimpleCacheParams ¶ms) : ClockedObject(params), - latency(params->latency), - blockSize(params->system->cacheLineSize()), - capacity(params->size / blockSize), - memPort(params->name + ".mem_side", this), + latency(params.latency), + blockSize(params.system->cacheLineSize()), + capacity(params.size / blockSize), + memPort(params.name + ".mem_side", this), blocked(false), originalPacket(nullptr), waitingPortId(-1), stats(this) { // Since the CPU side ports are a vector of ports, create an instance of // the CPUSidePort for each connection. This member of params is // automatically created depending on the name of the vector port and // holds the number of connections to this port name - for (int i = 0; i < params->port_cpu_side_connection_count; ++i) { - cpuPorts.emplace_back(name() + csprintf(".cpu_side[%d]", i), - i, this); + for (int i = 0; i < params.port_cpu_side_connection_count; ++i) { + cpuPorts.emplace_back(name() + csprintf(".cpu_side[%d]", i), i, this); } } @@ -435,7 +434,7 @@ SimpleCache::SimpleCacheStats::SimpleCacheStats(Stats::Group *parent) SimpleCache* -SimpleCacheParams::create() +SimpleCacheParams::create() const { - return new SimpleCache(this); + return new SimpleCache(*this); } diff --git a/src/learning_gem5/part2/simple_cache.hh b/src/learning_gem5/part2/simple_cache.hh index 2f39f3d00..68ab0012b 100644 --- a/src/learning_gem5/part2/simple_cache.hh +++ b/src/learning_gem5/part2/simple_cache.hh @@ -306,7 +306,7 @@ class SimpleCache : public ClockedObject /** constructor */ - SimpleCache(SimpleCacheParams *params); + SimpleCache(const SimpleCacheParams ¶ms); /** * Get a port with a given name and index. This is used at diff --git a/src/learning_gem5/part2/simple_memobj.cc b/src/learning_gem5/part2/simple_memobj.cc index 6fd287c9e..490322070 100644 --- a/src/learning_gem5/part2/simple_memobj.cc +++ b/src/learning_gem5/part2/simple_memobj.cc @@ -31,11 +31,11 @@ #include "base/trace.hh" #include "debug/SimpleMemobj.hh" -SimpleMemobj::SimpleMemobj(SimpleMemobjParams *params) : +SimpleMemobj::SimpleMemobj(const SimpleMemobjParams ¶ms) : SimObject(params), - instPort(params->name + ".inst_port", this), - dataPort(params->name + ".data_port", this), - memPort(params->name + ".mem_side", this), + instPort(params.name + ".inst_port", this), + dataPort(params.name + ".data_port", this), + memPort(params.name + ".mem_side", this), blocked(false) { } @@ -232,7 +232,7 @@ SimpleMemobj::sendRangeChange() SimpleMemobj* -SimpleMemobjParams::create() +SimpleMemobjParams::create() const { - return new SimpleMemobj(this); + return new SimpleMemobj(*this); } diff --git a/src/learning_gem5/part2/simple_memobj.hh b/src/learning_gem5/part2/simple_memobj.hh index 11a4b36ce..fb5295be8 100644 --- a/src/learning_gem5/part2/simple_memobj.hh +++ b/src/learning_gem5/part2/simple_memobj.hh @@ -231,7 +231,7 @@ class SimpleMemobj : public SimObject /** constructor */ - SimpleMemobj(SimpleMemobjParams *params); + SimpleMemobj(const SimpleMemobjParams ¶ms); /** * Get a port with a given name and index. This is used at diff --git a/src/learning_gem5/part2/simple_object.cc b/src/learning_gem5/part2/simple_object.cc index 353fddfca..4b482da90 100644 --- a/src/learning_gem5/part2/simple_object.cc +++ b/src/learning_gem5/part2/simple_object.cc @@ -30,14 +30,14 @@ #include -SimpleObject::SimpleObject(SimpleObjectParams *params) : +SimpleObject::SimpleObject(const SimpleObjectParams ¶ms) : SimObject(params) { std::cout << "Hello World! From a SimObject!" << std::endl; } SimpleObject* -SimpleObjectParams::create() +SimpleObjectParams::create() const { - return new SimpleObject(this); + return new SimpleObject(*this); } diff --git a/src/learning_gem5/part2/simple_object.hh b/src/learning_gem5/part2/simple_object.hh index b6e9ce1d4..7d49fc884 100644 --- a/src/learning_gem5/part2/simple_object.hh +++ b/src/learning_gem5/part2/simple_object.hh @@ -35,7 +35,7 @@ class SimpleObject : public SimObject { public: - SimpleObject(SimpleObjectParams *p); + SimpleObject(const SimpleObjectParams &p); }; #endif // __LEARNING_GEM5_SIMPLE_OBJECT_HH__ diff --git a/src/mem/abstract_mem.cc b/src/mem/abstract_mem.cc index 10aea37f1..3600f34fb 100644 --- a/src/mem/abstract_mem.cc +++ b/src/mem/abstract_mem.cc @@ -53,13 +53,13 @@ using namespace std; -AbstractMemory::AbstractMemory(const Params *p) : - ClockedObject(p), range(params()->range), pmemAddr(NULL), - backdoor(params()->range, nullptr, +AbstractMemory::AbstractMemory(const Params &p) : + ClockedObject(p), range(p.range), pmemAddr(NULL), + backdoor(params().range, nullptr, (MemBackdoor::Flags)(MemBackdoor::Readable | MemBackdoor::Writeable)), - confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map), - kvmMap(p->kvm_map), _system(NULL), + confTableReported(p.conf_table_reported), inAddrMap(p.in_addr_map), + kvmMap(p.kvm_map), _system(NULL), stats(*this) { panic_if(!range.valid() || !range.size(), @@ -72,7 +72,7 @@ AbstractMemory::initState() { ClockedObject::initState(); - const auto &file = params()->image_file; + const auto &file = params().image_file; if (file == "") return; diff --git a/src/mem/abstract_mem.hh b/src/mem/abstract_mem.hh index fe41ddceb..cd18e0f96 100644 --- a/src/mem/abstract_mem.hh +++ b/src/mem/abstract_mem.hh @@ -206,7 +206,7 @@ class AbstractMemory : public ClockedObject typedef AbstractMemoryParams Params; - AbstractMemory(const Params* p); + AbstractMemory(const Params &p); virtual ~AbstractMemory() {} void initState() override; @@ -217,7 +217,7 @@ class AbstractMemory : public ClockedObject * * @return true if null */ - bool isNull() const { return params()->null; } + bool isNull() const { return params().null; } /** * Set the host memory backing store to be used by this memory @@ -251,10 +251,10 @@ class AbstractMemory : public ClockedObject */ void system(System *sys) { _system = sys; } - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } /** diff --git a/src/mem/addr_mapper.cc b/src/mem/addr_mapper.cc index 08a5cacd3..86a81e019 100644 --- a/src/mem/addr_mapper.cc +++ b/src/mem/addr_mapper.cc @@ -37,7 +37,7 @@ #include "mem/addr_mapper.hh" -AddrMapper::AddrMapper(const AddrMapperParams* p) +AddrMapper::AddrMapper(const AddrMapperParams &p) : SimObject(p), memSidePort(name() + "-mem_side_port", *this), cpuSidePort(name() + "-cpu_side_port", *this) @@ -200,10 +200,10 @@ AddrMapper::recvRangeChange() cpuSidePort.sendRangeChange(); } -RangeAddrMapper::RangeAddrMapper(const RangeAddrMapperParams* p) : +RangeAddrMapper::RangeAddrMapper(const RangeAddrMapperParams &p) : AddrMapper(p), - originalRanges(p->original_ranges), - remappedRanges(p->remapped_ranges) + originalRanges(p.original_ranges), + remappedRanges(p.remapped_ranges) { if (originalRanges.size() != remappedRanges.size()) fatal("AddrMapper: original and shadowed range list must " @@ -217,9 +217,9 @@ RangeAddrMapper::RangeAddrMapper(const RangeAddrMapperParams* p) : } RangeAddrMapper* -RangeAddrMapperParams::create() +RangeAddrMapperParams::create() const { - return new RangeAddrMapper(this); + return new RangeAddrMapper(*this); } Addr diff --git a/src/mem/addr_mapper.hh b/src/mem/addr_mapper.hh index 39db25a87..2fad1330c 100644 --- a/src/mem/addr_mapper.hh +++ b/src/mem/addr_mapper.hh @@ -57,7 +57,7 @@ class AddrMapper : public SimObject public: - AddrMapper(const AddrMapperParams* params); + AddrMapper(const AddrMapperParams ¶ms); virtual ~AddrMapper() { } @@ -241,7 +241,7 @@ class RangeAddrMapper : public AddrMapper public: - RangeAddrMapper(const RangeAddrMapperParams* p); + RangeAddrMapper(const RangeAddrMapperParams &p); ~RangeAddrMapper() { } diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc index ae1b8eeb6..135d32c42 100644 --- a/src/mem/bridge.cc +++ b/src/mem/bridge.cc @@ -74,12 +74,12 @@ Bridge::BridgeRequestPort::BridgeRequestPort(const std::string& _name, { } -Bridge::Bridge(Params *p) +Bridge::Bridge(const Params &p) : ClockedObject(p), - cpuSidePort(p->name + ".cpu_side_port", *this, memSidePort, - ticksToCycles(p->delay), p->resp_size, p->ranges), - memSidePort(p->name + ".mem_side_port", *this, cpuSidePort, - ticksToCycles(p->delay), p->req_size) + cpuSidePort(p.name + ".cpu_side_port", *this, memSidePort, + ticksToCycles(p.delay), p.resp_size, p.ranges), + memSidePort(p.name + ".mem_side_port", *this, cpuSidePort, + ticksToCycles(p.delay), p.req_size) { } @@ -392,7 +392,7 @@ Bridge::BridgeResponsePort::getAddrRanges() const } Bridge * -BridgeParams::create() +BridgeParams::create() const { - return new Bridge(this); + return new Bridge(*this); } diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh index 2b03e136d..8f74478e1 100644 --- a/src/mem/bridge.hh +++ b/src/mem/bridge.hh @@ -322,7 +322,7 @@ class Bridge : public ClockedObject typedef BridgeParams Params; - Bridge(Params *p); + Bridge(const Params &p); }; #endif //__MEM_BRIDGE_HH__ diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc index a24ffc765..a86cc2e92 100644 --- a/src/mem/cache/base.cc +++ b/src/mem/cache/base.cc @@ -73,38 +73,38 @@ BaseCache::CacheResponsePort::CacheResponsePort(const std::string &_name, { } -BaseCache::BaseCache(const BaseCacheParams *p, unsigned blk_size) +BaseCache::BaseCache(const BaseCacheParams &p, unsigned blk_size) : ClockedObject(p), - cpuSidePort (p->name + ".cpu_side_port", this, "CpuSidePort"), - memSidePort(p->name + ".mem_side_port", this, "MemSidePort"), - mshrQueue("MSHRs", p->mshrs, 0, p->demand_mshr_reserve), // see below - writeBuffer("write buffer", p->write_buffers, p->mshrs), // see below - tags(p->tags), - compressor(p->compressor), - prefetcher(p->prefetcher), - writeAllocator(p->write_allocator), - writebackClean(p->writeback_clean), + cpuSidePort (p.name + ".cpu_side_port", this, "CpuSidePort"), + memSidePort(p.name + ".mem_side_port", this, "MemSidePort"), + mshrQueue("MSHRs", p.mshrs, 0, p.demand_mshr_reserve), // see below + writeBuffer("write buffer", p.write_buffers, p.mshrs), // see below + tags(p.tags), + compressor(p.compressor), + prefetcher(p.prefetcher), + writeAllocator(p.write_allocator), + writebackClean(p.writeback_clean), tempBlockWriteback(nullptr), writebackTempBlockAtomicEvent([this]{ writebackTempBlockAtomic(); }, name(), false, EventBase::Delayed_Writeback_Pri), blkSize(blk_size), - lookupLatency(p->tag_latency), - dataLatency(p->data_latency), - forwardLatency(p->tag_latency), - fillLatency(p->data_latency), - responseLatency(p->response_latency), - sequentialAccess(p->sequential_access), - numTarget(p->tgts_per_mshr), + lookupLatency(p.tag_latency), + dataLatency(p.data_latency), + forwardLatency(p.tag_latency), + fillLatency(p.data_latency), + responseLatency(p.response_latency), + sequentialAccess(p.sequential_access), + numTarget(p.tgts_per_mshr), forwardSnoops(true), - clusivity(p->clusivity), - isReadOnly(p->is_read_only), + clusivity(p.clusivity), + isReadOnly(p.is_read_only), blocked(0), order(0), noTargetMSHR(nullptr), - missCount(p->max_miss_count), - addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()), - system(p->system), + missCount(p.max_miss_count), + addrRanges(p.addr_ranges.begin(), p.addr_ranges.end()), + system(p.system), stats(*this) { // the MSHR queue has no reserve entries as we check the MSHR @@ -2500,7 +2500,7 @@ WriteAllocator::updateMode(Addr write_addr, unsigned write_size, } WriteAllocator* -WriteAllocatorParams::create() +WriteAllocatorParams::create() const { - return new WriteAllocator(this); + return new WriteAllocator(*this); } diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index 998648492..99b03abf5 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -1074,7 +1074,7 @@ class BaseCache : public ClockedObject void regProbePoints() override; public: - BaseCache(const BaseCacheParams *p, unsigned blk_size); + BaseCache(const BaseCacheParams &p, unsigned blk_size); ~BaseCache(); void init() override; @@ -1301,11 +1301,11 @@ class BaseCache : public ClockedObject */ class WriteAllocator : public SimObject { public: - WriteAllocator(const WriteAllocatorParams *p) : + WriteAllocator(const WriteAllocatorParams &p) : SimObject(p), - coalesceLimit(p->coalesce_limit * p->block_size), - noAllocateLimit(p->no_allocate_limit * p->block_size), - delayThreshold(p->delay_threshold) + coalesceLimit(p.coalesce_limit * p.block_size), + noAllocateLimit(p.no_allocate_limit * p.block_size), + delayThreshold(p.delay_threshold) { reset(); } diff --git a/src/mem/cache/cache.cc b/src/mem/cache/cache.cc index b9cf8308d..04156c8f8 100644 --- a/src/mem/cache/cache.cc +++ b/src/mem/cache/cache.cc @@ -63,8 +63,8 @@ #include "mem/request.hh" #include "params/Cache.hh" -Cache::Cache(const CacheParams *p) - : BaseCache(p, p->system->cacheLineSize()), +Cache::Cache(const CacheParams &p) + : BaseCache(p, p.system->cacheLineSize()), doFastWrites(true) { } @@ -1431,10 +1431,10 @@ Cache::sendMSHRQueuePacket(MSHR* mshr) } Cache* -CacheParams::create() +CacheParams::create() const { assert(tags); assert(replacement_policy); - return new Cache(this); + return new Cache(*this); } diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh index 9fa25ee70..d370d8bda 100644 --- a/src/mem/cache/cache.hh +++ b/src/mem/cache/cache.hh @@ -155,7 +155,7 @@ class Cache : public BaseCache public: /** Instantiates a basic cache object. */ - Cache(const CacheParams *p); + Cache(const CacheParams &p); /** * Take an MSHR, turn it into a suitable downstream packet, and diff --git a/src/mem/cache/compressors/base.cc b/src/mem/cache/compressors/base.cc index 1408d2dda..3e392ae0b 100644 --- a/src/mem/cache/compressors/base.cc +++ b/src/mem/cache/compressors/base.cc @@ -75,9 +75,9 @@ Base::CompressionData::getSize() const return std::ceil(_size/8); } -Base::Base(const Params *p) - : SimObject(p), blkSize(p->block_size), chunkSizeBits(p->chunk_size_bits), - sizeThreshold((blkSize * p->size_threshold_percentage) / 100), +Base::Base(const Params &p) + : SimObject(p), blkSize(p.block_size), chunkSizeBits(p.chunk_size_bits), + sizeThreshold((blkSize * p.size_threshold_percentage) / 100), stats(*this) { fatal_if(64 % chunkSizeBits, diff --git a/src/mem/cache/compressors/base.hh b/src/mem/cache/compressors/base.hh index 2725f7189..77dcc9248 100644 --- a/src/mem/cache/compressors/base.hh +++ b/src/mem/cache/compressors/base.hh @@ -166,7 +166,7 @@ class Base : public SimObject public: typedef BaseCacheCompressorParams Params; - Base(const Params *p); + Base(const Params &p); virtual ~Base() = default; /** diff --git a/src/mem/cache/compressors/base_delta.cc b/src/mem/cache/compressors/base_delta.cc index 2d0aafe68..6901255b0 100644 --- a/src/mem/cache/compressors/base_delta.cc +++ b/src/mem/cache/compressors/base_delta.cc @@ -41,32 +41,32 @@ namespace Compressor { -Base64Delta8::Base64Delta8(const Params *p) +Base64Delta8::Base64Delta8(const Params &p) : BaseDelta(p) { } -Base64Delta16::Base64Delta16(const Params *p) +Base64Delta16::Base64Delta16(const Params &p) : BaseDelta(p) { } -Base64Delta32::Base64Delta32(const Params *p) +Base64Delta32::Base64Delta32(const Params &p) : BaseDelta(p) { } -Base32Delta8::Base32Delta8(const Params *p) +Base32Delta8::Base32Delta8(const Params &p) : BaseDelta(p) { } -Base32Delta16::Base32Delta16(const Params *p) +Base32Delta16::Base32Delta16(const Params &p) : BaseDelta(p) { } -Base16Delta8::Base16Delta8(const Params *p) +Base16Delta8::Base16Delta8(const Params &p) : BaseDelta(p) { } @@ -74,37 +74,37 @@ Base16Delta8::Base16Delta8(const Params *p) } // namespace Compressor Compressor::Base64Delta8* -Base64Delta8Params::create() +Base64Delta8Params::create() const { - return new Compressor::Base64Delta8(this); + return new Compressor::Base64Delta8(*this); } Compressor::Base64Delta16* -Base64Delta16Params::create() +Base64Delta16Params::create() const { - return new Compressor::Base64Delta16(this); + return new Compressor::Base64Delta16(*this); } Compressor::Base64Delta32* -Base64Delta32Params::create() +Base64Delta32Params::create() const { - return new Compressor::Base64Delta32(this); + return new Compressor::Base64Delta32(*this); } Compressor::Base32Delta8* -Base32Delta8Params::create() +Base32Delta8Params::create() const { - return new Compressor::Base32Delta8(this); + return new Compressor::Base32Delta8(*this); } Compressor::Base32Delta16* -Base32Delta16Params::create() +Base32Delta16Params::create() const { - return new Compressor::Base32Delta16(this); + return new Compressor::Base32Delta16(*this); } Compressor::Base16Delta8* -Base16Delta8Params::create() +Base16Delta8Params::create() const { - return new Compressor::Base16Delta8(this); + return new Compressor::Base16Delta8(*this); } diff --git a/src/mem/cache/compressors/base_delta.hh b/src/mem/cache/compressors/base_delta.hh index 929b8d1c5..73fa5b663 100644 --- a/src/mem/cache/compressors/base_delta.hh +++ b/src/mem/cache/compressors/base_delta.hh @@ -121,7 +121,7 @@ class BaseDelta : public DictionaryCompressor public: typedef BaseDictionaryCompressorParams Params; - BaseDelta(const Params *p); + BaseDelta(const Params &p); ~BaseDelta() = default; }; @@ -159,7 +159,7 @@ class Base64Delta8 : public BaseDelta { public: typedef Base64Delta8Params Params; - Base64Delta8(const Params *p); + Base64Delta8(const Params &p); ~Base64Delta8() = default; }; @@ -167,7 +167,7 @@ class Base64Delta16 : public BaseDelta { public: typedef Base64Delta16Params Params; - Base64Delta16(const Params *p); + Base64Delta16(const Params &p); ~Base64Delta16() = default; }; @@ -175,7 +175,7 @@ class Base64Delta32 : public BaseDelta { public: typedef Base64Delta32Params Params; - Base64Delta32(const Params *p); + Base64Delta32(const Params &p); ~Base64Delta32() = default; }; @@ -183,7 +183,7 @@ class Base32Delta8 : public BaseDelta { public: typedef Base32Delta8Params Params; - Base32Delta8(const Params *p); + Base32Delta8(const Params &p); ~Base32Delta8() = default; }; @@ -191,7 +191,7 @@ class Base32Delta16 : public BaseDelta { public: typedef Base32Delta16Params Params; - Base32Delta16(const Params *p); + Base32Delta16(const Params &p); ~Base32Delta16() = default; }; @@ -199,7 +199,7 @@ class Base16Delta8 : public BaseDelta { public: typedef Base16Delta8Params Params; - Base16Delta8(const Params *p); + Base16Delta8(const Params &p); ~Base16Delta8() = default; }; diff --git a/src/mem/cache/compressors/base_delta_impl.hh b/src/mem/cache/compressors/base_delta_impl.hh index 46d62db4a..9686cb75b 100644 --- a/src/mem/cache/compressors/base_delta_impl.hh +++ b/src/mem/cache/compressors/base_delta_impl.hh @@ -40,7 +40,7 @@ namespace Compressor { template -BaseDelta::BaseDelta(const Params *p) +BaseDelta::BaseDelta(const Params &p) : DictionaryCompressor(p) { } diff --git a/src/mem/cache/compressors/base_dictionary_compressor.cc b/src/mem/cache/compressors/base_dictionary_compressor.cc index ebbfc1c6f..16a7d402b 100644 --- a/src/mem/cache/compressors/base_dictionary_compressor.cc +++ b/src/mem/cache/compressors/base_dictionary_compressor.cc @@ -36,8 +36,8 @@ namespace Compressor { -BaseDictionaryCompressor::BaseDictionaryCompressor(const Params *p) - : Base(p), dictionarySize(p->dictionary_size), +BaseDictionaryCompressor::BaseDictionaryCompressor(const Params &p) + : Base(p), dictionarySize(p.dictionary_size), numEntries(0), dictionaryStats(stats, *this) { } diff --git a/src/mem/cache/compressors/cpack.cc b/src/mem/cache/compressors/cpack.cc index 4ba8c8467..fe8af164f 100644 --- a/src/mem/cache/compressors/cpack.cc +++ b/src/mem/cache/compressors/cpack.cc @@ -37,7 +37,7 @@ namespace Compressor { -CPack::CPack(const Params *p) +CPack::CPack(const Params &p) : DictionaryCompressor(p) { } @@ -70,7 +70,7 @@ CPack::compress(const std::vector& chunks, } // namespace Compressor Compressor::CPack* -CPackParams::create() +CPackParams::create() const { - return new Compressor::CPack(this); + return new Compressor::CPack(*this); } diff --git a/src/mem/cache/compressors/cpack.hh b/src/mem/cache/compressors/cpack.hh index a6d3e211c..694ba816f 100644 --- a/src/mem/cache/compressors/cpack.hh +++ b/src/mem/cache/compressors/cpack.hh @@ -109,7 +109,7 @@ class CPack : public DictionaryCompressor /** * Default constructor. */ - CPack(const Params *p); + CPack(const Params &p); /** * Default destructor. diff --git a/src/mem/cache/compressors/dictionary_compressor.hh b/src/mem/cache/compressors/dictionary_compressor.hh index 873843c31..bc9f49a1b 100644 --- a/src/mem/cache/compressors/dictionary_compressor.hh +++ b/src/mem/cache/compressors/dictionary_compressor.hh @@ -98,7 +98,7 @@ class BaseDictionaryCompressor : public Base public: typedef BaseDictionaryCompressorParams Params; - BaseDictionaryCompressor(const Params *p); + BaseDictionaryCompressor(const Params &p); ~BaseDictionaryCompressor() = default; }; @@ -266,7 +266,7 @@ class DictionaryCompressor : public BaseDictionaryCompressor public: typedef BaseDictionaryCompressorParams Params; - DictionaryCompressor(const Params *p); + DictionaryCompressor(const Params &p); ~DictionaryCompressor() = default; }; diff --git a/src/mem/cache/compressors/dictionary_compressor_impl.hh b/src/mem/cache/compressors/dictionary_compressor_impl.hh index 11495a3f5..36a58d085 100644 --- a/src/mem/cache/compressors/dictionary_compressor_impl.hh +++ b/src/mem/cache/compressors/dictionary_compressor_impl.hh @@ -60,7 +60,7 @@ DictionaryCompressor::CompData::addEntry(std::unique_ptr pattern) } template -DictionaryCompressor::DictionaryCompressor(const Params *p) +DictionaryCompressor::DictionaryCompressor(const Params &p) : BaseDictionaryCompressor(p) { dictionary.resize(dictionarySize); diff --git a/src/mem/cache/compressors/fpcd.cc b/src/mem/cache/compressors/fpcd.cc index fb22e7bba..29ee1d3bd 100644 --- a/src/mem/cache/compressors/fpcd.cc +++ b/src/mem/cache/compressors/fpcd.cc @@ -37,7 +37,7 @@ namespace Compressor { -FPCD::FPCD(const Params *p) +FPCD::FPCD(const Params &p) : DictionaryCompressor(p) { } @@ -77,7 +77,7 @@ FPCD::compress(const std::vector& chunks, } // namespace Compressor Compressor::FPCD* -FPCDParams::create() +FPCDParams::create() const { - return new Compressor::FPCD(this); + return new Compressor::FPCD(*this); } diff --git a/src/mem/cache/compressors/fpcd.hh b/src/mem/cache/compressors/fpcd.hh index 6d8f459dd..6c4eac1b1 100644 --- a/src/mem/cache/compressors/fpcd.hh +++ b/src/mem/cache/compressors/fpcd.hh @@ -145,7 +145,7 @@ class FPCD : public DictionaryCompressor public: typedef FPCDParams Params; - FPCD(const Params *p); + FPCD(const Params &p); ~FPCD() = default; }; diff --git a/src/mem/cache/compressors/multi.cc b/src/mem/cache/compressors/multi.cc index 76ec1dbde..241f5decc 100644 --- a/src/mem/cache/compressors/multi.cc +++ b/src/mem/cache/compressors/multi.cc @@ -57,11 +57,11 @@ Multi::MultiCompData::getIndex() const return index; } -Multi::Multi(const Params *p) - : Base(p), compressors(p->compressors), - numEncodingBits(p->encoding_in_tags ? 0 : +Multi::Multi(const Params &p) + : Base(p), compressors(p.compressors), + numEncodingBits(p.encoding_in_tags ? 0 : std::log2(alignToPowerOfTwo(compressors.size()))), - extraDecompressionLatency(p->extra_decomp_lat), + extraDecompressionLatency(p.extra_decomp_lat), multiStats(stats, *this) { fatal_if(compressors.size() == 0, "There must be at least one compressor"); @@ -205,7 +205,7 @@ Multi::MultiStats::regStats() } // namespace Compressor Compressor::Multi* -MultiCompressorParams::create() +MultiCompressorParams::create() const { - return new Compressor::Multi(this); + return new Compressor::Multi(*this); } diff --git a/src/mem/cache/compressors/multi.hh b/src/mem/cache/compressors/multi.hh index fe952d522..559501a65 100644 --- a/src/mem/cache/compressors/multi.hh +++ b/src/mem/cache/compressors/multi.hh @@ -98,7 +98,7 @@ class Multi : public Base public: typedef MultiCompressorParams Params; - Multi(const Params *p); + Multi(const Params &p); ~Multi(); std::unique_ptr compress( diff --git a/src/mem/cache/compressors/perfect.cc b/src/mem/cache/compressors/perfect.cc index 58c4b0e2a..064ea33ae 100644 --- a/src/mem/cache/compressors/perfect.cc +++ b/src/mem/cache/compressors/perfect.cc @@ -40,10 +40,10 @@ namespace Compressor { -Perfect::Perfect(const Params *p) - : Base(p), compressedSize(8 * blkSize / p->max_compression_ratio), - compressionLatency(p->compression_latency), - decompressionLatency(p->decompression_latency) +Perfect::Perfect(const Params &p) + : Base(p), compressedSize(8 * blkSize / p.max_compression_ratio), + compressionLatency(p.compression_latency), + decompressionLatency(p.decompression_latency) { } @@ -73,7 +73,7 @@ Perfect::decompress(const CompressionData* comp_data, } // namespace Compressor Compressor::Perfect* -PerfectCompressorParams::create() +PerfectCompressorParams::create() const { - return new Compressor::Perfect(this); + return new Compressor::Perfect(*this); } diff --git a/src/mem/cache/compressors/perfect.hh b/src/mem/cache/compressors/perfect.hh index eccba6a47..7b89ca585 100644 --- a/src/mem/cache/compressors/perfect.hh +++ b/src/mem/cache/compressors/perfect.hh @@ -67,7 +67,7 @@ class Perfect : public Base public: typedef PerfectCompressorParams Params; - Perfect(const Params *p); + Perfect(const Params &p); ~Perfect() = default; }; diff --git a/src/mem/cache/compressors/repeated_qwords.cc b/src/mem/cache/compressors/repeated_qwords.cc index 1840a64ca..08020aae8 100644 --- a/src/mem/cache/compressors/repeated_qwords.cc +++ b/src/mem/cache/compressors/repeated_qwords.cc @@ -40,7 +40,7 @@ namespace Compressor { -RepeatedQwords::RepeatedQwords(const Params *p) +RepeatedQwords::RepeatedQwords(const Params &p) : DictionaryCompressor(p) { } @@ -80,7 +80,7 @@ RepeatedQwords::compress(const std::vector& chunks, } // namespace Compressor Compressor::RepeatedQwords* -RepeatedQwordsCompressorParams::create() +RepeatedQwordsCompressorParams::create() const { - return new Compressor::RepeatedQwords(this); + return new Compressor::RepeatedQwords(*this); } diff --git a/src/mem/cache/compressors/repeated_qwords.hh b/src/mem/cache/compressors/repeated_qwords.hh index 31edd6eea..583f70206 100644 --- a/src/mem/cache/compressors/repeated_qwords.hh +++ b/src/mem/cache/compressors/repeated_qwords.hh @@ -97,7 +97,7 @@ class RepeatedQwords : public DictionaryCompressor public: typedef RepeatedQwordsCompressorParams Params; - RepeatedQwords(const Params *p); + RepeatedQwords(const Params &p); ~RepeatedQwords() = default; }; diff --git a/src/mem/cache/compressors/zero.cc b/src/mem/cache/compressors/zero.cc index d5e019935..ad36b6f19 100644 --- a/src/mem/cache/compressors/zero.cc +++ b/src/mem/cache/compressors/zero.cc @@ -40,7 +40,7 @@ namespace Compressor { -Zero::Zero(const Params *p) +Zero::Zero(const Params &p) : DictionaryCompressor(p) { } @@ -78,7 +78,7 @@ Zero::compress(const std::vector& chunks, Cycles& comp_lat, } // namespace Compressor Compressor::Zero* -ZeroCompressorParams::create() +ZeroCompressorParams::create() const { - return new Compressor::Zero(this); + return new Compressor::Zero(*this); } diff --git a/src/mem/cache/compressors/zero.hh b/src/mem/cache/compressors/zero.hh index c83991066..a213a3f86 100644 --- a/src/mem/cache/compressors/zero.hh +++ b/src/mem/cache/compressors/zero.hh @@ -97,7 +97,7 @@ class Zero : public DictionaryCompressor public: typedef ZeroCompressorParams Params; - Zero(const Params *p); + Zero(const Params &p); ~Zero() = default; }; diff --git a/src/mem/cache/noncoherent_cache.cc b/src/mem/cache/noncoherent_cache.cc index c09e9e107..18a885a58 100644 --- a/src/mem/cache/noncoherent_cache.cc +++ b/src/mem/cache/noncoherent_cache.cc @@ -56,8 +56,8 @@ #include "mem/cache/mshr.hh" #include "params/NoncoherentCache.hh" -NoncoherentCache::NoncoherentCache(const NoncoherentCacheParams *p) - : BaseCache(p, p->system->cacheLineSize()) +NoncoherentCache::NoncoherentCache(const NoncoherentCacheParams &p) + : BaseCache(p, p.system->cacheLineSize()) { } @@ -349,10 +349,10 @@ NoncoherentCache::evictBlock(CacheBlk *blk) } NoncoherentCache* -NoncoherentCacheParams::create() +NoncoherentCacheParams::create() const { assert(tags); assert(replacement_policy); - return new NoncoherentCache(this); + return new NoncoherentCache(*this); } diff --git a/src/mem/cache/noncoherent_cache.hh b/src/mem/cache/noncoherent_cache.hh index 25c95cad2..4fade0201 100644 --- a/src/mem/cache/noncoherent_cache.hh +++ b/src/mem/cache/noncoherent_cache.hh @@ -119,7 +119,7 @@ class NoncoherentCache : public BaseCache M5_NODISCARD PacketPtr evictBlock(CacheBlk *blk) override; public: - NoncoherentCache(const NoncoherentCacheParams *p); + NoncoherentCache(const NoncoherentCacheParams &p); }; #endif // __MEM_CACHE_NONCOHERENTCACHE_HH__ diff --git a/src/mem/cache/prefetch/access_map_pattern_matching.cc b/src/mem/cache/prefetch/access_map_pattern_matching.cc index 28371c789..6301c9d1b 100644 --- a/src/mem/cache/prefetch/access_map_pattern_matching.cc +++ b/src/mem/cache/prefetch/access_map_pattern_matching.cc @@ -36,20 +36,20 @@ namespace Prefetcher { AccessMapPatternMatching::AccessMapPatternMatching( - const AccessMapPatternMatchingParams *p) - : ClockedObject(p), blkSize(p->block_size), limitStride(p->limit_stride), - startDegree(p->start_degree), hotZoneSize(p->hot_zone_size), - highCoverageThreshold(p->high_coverage_threshold), - lowCoverageThreshold(p->low_coverage_threshold), - highAccuracyThreshold(p->high_accuracy_threshold), - lowAccuracyThreshold(p->low_accuracy_threshold), - highCacheHitThreshold(p->high_cache_hit_threshold), - lowCacheHitThreshold(p->low_cache_hit_threshold), - epochCycles(p->epoch_cycles), - offChipMemoryLatency(p->offchip_memory_latency), - accessMapTable(p->access_map_table_assoc, p->access_map_table_entries, - p->access_map_table_indexing_policy, - p->access_map_table_replacement_policy, + const AccessMapPatternMatchingParams &p) + : ClockedObject(p), blkSize(p.block_size), limitStride(p.limit_stride), + startDegree(p.start_degree), hotZoneSize(p.hot_zone_size), + highCoverageThreshold(p.high_coverage_threshold), + lowCoverageThreshold(p.low_coverage_threshold), + highAccuracyThreshold(p.high_accuracy_threshold), + lowAccuracyThreshold(p.low_accuracy_threshold), + highCacheHitThreshold(p.high_cache_hit_threshold), + lowCacheHitThreshold(p.low_cache_hit_threshold), + epochCycles(p.epoch_cycles), + offChipMemoryLatency(p.offchip_memory_latency), + accessMapTable(p.access_map_table_assoc, p.access_map_table_entries, + p.access_map_table_indexing_policy, + p.access_map_table_replacement_policy, AccessMapEntry(hotZoneSize / blkSize)), numGoodPrefetches(0), numTotalPrefetches(0), numRawCacheMisses(0), numRawCacheHits(0), degree(startDegree), usefulDegree(startDegree), @@ -251,8 +251,8 @@ AccessMapPatternMatching::calculatePrefetch(const Base::PrefetchInfo &pfi, } } -AMPM::AMPM(const AMPMPrefetcherParams *p) - : Queued(p), ampm(*p->ampm) +AMPM::AMPM(const AMPMPrefetcherParams &p) + : Queued(p), ampm(*p.ampm) { } @@ -266,13 +266,13 @@ AMPM::calculatePrefetch(const PrefetchInfo &pfi, } // namespace Prefetcher Prefetcher::AccessMapPatternMatching* -AccessMapPatternMatchingParams::create() +AccessMapPatternMatchingParams::create() const { - return new Prefetcher::AccessMapPatternMatching(this); + return new Prefetcher::AccessMapPatternMatching(*this); } Prefetcher::AMPM* -AMPMPrefetcherParams::create() +AMPMPrefetcherParams::create() const { - return new Prefetcher::AMPM(this); + return new Prefetcher::AMPM(*this); } diff --git a/src/mem/cache/prefetch/access_map_pattern_matching.hh b/src/mem/cache/prefetch/access_map_pattern_matching.hh index 0064917af..b9a053642 100644 --- a/src/mem/cache/prefetch/access_map_pattern_matching.hh +++ b/src/mem/cache/prefetch/access_map_pattern_matching.hh @@ -181,7 +181,7 @@ class AccessMapPatternMatching : public ClockedObject EventFunctionWrapper epochEvent; public: - AccessMapPatternMatching(const AccessMapPatternMatchingParams* p); + AccessMapPatternMatching(const AccessMapPatternMatchingParams &p); ~AccessMapPatternMatching() = default; void startup() override; @@ -193,7 +193,7 @@ class AMPM : public Queued { AccessMapPatternMatching &m; public: - AMPM(const AMPMPrefetcherParams* p); + AMPM(const AMPMPrefetcherParams &p); ~AMPM() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/base.cc b/src/mem/cache/prefetch/base.cc index 2ff466b6a..28aaa627d 100644 --- a/src/mem/cache/prefetch/base.cc +++ b/src/mem/cache/prefetch/base.cc @@ -88,14 +88,14 @@ Base::PrefetchListener::notify(const PacketPtr &pkt) } } -Base::Base(const BasePrefetcherParams *p) - : ClockedObject(p), listeners(), cache(nullptr), blkSize(p->block_size), - lBlkSize(floorLog2(blkSize)), onMiss(p->on_miss), onRead(p->on_read), - onWrite(p->on_write), onData(p->on_data), onInst(p->on_inst), - requestorId(p->sys->getRequestorId(this)), - pageBytes(p->sys->getPageBytes()), - prefetchOnAccess(p->prefetch_on_access), - useVirtualAddresses(p->use_virtual_addresses), +Base::Base(const BasePrefetcherParams &p) + : ClockedObject(p), listeners(), cache(nullptr), blkSize(p.block_size), + lBlkSize(floorLog2(blkSize)), onMiss(p.on_miss), onRead(p.on_read), + onWrite(p.on_write), onData(p.on_data), onInst(p.on_inst), + requestorId(p.sys->getRequestorId(this)), + pageBytes(p.sys->getPageBytes()), + prefetchOnAccess(p.prefetch_on_access), + useVirtualAddresses(p.use_virtual_addresses), prefetchStats(this), issuedPrefetches(0), usefulPrefetches(0), tlb(nullptr) { diff --git a/src/mem/cache/prefetch/base.hh b/src/mem/cache/prefetch/base.hh index cb52b5731..2dcc95fdf 100644 --- a/src/mem/cache/prefetch/base.hh +++ b/src/mem/cache/prefetch/base.hh @@ -332,7 +332,7 @@ class Base : public ClockedObject BaseTLB * tlb; public: - Base(const BasePrefetcherParams *p); + Base(const BasePrefetcherParams &p); virtual ~Base() = default; virtual void setCache(BaseCache *_cache); diff --git a/src/mem/cache/prefetch/bop.cc b/src/mem/cache/prefetch/bop.cc index 83eeda1c4..1a5460be9 100644 --- a/src/mem/cache/prefetch/bop.cc +++ b/src/mem/cache/prefetch/bop.cc @@ -33,14 +33,14 @@ namespace Prefetcher { -BOP::BOP(const BOPPrefetcherParams *p) +BOP::BOP(const BOPPrefetcherParams &p) : Queued(p), - scoreMax(p->score_max), roundMax(p->round_max), - badScore(p->bad_score), rrEntries(p->rr_size), - tagMask((1 << p->tag_bits) - 1), - delayQueueEnabled(p->delay_queue_enable), - delayQueueSize(p->delay_queue_size), - delayTicks(cyclesToTicks(p->delay_queue_cycles)), + scoreMax(p.score_max), roundMax(p.round_max), + badScore(p.bad_score), rrEntries(p.rr_size), + tagMask((1 << p.tag_bits) - 1), + delayQueueEnabled(p.delay_queue_enable), + delayQueueSize(p.delay_queue_size), + delayTicks(cyclesToTicks(p.delay_queue_cycles)), delayQueueEvent([this]{ delayQueueEventWrapper(); }, name()), issuePrefetchRequests(false), bestOffset(1), phaseBestOffset(0), bestScore(0), round(0) @@ -51,7 +51,7 @@ BOP::BOP(const BOPPrefetcherParams *p) if (!isPowerOf2(blkSize)) { fatal("%s: cache line size is not power of 2\n", name()); } - if (!(p->negative_offsets_enable && (p->offset_list_size % 2 == 0))) { + if (!(p.negative_offsets_enable && (p.offset_list_size % 2 == 0))) { fatal("%s: negative offsets enabled with odd offset list size\n", name()); } @@ -65,7 +65,7 @@ BOP::BOP(const BOPPrefetcherParams *p) unsigned int i = 0; int64_t offset_i = 1; - while (i < p->offset_list_size) + while (i < p.offset_list_size) { int64_t offset = offset_i; @@ -80,7 +80,7 @@ BOP::BOP(const BOPPrefetcherParams *p) i++; // If we want to use negative offsets, add also the negative value // of the offset just calculated - if (p->negative_offsets_enable) { + if (p.negative_offsets_enable) { offsetsList.push_back(OffsetListEntry(-offset_i, 0)); i++; } @@ -263,7 +263,7 @@ BOP::notifyFill(const PacketPtr& pkt) } // namespace Prefetcher Prefetcher::BOP* -BOPPrefetcherParams::create() +BOPPrefetcherParams::create() const { - return new Prefetcher::BOP(this); + return new Prefetcher::BOP(*this); } diff --git a/src/mem/cache/prefetch/bop.hh b/src/mem/cache/prefetch/bop.hh index d4252af1a..d32101b02 100644 --- a/src/mem/cache/prefetch/bop.hh +++ b/src/mem/cache/prefetch/bop.hh @@ -147,7 +147,7 @@ class BOP : public Queued public: - BOP(const BOPPrefetcherParams *p); + BOP(const BOPPrefetcherParams &p); ~BOP() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/delta_correlating_prediction_tables.cc b/src/mem/cache/prefetch/delta_correlating_prediction_tables.cc index 11ea89d6d..985fa5de1 100644 --- a/src/mem/cache/prefetch/delta_correlating_prediction_tables.cc +++ b/src/mem/cache/prefetch/delta_correlating_prediction_tables.cc @@ -36,10 +36,10 @@ namespace Prefetcher { DeltaCorrelatingPredictionTables::DeltaCorrelatingPredictionTables( - DeltaCorrelatingPredictionTablesParams *p) : SimObject(p), - deltaBits(p->delta_bits), deltaMaskBits(p->delta_mask_bits), - table(p->table_assoc, p->table_entries, p->table_indexing_policy, - p->table_replacement_policy, DCPTEntry(p->deltas_per_entry)) + const DeltaCorrelatingPredictionTablesParams &p) : SimObject(p), + deltaBits(p.delta_bits), deltaMaskBits(p.delta_mask_bits), + table(p.table_assoc, p.table_entries, p.table_indexing_policy, + p.table_replacement_policy, DCPTEntry(p.deltas_per_entry)) { } @@ -145,8 +145,8 @@ DeltaCorrelatingPredictionTables::calculatePrefetch( } } -DCPT::DCPT(const DCPTPrefetcherParams *p) - : Queued(p), dcpt(*p->dcpt) +DCPT::DCPT(const DCPTPrefetcherParams &p) + : Queued(p), dcpt(*p.dcpt) { } @@ -160,13 +160,13 @@ DCPT::calculatePrefetch(const PrefetchInfo &pfi, } // namespace Prefetcher Prefetcher::DeltaCorrelatingPredictionTables* -DeltaCorrelatingPredictionTablesParams::create() +DeltaCorrelatingPredictionTablesParams::create() const { - return new Prefetcher::DeltaCorrelatingPredictionTables(this); + return new Prefetcher::DeltaCorrelatingPredictionTables(*this); } Prefetcher::DCPT* -DCPTPrefetcherParams::create() +DCPTPrefetcherParams::create() const { - return new Prefetcher::DCPT(this); + return new Prefetcher::DCPT(*this); } diff --git a/src/mem/cache/prefetch/delta_correlating_prediction_tables.hh b/src/mem/cache/prefetch/delta_correlating_prediction_tables.hh index 28c99875d..a0e434b9e 100644 --- a/src/mem/cache/prefetch/delta_correlating_prediction_tables.hh +++ b/src/mem/cache/prefetch/delta_correlating_prediction_tables.hh @@ -103,7 +103,7 @@ class DeltaCorrelatingPredictionTables : public SimObject public: DeltaCorrelatingPredictionTables( - DeltaCorrelatingPredictionTablesParams *p); + const DeltaCorrelatingPredictionTablesParams &p); ~DeltaCorrelatingPredictionTables() = default; /** @@ -122,7 +122,7 @@ class DCPT : public Queued /** DCPT object */ DeltaCorrelatingPredictionTables &dcpt; public: - DCPT(const DCPTPrefetcherParams *p); + DCPT(const DCPTPrefetcherParams &p); ~DCPT() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/indirect_memory.cc b/src/mem/cache/prefetch/indirect_memory.cc index f6f035413..1ad0707a8 100644 --- a/src/mem/cache/prefetch/indirect_memory.cc +++ b/src/mem/cache/prefetch/indirect_memory.cc @@ -34,19 +34,19 @@ namespace Prefetcher { -IndirectMemory::IndirectMemory(const IndirectMemoryPrefetcherParams *p) +IndirectMemory::IndirectMemory(const IndirectMemoryPrefetcherParams &p) : Queued(p), - maxPrefetchDistance(p->max_prefetch_distance), - shiftValues(p->shift_values), prefetchThreshold(p->prefetch_threshold), - streamCounterThreshold(p->stream_counter_threshold), - streamingDistance(p->streaming_distance), - prefetchTable(p->pt_table_assoc, p->pt_table_entries, - p->pt_table_indexing_policy, p->pt_table_replacement_policy, - PrefetchTableEntry(p->num_indirect_counter_bits)), - ipd(p->ipd_table_assoc, p->ipd_table_entries, p->ipd_table_indexing_policy, - p->ipd_table_replacement_policy, - IndirectPatternDetectorEntry(p->addr_array_len, shiftValues.size())), - ipdEntryTrackingMisses(nullptr), byteOrder(p->sys->getGuestByteOrder()) + maxPrefetchDistance(p.max_prefetch_distance), + shiftValues(p.shift_values), prefetchThreshold(p.prefetch_threshold), + streamCounterThreshold(p.stream_counter_threshold), + streamingDistance(p.streaming_distance), + prefetchTable(p.pt_table_assoc, p.pt_table_entries, + p.pt_table_indexing_policy, p.pt_table_replacement_policy, + PrefetchTableEntry(p.num_indirect_counter_bits)), + ipd(p.ipd_table_assoc, p.ipd_table_entries, p.ipd_table_indexing_policy, + p.ipd_table_replacement_policy, + IndirectPatternDetectorEntry(p.addr_array_len, shiftValues.size())), + ipdEntryTrackingMisses(nullptr), byteOrder(p.sys->getGuestByteOrder()) { } @@ -257,7 +257,7 @@ IndirectMemory::checkAccessMatchOnActiveEntries(Addr addr) } // namespace Prefetcher Prefetcher::IndirectMemory* -IndirectMemoryPrefetcherParams::create() +IndirectMemoryPrefetcherParams::create() const { - return new Prefetcher::IndirectMemory(this); + return new Prefetcher::IndirectMemory(*this); } diff --git a/src/mem/cache/prefetch/indirect_memory.hh b/src/mem/cache/prefetch/indirect_memory.hh index e5bc1e778..a41f56acb 100644 --- a/src/mem/cache/prefetch/indirect_memory.hh +++ b/src/mem/cache/prefetch/indirect_memory.hh @@ -193,7 +193,7 @@ class IndirectMemory : public Queued void checkAccessMatchOnActiveEntries(Addr addr); public: - IndirectMemory(const IndirectMemoryPrefetcherParams *p); + IndirectMemory(const IndirectMemoryPrefetcherParams &p); ~IndirectMemory() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/irregular_stream_buffer.cc b/src/mem/cache/prefetch/irregular_stream_buffer.cc index 9c83ec8dd..2e7c0b336 100644 --- a/src/mem/cache/prefetch/irregular_stream_buffer.cc +++ b/src/mem/cache/prefetch/irregular_stream_buffer.cc @@ -35,26 +35,26 @@ namespace Prefetcher { IrregularStreamBuffer::IrregularStreamBuffer( - const IrregularStreamBufferPrefetcherParams *p) + const IrregularStreamBufferPrefetcherParams &p) : Queued(p), - chunkSize(p->chunk_size), - prefetchCandidatesPerEntry(p->prefetch_candidates_per_entry), - degree(p->degree), - trainingUnit(p->training_unit_assoc, p->training_unit_entries, - p->training_unit_indexing_policy, - p->training_unit_replacement_policy), - psAddressMappingCache(p->address_map_cache_assoc, - p->address_map_cache_entries, - p->ps_address_map_cache_indexing_policy, - p->ps_address_map_cache_replacement_policy, + chunkSize(p.chunk_size), + prefetchCandidatesPerEntry(p.prefetch_candidates_per_entry), + degree(p.degree), + trainingUnit(p.training_unit_assoc, p.training_unit_entries, + p.training_unit_indexing_policy, + p.training_unit_replacement_policy), + psAddressMappingCache(p.address_map_cache_assoc, + p.address_map_cache_entries, + p.ps_address_map_cache_indexing_policy, + p.ps_address_map_cache_replacement_policy, AddressMappingEntry(prefetchCandidatesPerEntry, - p->num_counter_bits)), - spAddressMappingCache(p->address_map_cache_assoc, - p->address_map_cache_entries, - p->sp_address_map_cache_indexing_policy, - p->sp_address_map_cache_replacement_policy, + p.num_counter_bits)), + spAddressMappingCache(p.address_map_cache_assoc, + p.address_map_cache_entries, + p.sp_address_map_cache_indexing_policy, + p.sp_address_map_cache_replacement_policy, AddressMappingEntry(prefetchCandidatesPerEntry, - p->num_counter_bits)), + p.num_counter_bits)), structuralAddressCounter(0) { assert(isPowerOf2(prefetchCandidatesPerEntry)); @@ -211,7 +211,7 @@ IrregularStreamBuffer::addStructuralToPhysicalEntry( } // namespace Prefetcher Prefetcher::IrregularStreamBuffer* -IrregularStreamBufferPrefetcherParams::create() +IrregularStreamBufferPrefetcherParams::create() const { - return new Prefetcher::IrregularStreamBuffer(this); + return new Prefetcher::IrregularStreamBuffer(*this); } diff --git a/src/mem/cache/prefetch/irregular_stream_buffer.hh b/src/mem/cache/prefetch/irregular_stream_buffer.hh index 47969027f..ce040d1e5 100644 --- a/src/mem/cache/prefetch/irregular_stream_buffer.hh +++ b/src/mem/cache/prefetch/irregular_stream_buffer.hh @@ -127,7 +127,7 @@ class IrregularStreamBuffer : public Queued */ AddressMapping& getPSMapping(Addr paddr, bool is_secure); public: - IrregularStreamBuffer(const IrregularStreamBufferPrefetcherParams *p); + IrregularStreamBuffer(const IrregularStreamBufferPrefetcherParams &p); ~IrregularStreamBuffer() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/multi.cc b/src/mem/cache/prefetch/multi.cc index fd2263652..9bddd4d04 100644 --- a/src/mem/cache/prefetch/multi.cc +++ b/src/mem/cache/prefetch/multi.cc @@ -41,9 +41,9 @@ namespace Prefetcher { -Multi::Multi(const MultiPrefetcherParams *p) +Multi::Multi(const MultiPrefetcherParams &p) : Base(p), - prefetchers(p->prefetchers.begin(), p->prefetchers.end()) + prefetchers(p.prefetchers.begin(), p.prefetchers.end()) { } @@ -82,7 +82,7 @@ Multi::getPacket() } // namespace Prefetcher Prefetcher::Multi* -MultiPrefetcherParams::create() +MultiPrefetcherParams::create() const { - return new Prefetcher::Multi(this); + return new Prefetcher::Multi(*this); } diff --git a/src/mem/cache/prefetch/multi.hh b/src/mem/cache/prefetch/multi.hh index c01d0c2ef..58e57943a 100644 --- a/src/mem/cache/prefetch/multi.hh +++ b/src/mem/cache/prefetch/multi.hh @@ -47,7 +47,7 @@ namespace Prefetcher { class Multi : public Base { public: // SimObject - Multi(const MultiPrefetcherParams *p); + Multi(const MultiPrefetcherParams &p); public: void setCache(BaseCache *_cache) override; diff --git a/src/mem/cache/prefetch/pif.cc b/src/mem/cache/prefetch/pif.cc index c557bd29f..a73ba65d4 100644 --- a/src/mem/cache/prefetch/pif.cc +++ b/src/mem/cache/prefetch/pif.cc @@ -36,15 +36,15 @@ namespace Prefetcher { -PIF::PIF(const PIFPrefetcherParams *p) +PIF::PIF(const PIFPrefetcherParams &p) : Queued(p), - precSize(p->prec_spatial_region_bits), - succSize(p->succ_spatial_region_bits), - maxCompactorEntries(p->compactor_entries), - historyBuffer(p->history_buffer_size), - index(p->index_assoc, p->index_entries, p->index_indexing_policy, - p->index_replacement_policy), - streamAddressBuffer(p->stream_address_buffer_entries), + precSize(p.prec_spatial_region_bits), + succSize(p.succ_spatial_region_bits), + maxCompactorEntries(p.compactor_entries), + historyBuffer(p.history_buffer_size), + index(p.index_assoc, p.index_entries, p.index_indexing_policy, + p.index_replacement_policy), + streamAddressBuffer(p.stream_address_buffer_entries), listenersPC() { } @@ -246,7 +246,7 @@ PIF::addEventProbeRetiredInsts(SimObject *obj, const char *name) } // namespace Prefetcher Prefetcher::PIF* -PIFPrefetcherParams::create() +PIFPrefetcherParams::create() const { - return new Prefetcher::PIF(this); + return new Prefetcher::PIF(*this); } diff --git a/src/mem/cache/prefetch/pif.hh b/src/mem/cache/prefetch/pif.hh index e3d34fbeb..fffa39b50 100644 --- a/src/mem/cache/prefetch/pif.hh +++ b/src/mem/cache/prefetch/pif.hh @@ -173,7 +173,7 @@ class PIF : public Queued public: - PIF(const PIFPrefetcherParams *p); + PIF(const PIFPrefetcherParams &p); ~PIF() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/queued.cc b/src/mem/cache/prefetch/queued.cc index 90491a7e7..6ab56ea99 100644 --- a/src/mem/cache/prefetch/queued.cc +++ b/src/mem/cache/prefetch/queued.cc @@ -92,14 +92,14 @@ Queued::DeferredPacket::finish(const Fault &fault, owner->translationComplete(this, failed); } -Queued::Queued(const QueuedPrefetcherParams *p) - : Base(p), queueSize(p->queue_size), +Queued::Queued(const QueuedPrefetcherParams &p) + : Base(p), queueSize(p.queue_size), missingTranslationQueueSize( - p->max_prefetch_requests_with_pending_translation), - latency(p->latency), queueSquash(p->queue_squash), - queueFilter(p->queue_filter), cacheSnoop(p->cache_snoop), - tagPrefetch(p->tag_prefetch), - throttleControlPct(p->throttle_control_percentage), statsQueued(this) + p.max_prefetch_requests_with_pending_translation), + latency(p.latency), queueSquash(p.queue_squash), + queueFilter(p.queue_filter), cacheSnoop(p.cache_snoop), + tagPrefetch(p.tag_prefetch), + throttleControlPct(p.throttle_control_percentage), statsQueued(this) { } diff --git a/src/mem/cache/prefetch/queued.hh b/src/mem/cache/prefetch/queued.hh index 0627c5c04..7bf491d57 100644 --- a/src/mem/cache/prefetch/queued.hh +++ b/src/mem/cache/prefetch/queued.hh @@ -181,7 +181,7 @@ class Queued : public Base public: using AddrPriority = std::pair; - Queued(const QueuedPrefetcherParams *p); + Queued(const QueuedPrefetcherParams &p); virtual ~Queued(); void notify(const PacketPtr &pkt, const PrefetchInfo &pfi) override; diff --git a/src/mem/cache/prefetch/sbooe.cc b/src/mem/cache/prefetch/sbooe.cc index 2faa1378a..5ab68c74b 100644 --- a/src/mem/cache/prefetch/sbooe.cc +++ b/src/mem/cache/prefetch/sbooe.cc @@ -33,11 +33,11 @@ namespace Prefetcher { -SBOOE::SBOOE(const SBOOEPrefetcherParams *p) +SBOOE::SBOOE(const SBOOEPrefetcherParams &p) : Queued(p), - sequentialPrefetchers(p->sequential_prefetchers), - scoreThreshold((p->sandbox_entries*p->score_threshold_pct)/100), - latencyBuffer(p->latency_buffer_size), + sequentialPrefetchers(p.sequential_prefetchers), + scoreThreshold((p.sandbox_entries*p.score_threshold_pct)/100), + latencyBuffer(p.latency_buffer_size), averageAccessLatency(0), latencyBufferSum(0), bestSandbox(NULL), accesses(0) @@ -45,7 +45,7 @@ SBOOE::SBOOE(const SBOOEPrefetcherParams *p) // Initialize a sandbox for every sequential prefetcher between // -1 and the number of sequential prefetchers defined for (int i = 0; i < sequentialPrefetchers; i++) { - sandboxes.push_back(Sandbox(p->sandbox_entries, i-1)); + sandboxes.push_back(Sandbox(p.sandbox_entries, i-1)); } } @@ -135,7 +135,7 @@ SBOOE::calculatePrefetch(const PrefetchInfo &pfi, } // namespace Prefetcher Prefetcher::SBOOE* -SBOOEPrefetcherParams::create() +SBOOEPrefetcherParams::create() const { - return new Prefetcher::SBOOE(this); + return new Prefetcher::SBOOE(*this); } diff --git a/src/mem/cache/prefetch/sbooe.hh b/src/mem/cache/prefetch/sbooe.hh index 42deaf387..1230d527d 100644 --- a/src/mem/cache/prefetch/sbooe.hh +++ b/src/mem/cache/prefetch/sbooe.hh @@ -151,7 +151,7 @@ class SBOOE : public Queued void notifyFill(const PacketPtr& pkt) override; public: - SBOOE(const SBOOEPrefetcherParams *p); + SBOOE(const SBOOEPrefetcherParams &p); void calculatePrefetch(const PrefetchInfo &pfi, std::vector &addresses) override; diff --git a/src/mem/cache/prefetch/signature_path.cc b/src/mem/cache/prefetch/signature_path.cc index 556a003a5..207557fb7 100644 --- a/src/mem/cache/prefetch/signature_path.cc +++ b/src/mem/cache/prefetch/signature_path.cc @@ -37,20 +37,20 @@ namespace Prefetcher { -SignaturePath::SignaturePath(const SignaturePathPrefetcherParams *p) +SignaturePath::SignaturePath(const SignaturePathPrefetcherParams &p) : Queued(p), - stridesPerPatternEntry(p->strides_per_pattern_entry), - signatureShift(p->signature_shift), - signatureBits(p->signature_bits), - prefetchConfidenceThreshold(p->prefetch_confidence_threshold), - lookaheadConfidenceThreshold(p->lookahead_confidence_threshold), - signatureTable(p->signature_table_assoc, p->signature_table_entries, - p->signature_table_indexing_policy, - p->signature_table_replacement_policy), - patternTable(p->pattern_table_assoc, p->pattern_table_entries, - p->pattern_table_indexing_policy, - p->pattern_table_replacement_policy, - PatternEntry(stridesPerPatternEntry, p->num_counter_bits)) + stridesPerPatternEntry(p.strides_per_pattern_entry), + signatureShift(p.signature_shift), + signatureBits(p.signature_bits), + prefetchConfidenceThreshold(p.prefetch_confidence_threshold), + lookaheadConfidenceThreshold(p.lookahead_confidence_threshold), + signatureTable(p.signature_table_assoc, p.signature_table_entries, + p.signature_table_indexing_policy, + p.signature_table_replacement_policy), + patternTable(p.pattern_table_assoc, p.pattern_table_entries, + p.pattern_table_indexing_policy, + p.pattern_table_replacement_policy, + PatternEntry(stridesPerPatternEntry, p.num_counter_bits)) { fatal_if(prefetchConfidenceThreshold < 0, "The prefetch confidence threshold must be greater than 0\n"); @@ -319,7 +319,7 @@ SignaturePath::auxiliaryPrefetcher(Addr ppn, stride_t current_block, } // namespace Prefetcher Prefetcher::SignaturePath* -SignaturePathPrefetcherParams::create() +SignaturePathPrefetcherParams::create() const { - return new Prefetcher::SignaturePath(this); + return new Prefetcher::SignaturePath(*this); } diff --git a/src/mem/cache/prefetch/signature_path.hh b/src/mem/cache/prefetch/signature_path.hh index 1456d8e42..8d61a5c49 100644 --- a/src/mem/cache/prefetch/signature_path.hh +++ b/src/mem/cache/prefetch/signature_path.hh @@ -279,7 +279,7 @@ class SignaturePath : public Queued } public: - SignaturePath(const SignaturePathPrefetcherParams* p); + SignaturePath(const SignaturePathPrefetcherParams &p); ~SignaturePath() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/signature_path_v2.cc b/src/mem/cache/prefetch/signature_path_v2.cc index 588536c3c..a4c9e03f6 100644 --- a/src/mem/cache/prefetch/signature_path_v2.cc +++ b/src/mem/cache/prefetch/signature_path_v2.cc @@ -36,12 +36,12 @@ namespace Prefetcher { -SignaturePathV2::SignaturePathV2(const SignaturePathPrefetcherV2Params *p) +SignaturePathV2::SignaturePathV2(const SignaturePathPrefetcherV2Params &p) : SignaturePath(p), - globalHistoryRegister(p->global_history_register_entries, - p->global_history_register_entries, - p->global_history_register_indexing_policy, - p->global_history_register_replacement_policy, + globalHistoryRegister(p.global_history_register_entries, + p.global_history_register_entries, + p.global_history_register_indexing_policy, + p.global_history_register_replacement_policy, GlobalHistoryEntry()) { } @@ -131,7 +131,7 @@ SignaturePathV2::handlePageCrossingLookahead(signature_t signature, } // namespace Prefetcher Prefetcher::SignaturePathV2* -SignaturePathPrefetcherV2Params::create() +SignaturePathPrefetcherV2Params::create() const { - return new Prefetcher::SignaturePathV2(this); + return new Prefetcher::SignaturePathV2(*this); } diff --git a/src/mem/cache/prefetch/signature_path_v2.hh b/src/mem/cache/prefetch/signature_path_v2.hh index 583c57a45..efa597c9d 100644 --- a/src/mem/cache/prefetch/signature_path_v2.hh +++ b/src/mem/cache/prefetch/signature_path_v2.hh @@ -90,7 +90,7 @@ class SignaturePathV2 : public SignaturePath override; public: - SignaturePathV2(const SignaturePathPrefetcherV2Params* p); + SignaturePathV2(const SignaturePathPrefetcherV2Params &p); ~SignaturePathV2() = default; }; diff --git a/src/mem/cache/prefetch/slim_ampm.cc b/src/mem/cache/prefetch/slim_ampm.cc index 0da18505a..2119b6a2a 100644 --- a/src/mem/cache/prefetch/slim_ampm.cc +++ b/src/mem/cache/prefetch/slim_ampm.cc @@ -32,8 +32,8 @@ namespace Prefetcher { -SlimAMPM::SlimAMPM(const SlimAMPMPrefetcherParams* p) - : Queued(p), ampm(*p->ampm), dcpt(*p->dcpt) +SlimAMPM::SlimAMPM(const SlimAMPMPrefetcherParams &p) + : Queued(p), ampm(*p.ampm), dcpt(*p.dcpt) { } @@ -50,7 +50,7 @@ SlimAMPM::calculatePrefetch(const PrefetchInfo &pfi, } // namespace Prefetcher Prefetcher::SlimAMPM* -SlimAMPMPrefetcherParams::create() +SlimAMPMPrefetcherParams::create() const { - return new Prefetcher::SlimAMPM(this); + return new Prefetcher::SlimAMPM(*this); } diff --git a/src/mem/cache/prefetch/slim_ampm.hh b/src/mem/cache/prefetch/slim_ampm.hh index cbcc7c77f..e067ded7c 100644 --- a/src/mem/cache/prefetch/slim_ampm.hh +++ b/src/mem/cache/prefetch/slim_ampm.hh @@ -54,7 +54,7 @@ class SlimAMPM : public Queued /** DCPT prefetcher object */ DeltaCorrelatingPredictionTables &dcpt; public: - SlimAMPM(const SlimAMPMPrefetcherParams *p); + SlimAMPM(const SlimAMPMPrefetcherParams &p); ~SlimAMPM() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc b/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc index dd15012cc..4c58ab083 100644 --- a/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc +++ b/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc @@ -34,23 +34,23 @@ namespace Prefetcher { -STeMS::STeMS(const STeMSPrefetcherParams *p) - : Queued(p), spatialRegionSize(p->spatial_region_size), - spatialRegionSizeBits(floorLog2(p->spatial_region_size)), - reconstructionEntries(p->reconstruction_entries), - activeGenerationTable(p->active_generation_table_assoc, - p->active_generation_table_entries, - p->active_generation_table_indexing_policy, - p->active_generation_table_replacement_policy, +STeMS::STeMS(const STeMSPrefetcherParams &p) + : Queued(p), spatialRegionSize(p.spatial_region_size), + spatialRegionSizeBits(floorLog2(p.spatial_region_size)), + reconstructionEntries(p.reconstruction_entries), + activeGenerationTable(p.active_generation_table_assoc, + p.active_generation_table_entries, + p.active_generation_table_indexing_policy, + p.active_generation_table_replacement_policy, ActiveGenerationTableEntry( spatialRegionSize / blkSize)), - patternSequenceTable(p->pattern_sequence_table_assoc, - p->pattern_sequence_table_entries, - p->pattern_sequence_table_indexing_policy, - p->pattern_sequence_table_replacement_policy, + patternSequenceTable(p.pattern_sequence_table_assoc, + p.pattern_sequence_table_entries, + p.pattern_sequence_table_indexing_policy, + p.pattern_sequence_table_replacement_policy, ActiveGenerationTableEntry( spatialRegionSize / blkSize)), - rmob(p->region_miss_order_buffer_entries) + rmob(p.region_miss_order_buffer_entries) { fatal_if(!isPowerOf2(spatialRegionSize), "The spatial region size must be a power of 2."); @@ -249,7 +249,7 @@ STeMS::reconstructSequence( } // namespace Prefetcher Prefetcher::STeMS* -STeMSPrefetcherParams::create() +STeMSPrefetcherParams::create() const { - return new Prefetcher::STeMS(this); + return new Prefetcher::STeMS(*this); } diff --git a/src/mem/cache/prefetch/spatio_temporal_memory_streaming.hh b/src/mem/cache/prefetch/spatio_temporal_memory_streaming.hh index 4e0ca28c1..8e3b202f4 100644 --- a/src/mem/cache/prefetch/spatio_temporal_memory_streaming.hh +++ b/src/mem/cache/prefetch/spatio_temporal_memory_streaming.hh @@ -192,7 +192,7 @@ class STeMS : public Queued std::vector &addresses); public: - STeMS(const STeMSPrefetcherParams* p); + STeMS(const STeMSPrefetcherParams &p); ~STeMS() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/prefetch/stride.cc b/src/mem/cache/prefetch/stride.cc index 8141af2e5..b7aa64d40 100644 --- a/src/mem/cache/prefetch/stride.cc +++ b/src/mem/cache/prefetch/stride.cc @@ -74,14 +74,14 @@ Stride::StrideEntry::invalidate() confidence.reset(); } -Stride::Stride(const StridePrefetcherParams *p) +Stride::Stride(const StridePrefetcherParams &p) : Queued(p), - initConfidence(p->confidence_counter_bits, p->initial_confidence), - threshConf(p->confidence_threshold/100.0), - useRequestorId(p->use_requestor_id), - degree(p->degree), - pcTableInfo(p->table_assoc, p->table_entries, p->table_indexing_policy, - p->table_replacement_policy) + initConfidence(p.confidence_counter_bits, p.initial_confidence), + threshConf(p.confidence_threshold/100.0), + useRequestorId(p.use_requestor_id), + degree(p.degree), + pcTableInfo(p.table_assoc, p.table_entries, p.table_indexing_policy, + p.table_replacement_policy) { } @@ -204,13 +204,13 @@ StridePrefetcherHashedSetAssociative::extractTag(const Addr addr) const } // namespace Prefetcher Prefetcher::StridePrefetcherHashedSetAssociative* -StridePrefetcherHashedSetAssociativeParams::create() +StridePrefetcherHashedSetAssociativeParams::create() const { - return new Prefetcher::StridePrefetcherHashedSetAssociative(this); + return new Prefetcher::StridePrefetcherHashedSetAssociative(*this); } Prefetcher::Stride* -StridePrefetcherParams::create() +StridePrefetcherParams::create() const { - return new Prefetcher::Stride(this); + return new Prefetcher::Stride(*this); } diff --git a/src/mem/cache/prefetch/stride.hh b/src/mem/cache/prefetch/stride.hh index 57179fdb5..982f33e5e 100644 --- a/src/mem/cache/prefetch/stride.hh +++ b/src/mem/cache/prefetch/stride.hh @@ -80,7 +80,7 @@ class StridePrefetcherHashedSetAssociative : public SetAssociative public: StridePrefetcherHashedSetAssociative( - const StridePrefetcherHashedSetAssociativeParams *p) + const StridePrefetcherHashedSetAssociativeParams &p) : SetAssociative(p) { } @@ -153,7 +153,7 @@ class Stride : public Queued PCTable* allocateNewContext(int context); public: - Stride(const StridePrefetcherParams *p); + Stride(const StridePrefetcherParams &p); void calculatePrefetch(const PrefetchInfo &pfi, std::vector &addresses) override; diff --git a/src/mem/cache/prefetch/tagged.cc b/src/mem/cache/prefetch/tagged.cc index 55b8710d2..f626a8991 100644 --- a/src/mem/cache/prefetch/tagged.cc +++ b/src/mem/cache/prefetch/tagged.cc @@ -37,8 +37,8 @@ namespace Prefetcher { -Tagged::Tagged(const TaggedPrefetcherParams *p) - : Queued(p), degree(p->degree) +Tagged::Tagged(const TaggedPrefetcherParams &p) + : Queued(p), degree(p.degree) { } @@ -58,7 +58,7 @@ Tagged::calculatePrefetch(const PrefetchInfo &pfi, } // namespace Prefetcher Prefetcher::Tagged* -TaggedPrefetcherParams::create() +TaggedPrefetcherParams::create() const { - return new Prefetcher::Tagged(this); + return new Prefetcher::Tagged(*this); } diff --git a/src/mem/cache/prefetch/tagged.hh b/src/mem/cache/prefetch/tagged.hh index e8b750542..5a84646cb 100644 --- a/src/mem/cache/prefetch/tagged.hh +++ b/src/mem/cache/prefetch/tagged.hh @@ -47,7 +47,7 @@ class Tagged : public Queued const int degree; public: - Tagged(const TaggedPrefetcherParams *p); + Tagged(const TaggedPrefetcherParams &p); ~Tagged() = default; void calculatePrefetch(const PrefetchInfo &pfi, diff --git a/src/mem/cache/replacement_policies/base.hh b/src/mem/cache/replacement_policies/base.hh index f00ab67d5..147885df6 100644 --- a/src/mem/cache/replacement_policies/base.hh +++ b/src/mem/cache/replacement_policies/base.hh @@ -49,7 +49,7 @@ class Base : public SimObject { public: typedef BaseReplacementPolicyParams Params; - Base(const Params *p) : SimObject(p) {} + Base(const Params &p) : SimObject(p) {} virtual ~Base() = default; /** diff --git a/src/mem/cache/replacement_policies/bip_rp.cc b/src/mem/cache/replacement_policies/bip_rp.cc index 0086136d5..06b31b6da 100644 --- a/src/mem/cache/replacement_policies/bip_rp.cc +++ b/src/mem/cache/replacement_policies/bip_rp.cc @@ -36,8 +36,8 @@ namespace ReplacementPolicy { -BIP::BIP(const Params *p) - : LRU(p), btp(p->btp) +BIP::BIP(const Params &p) + : LRU(p), btp(p.btp) { } @@ -59,7 +59,7 @@ BIP::reset(const std::shared_ptr& replacement_data) const } // namespace ReplacementPolicy ReplacementPolicy::BIP* -BIPRPParams::create() +BIPRPParams::create() const { - return new ReplacementPolicy::BIP(this); + return new ReplacementPolicy::BIP(*this); } diff --git a/src/mem/cache/replacement_policies/bip_rp.hh b/src/mem/cache/replacement_policies/bip_rp.hh index 9d91f8fc8..0d9f97a76 100644 --- a/src/mem/cache/replacement_policies/bip_rp.hh +++ b/src/mem/cache/replacement_policies/bip_rp.hh @@ -59,7 +59,7 @@ class BIP : public LRU public: typedef BIPRPParams Params; - BIP(const Params *p); + BIP(const Params &p); ~BIP() = default; /** diff --git a/src/mem/cache/replacement_policies/brrip_rp.cc b/src/mem/cache/replacement_policies/brrip_rp.cc index fca1cc190..2aeade138 100644 --- a/src/mem/cache/replacement_policies/brrip_rp.cc +++ b/src/mem/cache/replacement_policies/brrip_rp.cc @@ -37,9 +37,9 @@ namespace ReplacementPolicy { -BRRIP::BRRIP(const Params *p) - : Base(p), numRRPVBits(p->num_bits), hitPriority(p->hit_priority), - btp(p->btp) +BRRIP::BRRIP(const Params &p) + : Base(p), numRRPVBits(p.num_bits), hitPriority(p.hit_priority), + btp(p.btp) { fatal_if(numRRPVBits <= 0, "There should be at least one bit per RRPV.\n"); } @@ -147,7 +147,7 @@ BRRIP::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::BRRIP* -BRRIPRPParams::create() +BRRIPRPParams::create() const { - return new ReplacementPolicy::BRRIP(this); + return new ReplacementPolicy::BRRIP(*this); } diff --git a/src/mem/cache/replacement_policies/brrip_rp.hh b/src/mem/cache/replacement_policies/brrip_rp.hh index c84e9d596..a9ddfe45c 100644 --- a/src/mem/cache/replacement_policies/brrip_rp.hh +++ b/src/mem/cache/replacement_policies/brrip_rp.hh @@ -109,7 +109,7 @@ class BRRIP : public Base public: typedef BRRIPRPParams Params; - BRRIP(const Params *p); + BRRIP(const Params &p); ~BRRIP() = default; /** diff --git a/src/mem/cache/replacement_policies/fifo_rp.cc b/src/mem/cache/replacement_policies/fifo_rp.cc index 2371d7659..9d869732a 100644 --- a/src/mem/cache/replacement_policies/fifo_rp.cc +++ b/src/mem/cache/replacement_policies/fifo_rp.cc @@ -36,7 +36,7 @@ namespace ReplacementPolicy { -FIFO::FIFO(const Params *p) +FIFO::FIFO(const Params &p) : Base(p) { } @@ -94,7 +94,7 @@ FIFO::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::FIFO* -FIFORPParams::create() +FIFORPParams::create() const { - return new ReplacementPolicy::FIFO(this); + return new ReplacementPolicy::FIFO(*this); } diff --git a/src/mem/cache/replacement_policies/fifo_rp.hh b/src/mem/cache/replacement_policies/fifo_rp.hh index 03a4aec10..ae9f31762 100644 --- a/src/mem/cache/replacement_policies/fifo_rp.hh +++ b/src/mem/cache/replacement_policies/fifo_rp.hh @@ -60,7 +60,7 @@ class FIFO : public Base public: typedef FIFORPParams Params; - FIFO(const Params *p); + FIFO(const Params &p); ~FIFO() = default; /** diff --git a/src/mem/cache/replacement_policies/lfu_rp.cc b/src/mem/cache/replacement_policies/lfu_rp.cc index 0f3b24249..054ef6173 100644 --- a/src/mem/cache/replacement_policies/lfu_rp.cc +++ b/src/mem/cache/replacement_policies/lfu_rp.cc @@ -35,7 +35,7 @@ namespace ReplacementPolicy { -LFU::LFU(const Params *p) +LFU::LFU(const Params &p) : Base(p) { } @@ -92,7 +92,7 @@ LFU::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::LFU* -LFURPParams::create() +LFURPParams::create() const { - return new ReplacementPolicy::LFU(this); + return new ReplacementPolicy::LFU(*this); } diff --git a/src/mem/cache/replacement_policies/lfu_rp.hh b/src/mem/cache/replacement_policies/lfu_rp.hh index 36640e7de..4f233a43e 100644 --- a/src/mem/cache/replacement_policies/lfu_rp.hh +++ b/src/mem/cache/replacement_policies/lfu_rp.hh @@ -60,7 +60,7 @@ class LFU : public Base public: typedef LFURPParams Params; - LFU(const Params *p); + LFU(const Params &p); ~LFU() = default; /** diff --git a/src/mem/cache/replacement_policies/lru_rp.cc b/src/mem/cache/replacement_policies/lru_rp.cc index 9775c154c..798c96497 100644 --- a/src/mem/cache/replacement_policies/lru_rp.cc +++ b/src/mem/cache/replacement_policies/lru_rp.cc @@ -36,7 +36,7 @@ namespace ReplacementPolicy { -LRU::LRU(const Params *p) +LRU::LRU(const Params &p) : Base(p) { } @@ -96,7 +96,7 @@ LRU::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::LRU* -LRURPParams::create() +LRURPParams::create() const { - return new ReplacementPolicy::LRU(this); + return new ReplacementPolicy::LRU(*this); } diff --git a/src/mem/cache/replacement_policies/lru_rp.hh b/src/mem/cache/replacement_policies/lru_rp.hh index bb1b314c5..033816f5d 100644 --- a/src/mem/cache/replacement_policies/lru_rp.hh +++ b/src/mem/cache/replacement_policies/lru_rp.hh @@ -58,7 +58,7 @@ class LRU : public Base public: typedef LRURPParams Params; - LRU(const Params *p); + LRU(const Params &p); ~LRU() = default; /** diff --git a/src/mem/cache/replacement_policies/mru_rp.cc b/src/mem/cache/replacement_policies/mru_rp.cc index 04a777073..1dab0653f 100644 --- a/src/mem/cache/replacement_policies/mru_rp.cc +++ b/src/mem/cache/replacement_policies/mru_rp.cc @@ -36,7 +36,7 @@ namespace ReplacementPolicy { -MRU::MRU(const Params *p) +MRU::MRU(const Params &p) : Base(p) { } @@ -101,7 +101,7 @@ MRU::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::MRU* -MRURPParams::create() +MRURPParams::create() const { - return new ReplacementPolicy::MRU(this); + return new ReplacementPolicy::MRU(*this); } diff --git a/src/mem/cache/replacement_policies/mru_rp.hh b/src/mem/cache/replacement_policies/mru_rp.hh index 2561556eb..d5ef19bc0 100644 --- a/src/mem/cache/replacement_policies/mru_rp.hh +++ b/src/mem/cache/replacement_policies/mru_rp.hh @@ -60,7 +60,7 @@ class MRU : public Base public: typedef MRURPParams Params; - MRU(const Params *p); + MRU(const Params &p); ~MRU() = default; /** diff --git a/src/mem/cache/replacement_policies/random_rp.cc b/src/mem/cache/replacement_policies/random_rp.cc index 314e861d4..959baafbc 100644 --- a/src/mem/cache/replacement_policies/random_rp.cc +++ b/src/mem/cache/replacement_policies/random_rp.cc @@ -36,7 +36,7 @@ namespace ReplacementPolicy { -Random::Random(const Params *p) +Random::Random(const Params &p) : Base(p) { } @@ -95,7 +95,7 @@ Random::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::Random* -RandomRPParams::create() +RandomRPParams::create() const { - return new ReplacementPolicy::Random(this); + return new ReplacementPolicy::Random(*this); } diff --git a/src/mem/cache/replacement_policies/random_rp.hh b/src/mem/cache/replacement_policies/random_rp.hh index a49921160..a8896e354 100644 --- a/src/mem/cache/replacement_policies/random_rp.hh +++ b/src/mem/cache/replacement_policies/random_rp.hh @@ -61,7 +61,7 @@ class Random : public Base public: typedef RandomRPParams Params; - Random(const Params *p); + Random(const Params &p); ~Random() = default; /** diff --git a/src/mem/cache/replacement_policies/second_chance_rp.cc b/src/mem/cache/replacement_policies/second_chance_rp.cc index ddc68d76e..a55994e41 100644 --- a/src/mem/cache/replacement_policies/second_chance_rp.cc +++ b/src/mem/cache/replacement_policies/second_chance_rp.cc @@ -34,7 +34,7 @@ namespace ReplacementPolicy { -SecondChance::SecondChance(const Params *p) +SecondChance::SecondChance(const Params &p) : FIFO(p) { } @@ -136,7 +136,7 @@ SecondChance::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::SecondChance* -SecondChanceRPParams::create() +SecondChanceRPParams::create() const { - return new ReplacementPolicy::SecondChance(this); + return new ReplacementPolicy::SecondChance(*this); } diff --git a/src/mem/cache/replacement_policies/second_chance_rp.hh b/src/mem/cache/replacement_policies/second_chance_rp.hh index d13ea7bc7..29a3ed537 100644 --- a/src/mem/cache/replacement_policies/second_chance_rp.hh +++ b/src/mem/cache/replacement_policies/second_chance_rp.hh @@ -74,7 +74,7 @@ class SecondChance : public FIFO public: typedef SecondChanceRPParams Params; - SecondChance(const Params *p); + SecondChance(const Params &p); ~SecondChance() = default; /** diff --git a/src/mem/cache/replacement_policies/tree_plru_rp.cc b/src/mem/cache/replacement_policies/tree_plru_rp.cc index eaf5cb488..ada9eeedb 100644 --- a/src/mem/cache/replacement_policies/tree_plru_rp.cc +++ b/src/mem/cache/replacement_policies/tree_plru_rp.cc @@ -97,8 +97,8 @@ TreePLRU::TreePLRUReplData::TreePLRUReplData( { } -TreePLRU::TreePLRU(const Params *p) - : Base(p), numLeaves(p->num_leaves), count(0), treeInstance(nullptr) +TreePLRU::TreePLRU(const Params &p) + : Base(p), numLeaves(p.num_leaves), count(0), treeInstance(nullptr) { fatal_if(!isPowerOf2(numLeaves), "Number of leaves must be non-zero and a power of 2"); @@ -214,7 +214,7 @@ TreePLRU::instantiateEntry() } // namespace ReplacementPolicy ReplacementPolicy::TreePLRU* -TreePLRURPParams::create() +TreePLRURPParams::create() const { - return new ReplacementPolicy::TreePLRU(this); + return new ReplacementPolicy::TreePLRU(*this); } diff --git a/src/mem/cache/replacement_policies/tree_plru_rp.hh b/src/mem/cache/replacement_policies/tree_plru_rp.hh index 709f0a202..372439285 100644 --- a/src/mem/cache/replacement_policies/tree_plru_rp.hh +++ b/src/mem/cache/replacement_policies/tree_plru_rp.hh @@ -152,7 +152,7 @@ class TreePLRU : public Base public: typedef TreePLRURPParams Params; - TreePLRU(const Params *p); + TreePLRU(const Params &p); ~TreePLRU() = default; /** diff --git a/src/mem/cache/replacement_policies/weighted_lru_rp.cc b/src/mem/cache/replacement_policies/weighted_lru_rp.cc index 3044ce701..5b45e32cc 100644 --- a/src/mem/cache/replacement_policies/weighted_lru_rp.cc +++ b/src/mem/cache/replacement_policies/weighted_lru_rp.cc @@ -40,7 +40,7 @@ namespace ReplacementPolicy { -WeightedLRU::WeightedLRU(const Params* p) +WeightedLRU::WeightedLRU(const Params &p) : Base(p) { } @@ -124,7 +124,7 @@ WeightedLRU::invalidate(const std::shared_ptr& } // namespace ReplacementPolicy ReplacementPolicy::WeightedLRU* -WeightedLRURPParams::create() +WeightedLRURPParams::create() const { - return new ReplacementPolicy::WeightedLRU(this); + return new ReplacementPolicy::WeightedLRU(*this); } diff --git a/src/mem/cache/replacement_policies/weighted_lru_rp.hh b/src/mem/cache/replacement_policies/weighted_lru_rp.hh index 74e926eaf..71156d359 100644 --- a/src/mem/cache/replacement_policies/weighted_lru_rp.hh +++ b/src/mem/cache/replacement_policies/weighted_lru_rp.hh @@ -63,7 +63,7 @@ class WeightedLRU : public Base }; public: typedef WeightedLRURPParams Params; - WeightedLRU(const Params* p); + WeightedLRU(const Params &p); ~WeightedLRU() = default; /** diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc index 09de5fc5f..b00ad4921 100644 --- a/src/mem/cache/tags/base.cc +++ b/src/mem/cache/tags/base.cc @@ -55,13 +55,13 @@ #include "sim/sim_exit.hh" #include "sim/system.hh" -BaseTags::BaseTags(const Params *p) - : ClockedObject(p), blkSize(p->block_size), blkMask(blkSize - 1), - size(p->size), lookupLatency(p->tag_latency), - system(p->system), indexingPolicy(p->indexing_policy), - warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)), - warmedUp(false), numBlocks(p->size / p->block_size), - dataBlks(new uint8_t[p->size]), // Allocate data storage in one big chunk +BaseTags::BaseTags(const Params &p) + : ClockedObject(p), blkSize(p.block_size), blkMask(blkSize - 1), + size(p.size), lookupLatency(p.tag_latency), + system(p.system), indexingPolicy(p.indexing_policy), + warmupBound((p.warmup_percentage/100.0) * (p.size / p.block_size)), + warmedUp(false), numBlocks(p.size / p.block_size), + dataBlks(new uint8_t[p.size]), // Allocate data storage in one big chunk stats(*this) { registerExitCallback([this]() { cleanupRefs(); }); diff --git a/src/mem/cache/tags/base.hh b/src/mem/cache/tags/base.hh index 35e984ac2..deda63ec2 100644 --- a/src/mem/cache/tags/base.hh +++ b/src/mem/cache/tags/base.hh @@ -156,7 +156,7 @@ class BaseTags : public ClockedObject public: typedef BaseTagsParams Params; - BaseTags(const Params *p); + BaseTags(const Params &p); /** * Destructor. diff --git a/src/mem/cache/tags/base_set_assoc.cc b/src/mem/cache/tags/base_set_assoc.cc index ba6919d4f..cc2fac62b 100644 --- a/src/mem/cache/tags/base_set_assoc.cc +++ b/src/mem/cache/tags/base_set_assoc.cc @@ -49,10 +49,10 @@ #include "base/intmath.hh" -BaseSetAssoc::BaseSetAssoc(const Params *p) - :BaseTags(p), allocAssoc(p->assoc), blks(p->size / p->block_size), - sequentialAccess(p->sequential_access), - replacementPolicy(p->replacement_policy) +BaseSetAssoc::BaseSetAssoc(const Params &p) + :BaseTags(p), allocAssoc(p.assoc), blks(p.size / p.block_size), + sequentialAccess(p.sequential_access), + replacementPolicy(p.replacement_policy) { // Check parameters if (blkSize < 4 || !isPowerOf2(blkSize)) { @@ -92,10 +92,10 @@ BaseSetAssoc::invalidate(CacheBlk *blk) } BaseSetAssoc * -BaseSetAssocParams::create() +BaseSetAssocParams::create() const { // There must be a indexing policy fatal_if(!indexing_policy, "An indexing policy is required"); - return new BaseSetAssoc(this); + return new BaseSetAssoc(*this); } diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh index b48428b6e..787cc6bd0 100644 --- a/src/mem/cache/tags/base_set_assoc.hh +++ b/src/mem/cache/tags/base_set_assoc.hh @@ -91,7 +91,7 @@ class BaseSetAssoc : public BaseTags /** * Construct and initialize this tag store. */ - BaseSetAssoc(const Params *p); + BaseSetAssoc(const Params &p); /** * Destructor diff --git a/src/mem/cache/tags/compressed_tags.cc b/src/mem/cache/tags/compressed_tags.cc index f86d1a5db..64a7102d1 100644 --- a/src/mem/cache/tags/compressed_tags.cc +++ b/src/mem/cache/tags/compressed_tags.cc @@ -41,7 +41,7 @@ #include "mem/packet.hh" #include "params/CompressedTags.hh" -CompressedTags::CompressedTags(const Params *p) +CompressedTags::CompressedTags(const Params &p) : SectorTags(p) { } @@ -206,7 +206,7 @@ CompressedTags::anyBlk(std::function visitor) } CompressedTags * -CompressedTagsParams::create() +CompressedTagsParams::create() const { - return new CompressedTags(this); + return new CompressedTags(*this); } diff --git a/src/mem/cache/tags/compressed_tags.hh b/src/mem/cache/tags/compressed_tags.hh index 0a4afb172..73231f2f5 100644 --- a/src/mem/cache/tags/compressed_tags.hh +++ b/src/mem/cache/tags/compressed_tags.hh @@ -83,7 +83,7 @@ class CompressedTags : public SectorTags /** * Construct and initialize this tag store. */ - CompressedTags(const Params *p); + CompressedTags(const Params &p); /** * Destructor. diff --git a/src/mem/cache/tags/fa_lru.cc b/src/mem/cache/tags/fa_lru.cc index 82f951970..fc69bda64 100644 --- a/src/mem/cache/tags/fa_lru.cc +++ b/src/mem/cache/tags/fa_lru.cc @@ -60,10 +60,10 @@ FALRUBlk::print() const return csprintf("%s inCachesMask: %#x", CacheBlk::print(), inCachesMask); } -FALRU::FALRU(const Params *p) +FALRU::FALRU(const Params &p) : BaseTags(p), - cacheTracking(p->min_tracked_cache_size, size, blkSize) + cacheTracking(p.min_tracked_cache_size, size, blkSize) { if (!isPowerOf2(blkSize)) fatal("cache block size (in bytes) `%d' must be a power of two", @@ -280,9 +280,9 @@ FALRU::moveToTail(FALRUBlk *blk) } FALRU * -FALRUParams::create() +FALRUParams::create() const { - return new FALRU(this); + return new FALRU(*this); } void diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh index 5feb518f4..f03ecee58 100644 --- a/src/mem/cache/tags/fa_lru.hh +++ b/src/mem/cache/tags/fa_lru.hh @@ -153,7 +153,7 @@ class FALRU : public BaseTags /** * Construct and initialize this cache tagstore. */ - FALRU(const Params *p); + FALRU(const Params &p); ~FALRU(); /** diff --git a/src/mem/cache/tags/indexing_policies/base.cc b/src/mem/cache/tags/indexing_policies/base.cc index 6a799e6dc..7b63c3d0c 100644 --- a/src/mem/cache/tags/indexing_policies/base.cc +++ b/src/mem/cache/tags/indexing_policies/base.cc @@ -52,10 +52,10 @@ #include "base/logging.hh" #include "mem/cache/replacement_policies/replaceable_entry.hh" -BaseIndexingPolicy::BaseIndexingPolicy(const Params *p) - : SimObject(p), assoc(p->assoc), - numSets(p->size / (p->entry_size * assoc)), - setShift(floorLog2(p->entry_size)), setMask(numSets - 1), sets(numSets), +BaseIndexingPolicy::BaseIndexingPolicy(const Params &p) + : SimObject(p), assoc(p.assoc), + numSets(p.size / (p.entry_size * assoc)), + setShift(floorLog2(p.entry_size)), setMask(numSets - 1), sets(numSets), tagShift(setShift + floorLog2(numSets)) { fatal_if(!isPowerOf2(numSets), "# of sets must be non-zero and a power " \ diff --git a/src/mem/cache/tags/indexing_policies/base.hh b/src/mem/cache/tags/indexing_policies/base.hh index 9a56b54f6..20b0390fc 100644 --- a/src/mem/cache/tags/indexing_policies/base.hh +++ b/src/mem/cache/tags/indexing_policies/base.hh @@ -102,7 +102,7 @@ class BaseIndexingPolicy : public SimObject /** * Construct and initialize this policy. */ - BaseIndexingPolicy(const Params *p); + BaseIndexingPolicy(const Params &p); /** * Destructor. diff --git a/src/mem/cache/tags/indexing_policies/set_associative.cc b/src/mem/cache/tags/indexing_policies/set_associative.cc index 05b37dd25..ab4a86feb 100644 --- a/src/mem/cache/tags/indexing_policies/set_associative.cc +++ b/src/mem/cache/tags/indexing_policies/set_associative.cc @@ -48,7 +48,7 @@ #include "mem/cache/replacement_policies/replaceable_entry.hh" -SetAssociative::SetAssociative(const Params *p) +SetAssociative::SetAssociative(const Params &p) : BaseIndexingPolicy(p) { } @@ -73,7 +73,7 @@ SetAssociative::getPossibleEntries(const Addr addr) const } SetAssociative* -SetAssociativeParams::create() +SetAssociativeParams::create() const { - return new SetAssociative(this); + return new SetAssociative(*this); } diff --git a/src/mem/cache/tags/indexing_policies/set_associative.hh b/src/mem/cache/tags/indexing_policies/set_associative.hh index e7126c39c..75b45f68f 100644 --- a/src/mem/cache/tags/indexing_policies/set_associative.hh +++ b/src/mem/cache/tags/indexing_policies/set_associative.hh @@ -96,7 +96,7 @@ class SetAssociative : public BaseIndexingPolicy /** * Construct and initialize this policy. */ - SetAssociative(const Params *p); + SetAssociative(const Params &p); /** * Destructor. diff --git a/src/mem/cache/tags/indexing_policies/skewed_associative.cc b/src/mem/cache/tags/indexing_policies/skewed_associative.cc index 57c389b77..5938916c6 100644 --- a/src/mem/cache/tags/indexing_policies/skewed_associative.cc +++ b/src/mem/cache/tags/indexing_policies/skewed_associative.cc @@ -38,7 +38,7 @@ #include "base/logging.hh" #include "mem/cache/replacement_policies/replaceable_entry.hh" -SkewedAssociative::SkewedAssociative(const Params *p) +SkewedAssociative::SkewedAssociative(const Params &p) : BaseIndexingPolicy(p), msbShift(floorLog2(numSets) - 1) { if (assoc > NUM_SKEWING_FUNCTIONS) { @@ -218,7 +218,7 @@ SkewedAssociative::getPossibleEntries(const Addr addr) const } SkewedAssociative * -SkewedAssociativeParams::create() +SkewedAssociativeParams::create() const { - return new SkewedAssociative(this); + return new SkewedAssociative(*this); } diff --git a/src/mem/cache/tags/indexing_policies/skewed_associative.hh b/src/mem/cache/tags/indexing_policies/skewed_associative.hh index cff3b3c6c..6992c71d2 100644 --- a/src/mem/cache/tags/indexing_policies/skewed_associative.hh +++ b/src/mem/cache/tags/indexing_policies/skewed_associative.hh @@ -142,7 +142,7 @@ class SkewedAssociative : public BaseIndexingPolicy /** * Construct and initialize this policy. */ - SkewedAssociative(const Params *p); + SkewedAssociative(const Params &p); /** * Destructor. diff --git a/src/mem/cache/tags/sector_tags.cc b/src/mem/cache/tags/sector_tags.cc index 43020aa28..aa6cb24ac 100644 --- a/src/mem/cache/tags/sector_tags.cc +++ b/src/mem/cache/tags/sector_tags.cc @@ -45,11 +45,11 @@ #include "mem/cache/replacement_policies/replaceable_entry.hh" #include "mem/cache/tags/indexing_policies/base.hh" -SectorTags::SectorTags(const SectorTagsParams *p) - : BaseTags(p), allocAssoc(p->assoc), - sequentialAccess(p->sequential_access), - replacementPolicy(p->replacement_policy), - numBlocksPerSector(p->num_blocks_per_sector), +SectorTags::SectorTags(const SectorTagsParams &p) + : BaseTags(p), allocAssoc(p.assoc), + sequentialAccess(p.sequential_access), + replacementPolicy(p.replacement_policy), + numBlocksPerSector(p.num_blocks_per_sector), numSectors(numBlocks / numBlocksPerSector), sectorShift(floorLog2(blkSize)), sectorMask(numBlocksPerSector - 1), sectorStats(stats, *this) @@ -325,10 +325,10 @@ SectorTags::anyBlk(std::function visitor) } SectorTags * -SectorTagsParams::create() +SectorTagsParams::create() const { // There must be a indexing policy fatal_if(!indexing_policy, "An indexing policy is required"); - return new SectorTags(this); + return new SectorTags(*this); } diff --git a/src/mem/cache/tags/sector_tags.hh b/src/mem/cache/tags/sector_tags.hh index 380b3c1c8..c56ef2409 100644 --- a/src/mem/cache/tags/sector_tags.hh +++ b/src/mem/cache/tags/sector_tags.hh @@ -108,7 +108,7 @@ class SectorTags : public BaseTags /** * Construct and initialize this tag store. */ - SectorTags(const Params *p); + SectorTags(const Params &p); /** * Destructor. diff --git a/src/mem/coherent_xbar.cc b/src/mem/coherent_xbar.cc index 14392b5f4..cbab90632 100644 --- a/src/mem/coherent_xbar.cc +++ b/src/mem/coherent_xbar.cc @@ -51,13 +51,13 @@ #include "debug/CoherentXBar.hh" #include "sim/system.hh" -CoherentXBar::CoherentXBar(const CoherentXBarParams *p) - : BaseXBar(p), system(p->system), snoopFilter(p->snoop_filter), - snoopResponseLatency(p->snoop_response_latency), - maxOutstandingSnoopCheck(p->max_outstanding_snoops), - maxRoutingTableSizeCheck(p->max_routing_table_size), - pointOfCoherency(p->point_of_coherency), - pointOfUnification(p->point_of_unification), +CoherentXBar::CoherentXBar(const CoherentXBarParams &p) + : BaseXBar(p), system(p.system), snoopFilter(p.snoop_filter), + snoopResponseLatency(p.snoop_response_latency), + maxOutstandingSnoopCheck(p.max_outstanding_snoops), + maxRoutingTableSizeCheck(p.max_routing_table_size), + pointOfCoherency(p.point_of_coherency), + pointOfUnification(p.point_of_unification), snoops(this, "snoops", "Total snoops (count)"), snoopTraffic(this, "snoopTraffic", "Total snoop traffic (bytes)"), @@ -66,7 +66,7 @@ CoherentXBar::CoherentXBar(const CoherentXBarParams *p) // create the ports based on the size of the memory-side port and // CPU-side port vector ports, and the presence of the default port, // the ports are enumerated starting from zero - for (int i = 0; i < p->port_mem_side_ports_connection_count; ++i) { + for (int i = 0; i < p.port_mem_side_ports_connection_count; ++i) { std::string portName = csprintf("%s.mem_side_port[%d]", name(), i); RequestPort* bp = new CoherentXBarRequestPort(portName, *this, i); memSidePorts.push_back(bp); @@ -78,7 +78,7 @@ CoherentXBar::CoherentXBar(const CoherentXBarParams *p) // see if we have a default CPU-side-port device connected and if so add // our corresponding memory-side port - if (p->port_default_connection_count) { + if (p.port_default_connection_count) { defaultPortID = memSidePorts.size(); std::string portName = name() + ".default"; RequestPort* bp = new CoherentXBarRequestPort(portName, *this, @@ -92,7 +92,7 @@ CoherentXBar::CoherentXBar(const CoherentXBarParams *p) } // create the CPU-side ports, once again starting at zero - for (int i = 0; i < p->port_cpu_side_ports_connection_count; ++i) { + for (int i = 0; i < p.port_cpu_side_ports_connection_count; ++i) { std::string portName = csprintf("%s.cpu_side_port[%d]", name(), i); QueuedResponsePort* bp = new CoherentXBarResponsePort(portName, *this, i); @@ -1119,7 +1119,7 @@ CoherentXBar::regStats() } CoherentXBar * -CoherentXBarParams::create() +CoherentXBarParams::create() const { - return new CoherentXBar(this); + return new CoherentXBar(*this); } diff --git a/src/mem/coherent_xbar.hh b/src/mem/coherent_xbar.hh index 81e2dc4cd..0295c4495 100644 --- a/src/mem/coherent_xbar.hh +++ b/src/mem/coherent_xbar.hh @@ -423,7 +423,7 @@ class CoherentXBar : public BaseXBar virtual void init(); - CoherentXBar(const CoherentXBarParams *p); + CoherentXBar(const CoherentXBarParams &p); virtual ~CoherentXBar(); diff --git a/src/mem/comm_monitor.cc b/src/mem/comm_monitor.cc index 14df955c1..99edd99d8 100644 --- a/src/mem/comm_monitor.cc +++ b/src/mem/comm_monitor.cc @@ -43,13 +43,13 @@ #include "debug/CommMonitor.hh" #include "sim/stats.hh" -CommMonitor::CommMonitor(Params* params) +CommMonitor::CommMonitor(const Params ¶ms) : SimObject(params), memSidePort(name() + "-mem_side_port", *this), cpuSidePort(name() + "-cpu_side_port", *this), samplePeriodicEvent([this]{ samplePeriodic(); }, name()), - samplePeriodTicks(params->sample_period), - samplePeriod(params->sample_period / SimClock::Float::s), + samplePeriodTicks(params.sample_period), + samplePeriod(params.sample_period / SimClock::Float::s), stats(this, params) { DPRINTF(CommMonitor, @@ -58,9 +58,9 @@ CommMonitor::CommMonitor(Params* params) } CommMonitor* -CommMonitorParams::create() +CommMonitorParams::create() const { - return new CommMonitor(this); + return new CommMonitor(*this); } void @@ -103,16 +103,16 @@ CommMonitor::recvFunctionalSnoop(PacketPtr pkt) } CommMonitor::MonitorStats::MonitorStats(Stats::Group *parent, - const CommMonitorParams *params) + const CommMonitorParams ¶ms) : Stats::Group(parent), - disableBurstLengthHists(params->disable_burst_length_hists), + disableBurstLengthHists(params.disable_burst_length_hists), ADD_STAT(readBurstLengthHist, "Histogram of burst lengths of transmitted packets"), ADD_STAT(writeBurstLengthHist, "Histogram of burst lengths of transmitted packets"), - disableBandwidthHists(params->disable_bandwidth_hists), + disableBandwidthHists(params.disable_bandwidth_hists), readBytes(0), ADD_STAT(readBandwidthHist, "Histogram of read bandwidth per sample period (bytes/s)"), @@ -126,23 +126,23 @@ CommMonitor::MonitorStats::MonitorStats(Stats::Group *parent, ADD_STAT(averageWriteBandwidth, "Average write bandwidth (bytes/s)", totalWrittenBytes / simSeconds), - disableLatencyHists(params->disable_latency_hists), + disableLatencyHists(params.disable_latency_hists), ADD_STAT(readLatencyHist, "Read request-response latency"), ADD_STAT(writeLatencyHist, "Write request-response latency"), - disableITTDists(params->disable_itt_dists), + disableITTDists(params.disable_itt_dists), ADD_STAT(ittReadRead, "Read-to-read inter transaction time"), ADD_STAT(ittWriteWrite , "Write-to-write inter transaction time"), ADD_STAT(ittReqReq, "Request-to-request inter transaction time"), timeOfLastRead(0), timeOfLastWrite(0), timeOfLastReq(0), - disableOutstandingHists(params->disable_outstanding_hists), + disableOutstandingHists(params.disable_outstanding_hists), ADD_STAT(outstandingReadsHist, "Outstanding read transactions"), outstandingReadReqs(0), ADD_STAT(outstandingWritesHist, "Outstanding write transactions"), outstandingWriteReqs(0), - disableTransactionHists(params->disable_transaction_hists), + disableTransactionHists(params.disable_transaction_hists), ADD_STAT(readTransHist, "Histogram of read transactions per sample period"), readTrans(0), @@ -150,25 +150,25 @@ CommMonitor::MonitorStats::MonitorStats(Stats::Group *parent, "Histogram of write transactions per sample period"), writeTrans(0), - disableAddrDists(params->disable_addr_dists), - readAddrMask(params->read_addr_mask), - writeAddrMask(params->write_addr_mask), + disableAddrDists(params.disable_addr_dists), + readAddrMask(params.read_addr_mask), + writeAddrMask(params.write_addr_mask), ADD_STAT(readAddrDist, "Read address distribution"), ADD_STAT(writeAddrDist, "Write address distribution") { using namespace Stats; readBurstLengthHist - .init(params->burst_length_bins) + .init(params.burst_length_bins) .flags(disableBurstLengthHists ? nozero : pdf); writeBurstLengthHist - .init(params->burst_length_bins) + .init(params.burst_length_bins) .flags(disableBurstLengthHists ? nozero : pdf); // Stats based on received responses readBandwidthHist - .init(params->bandwidth_bins) + .init(params.bandwidth_bins) .flags(disableBandwidthHists ? nozero : pdf); averageReadBandwidth @@ -179,7 +179,7 @@ CommMonitor::MonitorStats::MonitorStats(Stats::Group *parent, // Stats based on successfully sent requests writeBandwidthHist - .init(params->bandwidth_bins) + .init(params.bandwidth_bins) .flags(disableBandwidthHists ? (pdf | nozero) : pdf); averageWriteBandwidth @@ -190,42 +190,42 @@ CommMonitor::MonitorStats::MonitorStats(Stats::Group *parent, readLatencyHist - .init(params->latency_bins) + .init(params.latency_bins) .flags(disableLatencyHists ? nozero : pdf); writeLatencyHist - .init(params->latency_bins) + .init(params.latency_bins) .flags(disableLatencyHists ? nozero : pdf); ittReadRead - .init(1, params->itt_max_bin, params->itt_max_bin / - params->itt_bins) + .init(1, params.itt_max_bin, params.itt_max_bin / + params.itt_bins) .flags(disableITTDists ? nozero : pdf); ittWriteWrite - .init(1, params->itt_max_bin, params->itt_max_bin / - params->itt_bins) + .init(1, params.itt_max_bin, params.itt_max_bin / + params.itt_bins) .flags(disableITTDists ? nozero : pdf); ittReqReq - .init(1, params->itt_max_bin, params->itt_max_bin / - params->itt_bins) + .init(1, params.itt_max_bin, params.itt_max_bin / + params.itt_bins) .flags(disableITTDists ? nozero : pdf); outstandingReadsHist - .init(params->outstanding_bins) + .init(params.outstanding_bins) .flags(disableOutstandingHists ? nozero : pdf); outstandingWritesHist - .init(params->outstanding_bins) + .init(params.outstanding_bins) .flags(disableOutstandingHists ? nozero : pdf); readTransHist - .init(params->transaction_bins) + .init(params.transaction_bins) .flags(disableTransactionHists ? nozero : pdf); writeTransHist - .init(params->transaction_bins) + .init(params.transaction_bins) .flags(disableTransactionHists ? nozero : pdf); readAddrDist diff --git a/src/mem/comm_monitor.hh b/src/mem/comm_monitor.hh index ed6936246..9912baabd 100644 --- a/src/mem/comm_monitor.hh +++ b/src/mem/comm_monitor.hh @@ -64,15 +64,18 @@ class CommMonitor : public SimObject /** Parameters of communication monitor */ typedef CommMonitorParams Params; - const Params* params() const - { return reinterpret_cast(_params); } + const Params & + params() const + { + return reinterpret_cast(_params); + } /** * Constructor based on the Python params * * @param params Python parameters */ - CommMonitor(Params* params); + CommMonitor(const Params ¶ms); void init() override; void startup() override; @@ -382,7 +385,7 @@ class CommMonitor : public SimObject * that are not statistics themselves, but used to control the * stats or track values during a sample period. */ - MonitorStats(Stats::Group *parent, const CommMonitorParams* params); + MonitorStats(Stats::Group *parent, const CommMonitorParams ¶ms); void updateReqStats(const ProbePoints::PacketInfo& pkt, bool is_atomic, bool expects_response); diff --git a/src/mem/drampower.cc b/src/mem/drampower.cc index 96dcb5518..ef38a67c0 100644 --- a/src/mem/drampower.cc +++ b/src/mem/drampower.cc @@ -40,27 +40,27 @@ #include "base/intmath.hh" #include "sim/core.hh" -DRAMPower::DRAMPower(const DRAMInterfaceParams* p, bool include_io) : +DRAMPower::DRAMPower(const DRAMInterfaceParams &p, bool include_io) : powerlib(libDRAMPower(getMemSpec(p), include_io)) { } Data::MemArchitectureSpec -DRAMPower::getArchParams(const DRAMInterfaceParams* p) +DRAMPower::getArchParams(const DRAMInterfaceParams &p) { Data::MemArchitectureSpec archSpec; - archSpec.burstLength = p->burst_length; - archSpec.nbrOfBanks = p->banks_per_rank; + archSpec.burstLength = p.burst_length; + archSpec.nbrOfBanks = p.banks_per_rank; // One DRAMPower instance per rank, hence set this to 1 archSpec.nbrOfRanks = 1; - archSpec.dataRate = p->beats_per_clock; + archSpec.dataRate = p.beats_per_clock; // For now we can ignore the number of columns and rows as they // are not used in the power calculation. archSpec.nbrOfColumns = 0; archSpec.nbrOfRows = 0; - archSpec.width = p->device_bus_width; - archSpec.nbrOfBankGroups = p->bank_groups_per_rank; - archSpec.dll = p->dll; + archSpec.width = p.device_bus_width; + archSpec.nbrOfBankGroups = p.bank_groups_per_rank; + archSpec.dll = p.dll; archSpec.twoVoltageDomains = hasTwoVDD(p); // Keep this disabled for now until the model is firmed up. archSpec.termination = false; @@ -68,71 +68,71 @@ DRAMPower::getArchParams(const DRAMInterfaceParams* p) } Data::MemTimingSpec -DRAMPower::getTimingParams(const DRAMInterfaceParams* p) +DRAMPower::getTimingParams(const DRAMInterfaceParams &p) { // Set the values that are used for power calculations and ignore // the ones only used by the controller functionality in DRAMPower // All DRAMPower timings are in clock cycles Data::MemTimingSpec timingSpec; - timingSpec.RC = divCeil((p->tRAS + p->tRP), p->tCK); - timingSpec.RCD = divCeil(p->tRCD, p->tCK); - timingSpec.RL = divCeil(p->tCL, p->tCK); - timingSpec.RP = divCeil(p->tRP, p->tCK); - timingSpec.RFC = divCeil(p->tRFC, p->tCK); - timingSpec.RAS = divCeil(p->tRAS, p->tCK); + timingSpec.RC = divCeil((p.tRAS + p.tRP), p.tCK); + timingSpec.RCD = divCeil(p.tRCD, p.tCK); + timingSpec.RL = divCeil(p.tCL, p.tCK); + timingSpec.RP = divCeil(p.tRP, p.tCK); + timingSpec.RFC = divCeil(p.tRFC, p.tCK); + timingSpec.RAS = divCeil(p.tRAS, p.tCK); // Write latency is read latency - 1 cycle // Source: B.Jacob Memory Systems Cache, DRAM, Disk timingSpec.WL = timingSpec.RL - 1; timingSpec.DQSCK = 0; // ignore for now - timingSpec.RTP = divCeil(p->tRTP, p->tCK); - timingSpec.WR = divCeil(p->tWR, p->tCK); - timingSpec.XP = divCeil(p->tXP, p->tCK); - timingSpec.XPDLL = divCeil(p->tXPDLL, p->tCK); - timingSpec.XS = divCeil(p->tXS, p->tCK); - timingSpec.XSDLL = divCeil(p->tXSDLL, p->tCK); + timingSpec.RTP = divCeil(p.tRTP, p.tCK); + timingSpec.WR = divCeil(p.tWR, p.tCK); + timingSpec.XP = divCeil(p.tXP, p.tCK); + timingSpec.XPDLL = divCeil(p.tXPDLL, p.tCK); + timingSpec.XS = divCeil(p.tXS, p.tCK); + timingSpec.XSDLL = divCeil(p.tXSDLL, p.tCK); // Clock period in ns - timingSpec.clkPeriod = (p->tCK / (double)(SimClock::Int::ns)); + timingSpec.clkPeriod = (p.tCK / (double)(SimClock::Int::ns)); assert(timingSpec.clkPeriod != 0); timingSpec.clkMhz = (1 / timingSpec.clkPeriod) * 1000; return timingSpec; } Data::MemPowerSpec -DRAMPower::getPowerParams(const DRAMInterfaceParams* p) +DRAMPower::getPowerParams(const DRAMInterfaceParams &p) { // All DRAMPower currents are in mA Data::MemPowerSpec powerSpec; - powerSpec.idd0 = p->IDD0 * 1000; - powerSpec.idd02 = p->IDD02 * 1000; - powerSpec.idd2p0 = p->IDD2P0 * 1000; - powerSpec.idd2p02 = p->IDD2P02 * 1000; - powerSpec.idd2p1 = p->IDD2P1 * 1000; - powerSpec.idd2p12 = p->IDD2P12 * 1000; - powerSpec.idd2n = p->IDD2N * 1000; - powerSpec.idd2n2 = p->IDD2N2 * 1000; - powerSpec.idd3p0 = p->IDD3P0 * 1000; - powerSpec.idd3p02 = p->IDD3P02 * 1000; - powerSpec.idd3p1 = p->IDD3P1 * 1000; - powerSpec.idd3p12 = p->IDD3P12 * 1000; - powerSpec.idd3n = p->IDD3N * 1000; - powerSpec.idd3n2 = p->IDD3N2 * 1000; - powerSpec.idd4r = p->IDD4R * 1000; - powerSpec.idd4r2 = p->IDD4R2 * 1000; - powerSpec.idd4w = p->IDD4W * 1000; - powerSpec.idd4w2 = p->IDD4W2 * 1000; - powerSpec.idd5 = p->IDD5 * 1000; - powerSpec.idd52 = p->IDD52 * 1000; - powerSpec.idd6 = p->IDD6 * 1000; - powerSpec.idd62 = p->IDD62 * 1000; - powerSpec.vdd = p->VDD; - powerSpec.vdd2 = p->VDD2; + powerSpec.idd0 = p.IDD0 * 1000; + powerSpec.idd02 = p.IDD02 * 1000; + powerSpec.idd2p0 = p.IDD2P0 * 1000; + powerSpec.idd2p02 = p.IDD2P02 * 1000; + powerSpec.idd2p1 = p.IDD2P1 * 1000; + powerSpec.idd2p12 = p.IDD2P12 * 1000; + powerSpec.idd2n = p.IDD2N * 1000; + powerSpec.idd2n2 = p.IDD2N2 * 1000; + powerSpec.idd3p0 = p.IDD3P0 * 1000; + powerSpec.idd3p02 = p.IDD3P02 * 1000; + powerSpec.idd3p1 = p.IDD3P1 * 1000; + powerSpec.idd3p12 = p.IDD3P12 * 1000; + powerSpec.idd3n = p.IDD3N * 1000; + powerSpec.idd3n2 = p.IDD3N2 * 1000; + powerSpec.idd4r = p.IDD4R * 1000; + powerSpec.idd4r2 = p.IDD4R2 * 1000; + powerSpec.idd4w = p.IDD4W * 1000; + powerSpec.idd4w2 = p.IDD4W2 * 1000; + powerSpec.idd5 = p.IDD5 * 1000; + powerSpec.idd52 = p.IDD52 * 1000; + powerSpec.idd6 = p.IDD6 * 1000; + powerSpec.idd62 = p.IDD62 * 1000; + powerSpec.vdd = p.VDD; + powerSpec.vdd2 = p.VDD2; return powerSpec; } Data::MemorySpecification -DRAMPower::getMemSpec(const DRAMInterfaceParams* p) +DRAMPower::getMemSpec(const DRAMInterfaceParams &p) { Data::MemorySpecification memSpec; memSpec.memArchSpec = getArchParams(p); @@ -142,16 +142,16 @@ DRAMPower::getMemSpec(const DRAMInterfaceParams* p) } bool -DRAMPower::hasTwoVDD(const DRAMInterfaceParams* p) +DRAMPower::hasTwoVDD(const DRAMInterfaceParams &p) { - return p->VDD2 == 0 ? false : true; + return p.VDD2 == 0 ? false : true; } uint8_t -DRAMPower::getDataRate(const DRAMInterfaceParams* p) +DRAMPower::getDataRate(const DRAMInterfaceParams &p) { - uint32_t burst_cycles = divCeil(p->tBURST_MAX, p->tCK); - uint8_t data_rate = p->burst_length / burst_cycles; + uint32_t burst_cycles = divCeil(p.tBURST_MAX, p.tCK); + uint8_t data_rate = p.burst_length / burst_cycles; // 4 for GDDR5 if (data_rate != 1 && data_rate != 2 && data_rate != 4 && data_rate != 8) fatal("Got unexpected data rate %d, should be 1 or 2 or 4 or 8\n"); diff --git a/src/mem/drampower.hh b/src/mem/drampower.hh index da68a787f..0d7366655 100644 --- a/src/mem/drampower.hh +++ b/src/mem/drampower.hh @@ -60,41 +60,41 @@ class DRAMPower * DRAMInterfaceParams to the memSpec of DRAMPower */ static Data::MemArchitectureSpec getArchParams( - const DRAMInterfaceParams* p); + const DRAMInterfaceParams &p); /** * Transforms the timing parameters defined in DRAMInterfaceParams to * the memSpec of DRAMPower */ - static Data::MemTimingSpec getTimingParams(const DRAMInterfaceParams* p); + static Data::MemTimingSpec getTimingParams(const DRAMInterfaceParams &p); /** * Transforms the power and current parameters defined in * DRAMInterfaceParams to the memSpec of DRAMPower */ - static Data::MemPowerSpec getPowerParams(const DRAMInterfaceParams* p); + static Data::MemPowerSpec getPowerParams(const DRAMInterfaceParams &p); /** * Determine data rate, either one or two. */ - static uint8_t getDataRate(const DRAMInterfaceParams* p); + static uint8_t getDataRate(const DRAMInterfaceParams &p); /** * Determine if DRAM has two voltage domains (or one) */ - static bool hasTwoVDD(const DRAMInterfaceParams* p); + static bool hasTwoVDD(const DRAMInterfaceParams &p); /** * Return an instance of MemSpec based on the DRAMInterfaceParams */ - static Data::MemorySpecification getMemSpec(const DRAMInterfaceParams* p); + static Data::MemorySpecification getMemSpec(const DRAMInterfaceParams &p); public: // Instance of DRAMPower Library libDRAMPower powerlib; - DRAMPower(const DRAMInterfaceParams* p, bool include_io); + DRAMPower(const DRAMInterfaceParams &p, bool include_io); }; diff --git a/src/mem/dramsim2.cc b/src/mem/dramsim2.cc index b09138cef..0eaf33687 100644 --- a/src/mem/dramsim2.cc +++ b/src/mem/dramsim2.cc @@ -44,11 +44,11 @@ #include "debug/Drain.hh" #include "sim/system.hh" -DRAMSim2::DRAMSim2(const Params* p) : +DRAMSim2::DRAMSim2(const Params &p) : AbstractMemory(p), port(name() + ".port", *this), - wrapper(p->deviceConfigFile, p->systemConfigFile, p->filePath, - p->traceFile, p->range.size() / 1024 / 1024, p->enableDebug), + wrapper(p.deviceConfigFile, p.systemConfigFile, p.filePath, + p.traceFile, p.range.size() / 1024 / 1024, p.enableDebug), retryReq(false), retryResp(false), startTick(0), nbrOutstandingReads(0), nbrOutstandingWrites(0), sendResponseEvent([this]{ sendResponse(); }, name()), @@ -389,7 +389,7 @@ DRAMSim2::MemoryPort::recvRespRetry() } DRAMSim2* -DRAMSim2Params::create() +DRAMSim2Params::create() const { - return new DRAMSim2(this); + return new DRAMSim2(*this); } diff --git a/src/mem/dramsim2.hh b/src/mem/dramsim2.hh index 3259e8513..a417c070d 100644 --- a/src/mem/dramsim2.hh +++ b/src/mem/dramsim2.hh @@ -167,7 +167,7 @@ class DRAMSim2 : public AbstractMemory public: typedef DRAMSim2Params Params; - DRAMSim2(const Params *p); + DRAMSim2(const Params &p); /** * Read completion callback. diff --git a/src/mem/dramsim3.cc b/src/mem/dramsim3.cc index 4b2f79676..36bd371d6 100644 --- a/src/mem/dramsim3.cc +++ b/src/mem/dramsim3.cc @@ -45,14 +45,14 @@ #include "debug/Drain.hh" #include "sim/system.hh" -DRAMsim3::DRAMsim3(const Params* p) : +DRAMsim3::DRAMsim3(const Params &p) : AbstractMemory(p), port(name() + ".port", *this), read_cb(std::bind(&DRAMsim3::readComplete, this, 0, std::placeholders::_1)), write_cb(std::bind(&DRAMsim3::writeComplete, this, 0, std::placeholders::_1)), - wrapper(p->configFile, p->filePath, read_cb, write_cb), + wrapper(p.configFile, p.filePath, read_cb, write_cb), retryReq(false), retryResp(false), startTick(0), nbrOutstandingReads(0), nbrOutstandingWrites(0), sendResponseEvent([this]{ sendResponse(); }, name()), @@ -389,7 +389,7 @@ DRAMsim3::MemoryPort::recvRespRetry() } DRAMsim3* -DRAMsim3Params::create() +DRAMsim3Params::create() const { - return new DRAMsim3(this); + return new DRAMsim3(*this); } diff --git a/src/mem/dramsim3.hh b/src/mem/dramsim3.hh index fc3cd1a28..f667c4d19 100644 --- a/src/mem/dramsim3.hh +++ b/src/mem/dramsim3.hh @@ -176,7 +176,7 @@ class DRAMsim3 : public AbstractMemory public: typedef DRAMsim3Params Params; - DRAMsim3(const Params *p); + DRAMsim3(const Params &p); /** * Read completion callback. diff --git a/src/mem/external_master.cc b/src/mem/external_master.cc index 81b7a52c3..d7a081f6c 100644 --- a/src/mem/external_master.cc +++ b/src/mem/external_master.cc @@ -47,13 +47,13 @@ std::map ExternalMaster::portHandlers; -ExternalMaster::ExternalMaster(ExternalMasterParams *params) : +ExternalMaster::ExternalMaster(const ExternalMasterParams ¶ms) : SimObject(params), externalPort(NULL), - portName(params->name + ".port"), - portType(params->port_type), - portData(params->port_data), - id(params->system->getRequestorId(this)) + portName(params.name + ".port"), + portType(params.port_type), + portData(params.port_data), + id(params.system->getRequestorId(this)) {} Port & @@ -94,9 +94,9 @@ ExternalMaster::init() } ExternalMaster * -ExternalMasterParams::create() +ExternalMasterParams::create() const { - return new ExternalMaster(this); + return new ExternalMaster(*this); } void diff --git a/src/mem/external_master.hh b/src/mem/external_master.hh index a4d5b031c..0ca19363e 100644 --- a/src/mem/external_master.hh +++ b/src/mem/external_master.hh @@ -115,7 +115,7 @@ class ExternalMaster : public SimObject static std::map portHandlers; public: - ExternalMaster(ExternalMasterParams *params); + ExternalMaster(const ExternalMasterParams ¶ms); /** Port interface. Responds only to port "port" */ Port &getPort(const std::string &if_name, diff --git a/src/mem/external_slave.cc b/src/mem/external_slave.cc index a40e5595c..1559a3c61 100644 --- a/src/mem/external_slave.cc +++ b/src/mem/external_slave.cc @@ -178,13 +178,13 @@ ExternalSlave::ExternalPort::getAddrRanges() const return owner.addrRanges; } -ExternalSlave::ExternalSlave(ExternalSlaveParams *params) : +ExternalSlave::ExternalSlave(const ExternalSlaveParams ¶ms) : SimObject(params), externalPort(NULL), - portName(params->name + ".port"), - portType(params->port_type), - portData(params->port_data), - addrRanges(params->addr_ranges.begin(), params->addr_ranges.end()) + portName(params.name + ".port"), + portType(params.port_type), + portData(params.port_data), + addrRanges(params.addr_ranges.begin(), params.addr_ranges.end()) { /* Register the stub handler if it hasn't already been registered */ if (portHandlers.find("stub") == portHandlers.end()) @@ -231,9 +231,9 @@ ExternalSlave::init() } ExternalSlave * -ExternalSlaveParams::create() +ExternalSlaveParams::create() const { - return new ExternalSlave(this); + return new ExternalSlave(*this); } void diff --git a/src/mem/external_slave.hh b/src/mem/external_slave.hh index c0f01f85e..ebb355475 100644 --- a/src/mem/external_slave.hh +++ b/src/mem/external_slave.hh @@ -123,7 +123,7 @@ class ExternalSlave : public SimObject static std::map portHandlers; public: - ExternalSlave(ExternalSlaveParams *params); + ExternalSlave(const ExternalSlaveParams ¶ms); /** Port interface. Responds only to port "port" */ Port &getPort(const std::string &if_name, diff --git a/src/mem/hmc_controller.cc b/src/mem/hmc_controller.cc index 20f672535..55017dad1 100644 --- a/src/mem/hmc_controller.cc +++ b/src/mem/hmc_controller.cc @@ -4,18 +4,18 @@ #include "base/trace.hh" #include "debug/HMCController.hh" -HMCController::HMCController(const HMCControllerParams* p) : +HMCController::HMCController(const HMCControllerParams &p) : NoncoherentXBar(p), - numMemSidePorts(p->port_mem_side_ports_connection_count), + numMemSidePorts(p.port_mem_side_ports_connection_count), rr_counter(0) { - assert(p->port_cpu_side_ports_connection_count == 1); + assert(p.port_cpu_side_ports_connection_count == 1); } HMCController* -HMCControllerParams::create() +HMCControllerParams::create() const { - return new HMCController(this); + return new HMCController(*this); } // Since this module is a load distributor, all its request ports have the same diff --git a/src/mem/hmc_controller.hh b/src/mem/hmc_controller.hh index 8206ee007..8474277ed 100644 --- a/src/mem/hmc_controller.hh +++ b/src/mem/hmc_controller.hh @@ -74,7 +74,7 @@ class HMCController : public NoncoherentXBar { public: - HMCController(const HMCControllerParams *p); + HMCController(const HMCControllerParams &p); private: diff --git a/src/mem/mem_checker.cc b/src/mem/mem_checker.cc index 79e523624..c6d916420 100644 --- a/src/mem/mem_checker.cc +++ b/src/mem/mem_checker.cc @@ -345,7 +345,7 @@ MemChecker::reset(Addr addr, size_t size) } MemChecker* -MemCheckerParams::create() +MemCheckerParams::create() const { - return new MemChecker(this); + return new MemChecker(*this); } diff --git a/src/mem/mem_checker.hh b/src/mem/mem_checker.hh index f82538f48..41aa691e7 100644 --- a/src/mem/mem_checker.hh +++ b/src/mem/mem_checker.hh @@ -369,7 +369,7 @@ class MemChecker : public SimObject public: - MemChecker(const MemCheckerParams *p) + MemChecker(const MemCheckerParams &p) : SimObject(p), nextSerial(SERIAL_INITIAL) {} diff --git a/src/mem/mem_checker_monitor.cc b/src/mem/mem_checker_monitor.cc index 82ca83b09..6a975f37a 100644 --- a/src/mem/mem_checker_monitor.cc +++ b/src/mem/mem_checker_monitor.cc @@ -44,21 +44,21 @@ #include "base/trace.hh" #include "debug/MemCheckerMonitor.hh" -MemCheckerMonitor::MemCheckerMonitor(Params* params) +MemCheckerMonitor::MemCheckerMonitor(const Params ¶ms) : SimObject(params), memSidePort(name() + "-memSidePort", *this), cpuSidePort(name() + "-cpuSidePort", *this), - warnOnly(params->warn_only), - memchecker(params->memchecker) + warnOnly(params.warn_only), + memchecker(params.memchecker) {} MemCheckerMonitor::~MemCheckerMonitor() {} MemCheckerMonitor* -MemCheckerMonitorParams::create() +MemCheckerMonitorParams::create() const { - return new MemCheckerMonitor(this); + return new MemCheckerMonitor(*this); } void diff --git a/src/mem/mem_checker_monitor.hh b/src/mem/mem_checker_monitor.hh index 8e5dab1a2..6092fe721 100644 --- a/src/mem/mem_checker_monitor.hh +++ b/src/mem/mem_checker_monitor.hh @@ -53,15 +53,18 @@ class MemCheckerMonitor : public SimObject /** Parameters of memchecker monitor */ typedef MemCheckerMonitorParams Params; - const Params* params() const - { return reinterpret_cast(_params); } + const Params & + params() const + { + return reinterpret_cast(_params); + } /** * Constructor based on the Python params * * @param params Python parameters */ - MemCheckerMonitor(Params* params); + MemCheckerMonitor(const Params ¶ms); /** Destructor */ ~MemCheckerMonitor(); diff --git a/src/mem/mem_ctrl.cc b/src/mem/mem_ctrl.cc index 1c0d4b1b6..76d2e9759 100644 --- a/src/mem/mem_ctrl.cc +++ b/src/mem/mem_ctrl.cc @@ -51,32 +51,32 @@ using namespace std; -MemCtrl::MemCtrl(const MemCtrlParams* p) : +MemCtrl::MemCtrl(const MemCtrlParams &p) : QoS::MemCtrl(p), port(name() + ".port", *this), isTimingMode(false), retryRdReq(false), retryWrReq(false), nextReqEvent([this]{ processNextReqEvent(); }, name()), respondEvent([this]{ processRespondEvent(); }, name()), - dram(p->dram), nvm(p->nvm), + dram(p.dram), nvm(p.nvm), readBufferSize((dram ? dram->readBufferSize : 0) + (nvm ? nvm->readBufferSize : 0)), writeBufferSize((dram ? dram->writeBufferSize : 0) + (nvm ? nvm->writeBufferSize : 0)), - writeHighThreshold(writeBufferSize * p->write_high_thresh_perc / 100.0), - writeLowThreshold(writeBufferSize * p->write_low_thresh_perc / 100.0), - minWritesPerSwitch(p->min_writes_per_switch), + writeHighThreshold(writeBufferSize * p.write_high_thresh_perc / 100.0), + writeLowThreshold(writeBufferSize * p.write_low_thresh_perc / 100.0), + minWritesPerSwitch(p.min_writes_per_switch), writesThisTime(0), readsThisTime(0), - memSchedPolicy(p->mem_sched_policy), - frontendLatency(p->static_frontend_latency), - backendLatency(p->static_backend_latency), - commandWindow(p->command_window), + memSchedPolicy(p.mem_sched_policy), + frontendLatency(p.static_frontend_latency), + backendLatency(p.static_backend_latency), + commandWindow(p.command_window), nextBurstAt(0), prevArrival(0), nextReqTime(0), stats(*this) { DPRINTF(MemCtrl, "Setting up controller\n"); - readQueue.resize(p->qos_priorities); - writeQueue.resize(p->qos_priorities); + readQueue.resize(p.qos_priorities); + writeQueue.resize(p.qos_priorities); // Hook up interfaces to the controller if (dram) @@ -87,10 +87,10 @@ MemCtrl::MemCtrl(const MemCtrlParams* p) : fatal_if(!dram && !nvm, "Memory controller must have an interface"); // perform a basic check of the write thresholds - if (p->write_low_thresh_perc >= p->write_high_thresh_perc) + if (p.write_low_thresh_perc >= p.write_high_thresh_perc) fatal("Write buffer low threshold %d must be smaller than the " - "high threshold %d\n", p->write_low_thresh_perc, - p->write_high_thresh_perc); + "high threshold %d\n", p.write_low_thresh_perc, + p.write_high_thresh_perc); } void @@ -1469,7 +1469,7 @@ MemCtrl::MemoryPort::recvTimingReq(PacketPtr pkt) } MemCtrl* -MemCtrlParams::create() +MemCtrlParams::create() const { - return new MemCtrl(this); + return new MemCtrl(*this); } diff --git a/src/mem/mem_ctrl.hh b/src/mem/mem_ctrl.hh index 2e3cf8c6a..e6ae0abe3 100644 --- a/src/mem/mem_ctrl.hh +++ b/src/mem/mem_ctrl.hh @@ -609,7 +609,7 @@ class MemCtrl : public QoS::MemCtrl public: - MemCtrl(const MemCtrlParams* p); + MemCtrl(const MemCtrlParams &p); /** * Ensure that all interfaced have drained commands diff --git a/src/mem/mem_delay.cc b/src/mem/mem_delay.cc index 8120a99d6..f51dd2fe6 100644 --- a/src/mem/mem_delay.cc +++ b/src/mem/mem_delay.cc @@ -40,7 +40,7 @@ #include "params/MemDelay.hh" #include "params/SimpleMemDelay.hh" -MemDelay::MemDelay(const MemDelayParams *p) +MemDelay::MemDelay(const MemDelayParams &p) : ClockedObject(p), requestPort(name() + "-mem_side_port", *this), responsePort(name() + "-cpu_side_port", *this), @@ -177,12 +177,12 @@ MemDelay::ResponsePort::recvTimingSnoopResp(PacketPtr pkt) -SimpleMemDelay::SimpleMemDelay(const SimpleMemDelayParams *p) +SimpleMemDelay::SimpleMemDelay(const SimpleMemDelayParams &p) : MemDelay(p), - readReqDelay(p->read_req), - readRespDelay(p->read_resp), - writeReqDelay(p->write_req), - writeRespDelay(p->write_resp) + readReqDelay(p.read_req), + readRespDelay(p.read_resp), + writeReqDelay(p.write_req), + writeRespDelay(p.write_resp) { } @@ -212,7 +212,7 @@ SimpleMemDelay::delayResp(PacketPtr pkt) SimpleMemDelay * -SimpleMemDelayParams::create() +SimpleMemDelayParams::create() const { - return new SimpleMemDelay(this); + return new SimpleMemDelay(*this); } diff --git a/src/mem/mem_delay.hh b/src/mem/mem_delay.hh index 50929eaf5..9bdb3c330 100644 --- a/src/mem/mem_delay.hh +++ b/src/mem/mem_delay.hh @@ -63,7 +63,7 @@ class MemDelay : public ClockedObject { public: - MemDelay(const MemDelayParams *params); + MemDelay(const MemDelayParams ¶ms); void init() override; @@ -163,7 +163,7 @@ class MemDelay : public ClockedObject class SimpleMemDelay : public MemDelay { public: - SimpleMemDelay(const SimpleMemDelayParams *params); + SimpleMemDelay(const SimpleMemDelayParams ¶ms); protected: Tick delayReq(PacketPtr pkt) override; diff --git a/src/mem/mem_interface.cc b/src/mem/mem_interface.cc index d65c5d9db..8aa8cef88 100644 --- a/src/mem/mem_interface.cc +++ b/src/mem/mem_interface.cc @@ -51,25 +51,25 @@ using namespace std; using namespace Data; -MemInterface::MemInterface(const MemInterfaceParams* _p) +MemInterface::MemInterface(const MemInterfaceParams &_p) : AbstractMemory(_p), - addrMapping(_p->addr_mapping), - burstSize((_p->devices_per_rank * _p->burst_length * - _p->device_bus_width) / 8), - deviceSize(_p->device_size), - deviceRowBufferSize(_p->device_rowbuffer_size), - devicesPerRank(_p->devices_per_rank), + addrMapping(_p.addr_mapping), + burstSize((_p.devices_per_rank * _p.burst_length * + _p.device_bus_width) / 8), + deviceSize(_p.device_size), + deviceRowBufferSize(_p.device_rowbuffer_size), + devicesPerRank(_p.devices_per_rank), rowBufferSize(devicesPerRank * deviceRowBufferSize), burstsPerRowBuffer(rowBufferSize / burstSize), burstsPerStripe(range.interleaved() ? range.granularity() / burstSize : 1), - ranksPerChannel(_p->ranks_per_channel), - banksPerRank(_p->banks_per_rank), rowsPerBank(0), - tCK(_p->tCK), tCS(_p->tCS), tBURST(_p->tBURST), - tRTW(_p->tRTW), - tWTR(_p->tWTR), - readBufferSize(_p->read_buffer_size), - writeBufferSize(_p->write_buffer_size) + ranksPerChannel(_p.ranks_per_channel), + banksPerRank(_p.banks_per_rank), rowsPerBank(0), + tCK(_p.tCK), tCS(_p.tCS), tBURST(_p.tBURST), + tRTW(_p.tRTW), + tWTR(_p.tWTR), + readBufferSize(_p.read_buffer_size), + writeBufferSize(_p.write_buffer_size) {} void @@ -730,28 +730,28 @@ DRAMInterface::addRankToRankDelay(Tick cmd_at) } } -DRAMInterface::DRAMInterface(const DRAMInterfaceParams* _p) +DRAMInterface::DRAMInterface(const DRAMInterfaceParams &_p) : MemInterface(_p), - bankGroupsPerRank(_p->bank_groups_per_rank), - bankGroupArch(_p->bank_groups_per_rank > 0), - tCL(_p->tCL), - tBURST_MIN(_p->tBURST_MIN), tBURST_MAX(_p->tBURST_MAX), - tCCD_L_WR(_p->tCCD_L_WR), tCCD_L(_p->tCCD_L), tRCD(_p->tRCD), - tRP(_p->tRP), tRAS(_p->tRAS), tWR(_p->tWR), tRTP(_p->tRTP), - tRFC(_p->tRFC), tREFI(_p->tREFI), tRRD(_p->tRRD), tRRD_L(_p->tRRD_L), - tPPD(_p->tPPD), tAAD(_p->tAAD), - tXAW(_p->tXAW), tXP(_p->tXP), tXS(_p->tXS), - clkResyncDelay(tCL + _p->tBURST_MAX), - dataClockSync(_p->data_clock_sync), + bankGroupsPerRank(_p.bank_groups_per_rank), + bankGroupArch(_p.bank_groups_per_rank > 0), + tCL(_p.tCL), + tBURST_MIN(_p.tBURST_MIN), tBURST_MAX(_p.tBURST_MAX), + tCCD_L_WR(_p.tCCD_L_WR), tCCD_L(_p.tCCD_L), tRCD(_p.tRCD), + tRP(_p.tRP), tRAS(_p.tRAS), tWR(_p.tWR), tRTP(_p.tRTP), + tRFC(_p.tRFC), tREFI(_p.tREFI), tRRD(_p.tRRD), tRRD_L(_p.tRRD_L), + tPPD(_p.tPPD), tAAD(_p.tAAD), + tXAW(_p.tXAW), tXP(_p.tXP), tXS(_p.tXS), + clkResyncDelay(tCL + _p.tBURST_MAX), + dataClockSync(_p.data_clock_sync), burstInterleave(tBURST != tBURST_MIN), - twoCycleActivate(_p->two_cycle_activate), - activationLimit(_p->activation_limit), - wrToRdDlySameBG(tCL + _p->tBURST_MAX + _p->tWTR_L), - rdToWrDlySameBG(_p->tRTW + _p->tBURST_MAX), - pageMgmt(_p->page_policy), - maxAccessesPerRow(_p->max_accesses_per_row), + twoCycleActivate(_p.two_cycle_activate), + activationLimit(_p.activation_limit), + wrToRdDlySameBG(tCL + _p.tBURST_MAX + _p.tWTR_L), + rdToWrDlySameBG(_p.tRTW + _p.tBURST_MAX), + pageMgmt(_p.page_policy), + maxAccessesPerRow(_p.max_accesses_per_row), timeStampOffset(0), activeRank(0), - enableDRAMPowerdown(_p->enable_dram_powerdown), + enableDRAMPowerdown(_p.enable_dram_powerdown), lastStatsResetTick(0), stats(*this) { @@ -1119,20 +1119,20 @@ DRAMInterface::minBankPrep(const MemPacketQueue& queue, } DRAMInterface* -DRAMInterfaceParams::create() +DRAMInterfaceParams::create() const { - return new DRAMInterface(this); + return new DRAMInterface(*this); } -DRAMInterface::Rank::Rank(const DRAMInterfaceParams* _p, +DRAMInterface::Rank::Rank(const DRAMInterfaceParams &_p, int _rank, DRAMInterface& _dram) : EventManager(&_dram), dram(_dram), pwrStateTrans(PWR_IDLE), pwrStatePostRefresh(PWR_IDLE), pwrStateTick(0), refreshDueAt(0), pwrState(PWR_IDLE), refreshState(REF_IDLE), inLowPowerState(false), rank(_rank), readEntries(0), writeEntries(0), outstandingEvents(0), - wakeUpAllowedAt(0), power(_p, false), banks(_p->banks_per_rank), - numBanksActive(0), actTicks(_p->activation_limit, 0), lastBurstTick(0), + wakeUpAllowedAt(0), power(_p, false), banks(_p.banks_per_rank), + numBanksActive(0), actTicks(_p.activation_limit, 0), lastBurstTick(0), writeDoneEvent([this]{ processWriteDoneEvent(); }, name()), activateEvent([this]{ processActivateEvent(); }, name()), prechargeEvent([this]{ processPrechargeEvent(); }, name()), @@ -1141,12 +1141,12 @@ DRAMInterface::Rank::Rank(const DRAMInterfaceParams* _p, wakeUpEvent([this]{ processWakeUpEvent(); }, name()), stats(_dram, *this) { - for (int b = 0; b < _p->banks_per_rank; b++) { + for (int b = 0; b < _p.banks_per_rank; b++) { banks[b].bank = b; // GDDR addressing of banks to BG is linear. // Here we assume that all DRAM generations address bank groups as // follows: - if (_p->bank_groups_per_rank > 0) { + if (_p.bank_groups_per_rank > 0) { // Simply assign lower bits to bank group in order to // rotate across bank groups as banks are incremented // e.g. with 4 banks per bank group and 16 banks total: @@ -1154,7 +1154,7 @@ DRAMInterface::Rank::Rank(const DRAMInterfaceParams* _p, // banks 1,5,9,13 are in bank group 1 // banks 2,6,10,14 are in bank group 2 // banks 3,7,11,15 are in bank group 3 - banks[b].bankgr = b % _p->bank_groups_per_rank; + banks[b].bankgr = b % _p.bank_groups_per_rank; } else { // No bank groups; simply assign to bank number banks[b].bankgr = b; @@ -1996,12 +1996,12 @@ DRAMInterface::RankStats::preDumpStats() rank.computeStats(); } -NVMInterface::NVMInterface(const NVMInterfaceParams* _p) +NVMInterface::NVMInterface(const NVMInterfaceParams &_p) : MemInterface(_p), - maxPendingWrites(_p->max_pending_writes), - maxPendingReads(_p->max_pending_reads), - twoCycleRdWr(_p->two_cycle_rdwr), - tREAD(_p->tREAD), tWRITE(_p->tWRITE), tSEND(_p->tSEND), + maxPendingWrites(_p.max_pending_writes), + maxPendingReads(_p.max_pending_reads), + twoCycleRdWr(_p.two_cycle_rdwr), + tREAD(_p.tREAD), tWRITE(_p.tWRITE), tSEND(_p.tSEND), stats(*this), writeRespondEvent([this]{ processWriteRespondEvent(); }, name()), readReadyEvent([this]{ processReadReadyEvent(); }, name()), @@ -2036,16 +2036,16 @@ NVMInterface::NVMInterface(const NVMInterfaceParams* _p) } NVMInterface* -NVMInterfaceParams::create() +NVMInterfaceParams::create() const { - return new NVMInterface(this); + return new NVMInterface(*this); } -NVMInterface::Rank::Rank(const NVMInterfaceParams* _p, +NVMInterface::Rank::Rank(const NVMInterfaceParams &_p, int _rank, NVMInterface& _nvm) - : EventManager(&_nvm), rank(_rank), banks(_p->banks_per_rank) + : EventManager(&_nvm), rank(_rank), banks(_p.banks_per_rank) { - for (int b = 0; b < _p->banks_per_rank; b++) { + for (int b = 0; b < _p.banks_per_rank; b++) { banks[b].bank = b; // No bank groups; simply assign to bank number banks[b].bankgr = b; diff --git a/src/mem/mem_interface.hh b/src/mem/mem_interface.hh index 9f5fbc496..d1bf671e8 100644 --- a/src/mem/mem_interface.hh +++ b/src/mem/mem_interface.hh @@ -289,7 +289,7 @@ class MemInterface : public AbstractMemory virtual void addRankToRankDelay(Tick cmd_at) = 0; typedef MemInterfaceParams Params; - MemInterface(const Params* _p); + MemInterface(const Params &_p); }; /** @@ -583,7 +583,7 @@ class DRAMInterface : public MemInterface */ Tick lastBurstTick; - Rank(const DRAMInterfaceParams* _p, int _rank, + Rank(const DRAMInterfaceParams &_p, int _rank, DRAMInterface& _dram); const std::string name() const { return csprintf("%d", rank); } @@ -1009,7 +1009,7 @@ class DRAMInterface : public MemInterface */ void checkRefreshState(uint8_t rank); - DRAMInterface(const DRAMInterfaceParams* _p); + DRAMInterface(const DRAMInterfaceParams &_p); }; /** @@ -1039,7 +1039,7 @@ class NVMInterface : public MemInterface */ std::vector banks; - Rank(const NVMInterfaceParams* _p, int _rank, + Rank(const NVMInterfaceParams &_p, int _rank, NVMInterface& _nvm); }; @@ -1256,7 +1256,7 @@ class NVMInterface : public MemInterface std::pair doBurstAccess(MemPacket* pkt, Tick next_burst_at); - NVMInterface(const NVMInterfaceParams* _p); + NVMInterface(const NVMInterfaceParams &_p); }; #endif //__MEM_INTERFACE_HH__ diff --git a/src/mem/mem_object.hh b/src/mem/mem_object.hh index 522083619..916eb264f 100644 --- a/src/mem/mem_object.hh +++ b/src/mem/mem_object.hh @@ -57,7 +57,7 @@ class MemObject : public ClockedObject public: [[deprecated( "MemObject is deprecated. Use ClockedObject or SimObject instead")]] - MemObject(const MemObjectParams *params) : ClockedObject(params) + MemObject(const MemObjectParams ¶ms) : ClockedObject(params) {} }; diff --git a/src/mem/noncoherent_xbar.cc b/src/mem/noncoherent_xbar.cc index 72d894fbb..2b82ca784 100644 --- a/src/mem/noncoherent_xbar.cc +++ b/src/mem/noncoherent_xbar.cc @@ -50,13 +50,13 @@ #include "debug/NoncoherentXBar.hh" #include "debug/XBar.hh" -NoncoherentXBar::NoncoherentXBar(const NoncoherentXBarParams *p) +NoncoherentXBar::NoncoherentXBar(const NoncoherentXBarParams &p) : BaseXBar(p) { // create the ports based on the size of the memory-side port and // CPU-side port vector ports, and the presence of the default port, // the ports are enumerated starting from zero - for (int i = 0; i < p->port_mem_side_ports_connection_count; ++i) { + for (int i = 0; i < p.port_mem_side_ports_connection_count; ++i) { std::string portName = csprintf("%s.mem_side_port[%d]", name(), i); RequestPort* bp = new NoncoherentXBarRequestPort(portName, *this, i); memSidePorts.push_back(bp); @@ -66,7 +66,7 @@ NoncoherentXBar::NoncoherentXBar(const NoncoherentXBarParams *p) // see if we have a default CPU-side-port device connected and if so add // our corresponding memory-side port - if (p->port_default_connection_count) { + if (p.port_default_connection_count) { defaultPortID = memSidePorts.size(); std::string portName = name() + ".default"; RequestPort* bp = new NoncoherentXBarRequestPort(portName, *this, @@ -77,7 +77,7 @@ NoncoherentXBar::NoncoherentXBar(const NoncoherentXBarParams *p) } // create the CPU-side ports, once again starting at zero - for (int i = 0; i < p->port_cpu_side_ports_connection_count; ++i) { + for (int i = 0; i < p.port_cpu_side_ports_connection_count; ++i) { std::string portName = csprintf("%s.cpu_side_ports[%d]", name(), i); QueuedResponsePort* bp = new NoncoherentXBarResponsePort(portName, *this, i); @@ -312,7 +312,7 @@ NoncoherentXBar::recvFunctional(PacketPtr pkt, PortID cpu_side_port_id) } NoncoherentXBar* -NoncoherentXBarParams::create() +NoncoherentXBarParams::create() const { - return new NoncoherentXBar(this); + return new NoncoherentXBar(*this); } diff --git a/src/mem/noncoherent_xbar.hh b/src/mem/noncoherent_xbar.hh index c2fd95ae3..dc527dd86 100644 --- a/src/mem/noncoherent_xbar.hh +++ b/src/mem/noncoherent_xbar.hh @@ -179,7 +179,7 @@ class NoncoherentXBar : public BaseXBar public: - NoncoherentXBar(const NoncoherentXBarParams *p); + NoncoherentXBar(const NoncoherentXBarParams &p); virtual ~NoncoherentXBar(); }; diff --git a/src/mem/probes/base.cc b/src/mem/probes/base.cc index 86a805fc0..7ea63dc43 100644 --- a/src/mem/probes/base.cc +++ b/src/mem/probes/base.cc @@ -39,7 +39,7 @@ #include "params/BaseMemProbe.hh" -BaseMemProbe::BaseMemProbe(BaseMemProbeParams *p) +BaseMemProbe::BaseMemProbe(const BaseMemProbeParams &p) : SimObject(p) { } @@ -47,13 +47,12 @@ BaseMemProbe::BaseMemProbe(BaseMemProbeParams *p) void BaseMemProbe::regProbeListeners() { - const BaseMemProbeParams *p( - dynamic_cast(params())); - assert(p); + const BaseMemProbeParams &p = + dynamic_cast(params()); - listeners.resize(p->manager.size()); - for (int i = 0; i < p->manager.size(); i++) { - ProbeManager *const mgr(p->manager[i]->getProbeManager()); - listeners[i].reset(new PacketListener(*this, mgr, p->probe_name)); + listeners.resize(p.manager.size()); + for (int i = 0; i < p.manager.size(); i++) { + ProbeManager *const mgr(p.manager[i]->getProbeManager()); + listeners[i].reset(new PacketListener(*this, mgr, p.probe_name)); } } diff --git a/src/mem/probes/base.hh b/src/mem/probes/base.hh index 2030ce561..64b8a56bc 100644 --- a/src/mem/probes/base.hh +++ b/src/mem/probes/base.hh @@ -61,7 +61,7 @@ struct BaseMemProbeParams; class BaseMemProbe : public SimObject { public: - BaseMemProbe(BaseMemProbeParams *params); + BaseMemProbe(const BaseMemProbeParams ¶ms); void regProbeListeners() override; diff --git a/src/mem/probes/mem_footprint.cc b/src/mem/probes/mem_footprint.cc index 970756803..eb684a75e 100644 --- a/src/mem/probes/mem_footprint.cc +++ b/src/mem/probes/mem_footprint.cc @@ -41,21 +41,21 @@ #include "base/intmath.hh" #include "params/MemFootprintProbe.hh" -MemFootprintProbe::MemFootprintProbe(MemFootprintProbeParams *p) +MemFootprintProbe::MemFootprintProbe(const MemFootprintProbeParams &p) : BaseMemProbe(p), - cacheLineSizeLg2(floorLog2(p->system->cacheLineSize())), - pageSizeLg2(floorLog2(p->page_size)), - totalCacheLinesInMem(p->system->memSize() / p->system->cacheLineSize()), - totalPagesInMem(p->system->memSize() / p->page_size), + cacheLineSizeLg2(floorLog2(p.system->cacheLineSize())), + pageSizeLg2(floorLog2(p.page_size)), + totalCacheLinesInMem(p.system->memSize() / p.system->cacheLineSize()), + totalPagesInMem(p.system->memSize() / p.page_size), cacheLines(), cacheLinesAll(), pages(), pagesAll(), - system(p->system) + system(p.system) { fatal_if(!isPowerOf2(system->cacheLineSize()), "MemFootprintProbe expects cache line size is power of 2."); - fatal_if(!isPowerOf2(p->page_size), + fatal_if(!isPowerOf2(p.page_size), "MemFootprintProbe expects page size parameter is power of 2"); } @@ -122,7 +122,7 @@ MemFootprintProbe::statReset() } MemFootprintProbe * -MemFootprintProbeParams::create() +MemFootprintProbeParams::create() const { - return new MemFootprintProbe(this); + return new MemFootprintProbe(*this); } diff --git a/src/mem/probes/mem_footprint.hh b/src/mem/probes/mem_footprint.hh index a08a4b58c..71438c05d 100644 --- a/src/mem/probes/mem_footprint.hh +++ b/src/mem/probes/mem_footprint.hh @@ -56,7 +56,7 @@ class MemFootprintProbe : public BaseMemProbe public: typedef std::unordered_set AddrSet; - MemFootprintProbe(MemFootprintProbeParams *p); + MemFootprintProbe(const MemFootprintProbeParams &p); void regStats() override; // Fix footprint tracking state on stat reset void statReset(); diff --git a/src/mem/probes/mem_trace.cc b/src/mem/probes/mem_trace.cc index dbfb685bc..351b2da32 100644 --- a/src/mem/probes/mem_trace.cc +++ b/src/mem/probes/mem_trace.cc @@ -43,22 +43,22 @@ #include "proto/packet.pb.h" #include "sim/system.hh" -MemTraceProbe::MemTraceProbe(MemTraceProbeParams *p) +MemTraceProbe::MemTraceProbe(const MemTraceProbeParams &p) : BaseMemProbe(p), traceStream(nullptr), - system(p->system), - withPC(p->with_pc) + system(p.system), + withPC(p.with_pc) { std::string filename; - if (p->trace_file != "") { + if (p.trace_file != "") { // If the trace file is not specified as an absolute path, // append the current simulation output directory - filename = simout.resolve(p->trace_file); + filename = simout.resolve(p.trace_file); const std::string suffix = ".gz"; // If trace_compress has been set, check the suffix. Append // accordingly. - if (p->trace_compress && + if (p.trace_compress && filename.compare(filename.size() - suffix.size(), suffix.size(), suffix) != 0) filename = filename + suffix; @@ -66,7 +66,7 @@ MemTraceProbe::MemTraceProbe(MemTraceProbeParams *p) // Generate a filename from the name of the SimObject. Append .trc // and .gz if we want compression enabled. filename = simout.resolve(name() + ".trc" + - (p->trace_compress ? ".gz" : "")); + (p.trace_compress ? ".gz" : "")); } traceStream = new ProtoOutputStream(filename); @@ -121,7 +121,7 @@ MemTraceProbe::handleRequest(const ProbePoints::PacketInfo &pkt_info) MemTraceProbe * -MemTraceProbeParams::create() +MemTraceProbeParams::create() const { - return new MemTraceProbe(this); + return new MemTraceProbe(*this); } diff --git a/src/mem/probes/mem_trace.hh b/src/mem/probes/mem_trace.hh index 40ac7d91d..84be9cba1 100644 --- a/src/mem/probes/mem_trace.hh +++ b/src/mem/probes/mem_trace.hh @@ -48,7 +48,7 @@ class System; class MemTraceProbe : public BaseMemProbe { public: - MemTraceProbe(MemTraceProbeParams *params); + MemTraceProbe(const MemTraceProbeParams ¶ms); protected: void handleRequest(const ProbePoints::PacketInfo &pkt_info) override; diff --git a/src/mem/probes/stack_dist.cc b/src/mem/probes/stack_dist.cc index 57270b00c..ec2be989f 100644 --- a/src/mem/probes/stack_dist.cc +++ b/src/mem/probes/stack_dist.cc @@ -40,14 +40,14 @@ #include "params/StackDistProbe.hh" #include "sim/system.hh" -StackDistProbe::StackDistProbe(StackDistProbeParams *p) +StackDistProbe::StackDistProbe(const StackDistProbeParams &p) : BaseMemProbe(p), - lineSize(p->line_size), - disableLinearHists(p->disable_linear_hists), - disableLogHists(p->disable_log_hists), - calc(p->verify) + lineSize(p.line_size), + disableLinearHists(p.disable_linear_hists), + disableLogHists(p.disable_log_hists), + calc(p.verify) { - fatal_if(p->system->cacheLineSize() > p->line_size, + fatal_if(p.system->cacheLineSize() > p.line_size, "The stack distance probe must use a cache line size that is " "larger or equal to the system's cahce line size."); } @@ -57,32 +57,31 @@ StackDistProbe::regStats() { BaseMemProbe::regStats(); - const StackDistProbeParams *p( - dynamic_cast(params())); - assert(p); + const StackDistProbeParams &p = + dynamic_cast(params()); using namespace Stats; readLinearHist - .init(p->linear_hist_bins) + .init(p.linear_hist_bins) .name(name() + ".readLinearHist") .desc("Reads linear distribution") .flags(disableLinearHists ? nozero : pdf); readLogHist - .init(p->log_hist_bins) + .init(p.log_hist_bins) .name(name() + ".readLogHist") .desc("Reads logarithmic distribution") .flags(disableLogHists ? nozero : pdf); writeLinearHist - .init(p->linear_hist_bins) + .init(p.linear_hist_bins) .name(name() + ".writeLinearHist") .desc("Writes linear distribution") .flags(disableLinearHists ? nozero : pdf); writeLogHist - .init(p->log_hist_bins) + .init(p.log_hist_bins) .name(name() + ".writeLogHist") .desc("Writes logarithmic distribution") .flags(disableLogHists ? nozero : pdf); @@ -132,7 +131,7 @@ StackDistProbe::handleRequest(const ProbePoints::PacketInfo &pkt_info) StackDistProbe * -StackDistProbeParams::create() +StackDistProbeParams::create() const { - return new StackDistProbe(this); + return new StackDistProbe(*this); } diff --git a/src/mem/probes/stack_dist.hh b/src/mem/probes/stack_dist.hh index 7b9d0cdd8..4a6ae547d 100644 --- a/src/mem/probes/stack_dist.hh +++ b/src/mem/probes/stack_dist.hh @@ -48,7 +48,7 @@ struct StackDistProbeParams; class StackDistProbe : public BaseMemProbe { public: - StackDistProbe(StackDistProbeParams *params); + StackDistProbe(const StackDistProbeParams ¶ms); void regStats() override; diff --git a/src/mem/qos/mem_ctrl.cc b/src/mem/qos/mem_ctrl.cc index b5caf6ef6..352d40a16 100644 --- a/src/mem/qos/mem_ctrl.cc +++ b/src/mem/qos/mem_ctrl.cc @@ -41,18 +41,18 @@ namespace QoS { -MemCtrl::MemCtrl(const QoSMemCtrlParams * p) +MemCtrl::MemCtrl(const QoSMemCtrlParams &p) : ClockedObject(p), - policy(p->qos_policy), - turnPolicy(p->qos_turnaround_policy), + policy(p.qos_policy), + turnPolicy(p.qos_turnaround_policy), queuePolicy(QueuePolicy::create(p)), - _numPriorities(p->qos_priorities), - qosPriorityEscalation(p->qos_priority_escalation), - qosSyncroScheduler(p->qos_syncro_scheduler), + _numPriorities(p.qos_priorities), + qosPriorityEscalation(p.qos_priority_escalation), + qosSyncroScheduler(p.qos_syncro_scheduler), totalReadQueueSize(0), totalWriteQueueSize(0), busState(READ), busStateNext(READ), stats(*this), - _system(p->system) + _system(p.system) { // Set the priority policy if (policy) { diff --git a/src/mem/qos/mem_ctrl.hh b/src/mem/qos/mem_ctrl.hh index d472f200e..02954d20d 100644 --- a/src/mem/qos/mem_ctrl.hh +++ b/src/mem/qos/mem_ctrl.hh @@ -264,7 +264,7 @@ class MemCtrl : public ClockedObject * * @param p pointer to QoSMemCtrl parameters */ - MemCtrl(const QoSMemCtrlParams*); + MemCtrl(const QoSMemCtrlParams &); virtual ~MemCtrl(); diff --git a/src/mem/qos/mem_sink.cc b/src/mem/qos/mem_sink.cc index e931429a8..db4f881e0 100644 --- a/src/mem/qos/mem_sink.cc +++ b/src/mem/qos/mem_sink.cc @@ -45,13 +45,13 @@ namespace QoS { -MemSinkCtrl::MemSinkCtrl(const QoSMemSinkCtrlParams* p) - : MemCtrl(p), requestLatency(p->request_latency), - responseLatency(p->response_latency), - memoryPacketSize(p->memory_packet_size), - readBufferSize(p->read_buffer_size), - writeBufferSize(p->write_buffer_size), port(name() + ".port", *this), - interface(p->interface), +MemSinkCtrl::MemSinkCtrl(const QoSMemSinkCtrlParams &p) + : MemCtrl(p), requestLatency(p.request_latency), + responseLatency(p.response_latency), + memoryPacketSize(p.memory_packet_size), + readBufferSize(p.read_buffer_size), + writeBufferSize(p.write_buffer_size), port(name() + ".port", *this), + interface(p.interface), retryRdReq(false), retryWrReq(false), nextRequest(0), nextReqEvent(this) { // Resize read and write queue to allocate space @@ -390,18 +390,18 @@ MemSinkCtrl::MemoryPort::recvTimingReq(PacketPtr pkt) } // namespace QoS QoS::MemSinkCtrl* -QoSMemSinkCtrlParams::create() +QoSMemSinkCtrlParams::create() const { - return new QoS::MemSinkCtrl(this); + return new QoS::MemSinkCtrl(*this); } -QoSMemSinkInterface::QoSMemSinkInterface(const QoSMemSinkInterfaceParams* _p) +QoSMemSinkInterface::QoSMemSinkInterface(const QoSMemSinkInterfaceParams &_p) : AbstractMemory(_p) { } QoSMemSinkInterface* -QoSMemSinkInterfaceParams::create() +QoSMemSinkInterfaceParams::create() const { - return new QoSMemSinkInterface(this); + return new QoSMemSinkInterface(*this); } diff --git a/src/mem/qos/mem_sink.hh b/src/mem/qos/mem_sink.hh index 93783ae10..e9c3e7416 100644 --- a/src/mem/qos/mem_sink.hh +++ b/src/mem/qos/mem_sink.hh @@ -124,7 +124,7 @@ class MemSinkCtrl : public MemCtrl * * @param p QoS Memory Sink configuration parameters */ - MemSinkCtrl(const QoSMemSinkCtrlParams*); + MemSinkCtrl(const QoSMemSinkCtrlParams &); virtual ~MemSinkCtrl(); @@ -262,7 +262,7 @@ class QoSMemSinkInterface : public AbstractMemory /** Pointer to the controller */ QoS::MemSinkCtrl* ctrl; - QoSMemSinkInterface(const QoSMemSinkInterfaceParams* _p); + QoSMemSinkInterface(const QoSMemSinkInterfaceParams &_p); }; diff --git a/src/mem/qos/policy.cc b/src/mem/qos/policy.cc index 93c841d27..c864cf9c6 100644 --- a/src/mem/qos/policy.cc +++ b/src/mem/qos/policy.cc @@ -41,7 +41,7 @@ namespace QoS { -Policy::Policy(const Params* p) +Policy::Policy(const Params &p) : SimObject(p) {} diff --git a/src/mem/qos/policy.hh b/src/mem/qos/policy.hh index 7bf6c128b..d7e396725 100644 --- a/src/mem/qos/policy.hh +++ b/src/mem/qos/policy.hh @@ -59,7 +59,7 @@ class Policy : public SimObject { public: using Params = QoSPolicyParams; - Policy(const Params* p); + Policy(const Params &p); virtual ~Policy(); diff --git a/src/mem/qos/policy_fixed_prio.cc b/src/mem/qos/policy_fixed_prio.cc index d00048b0b..124d49a2f 100644 --- a/src/mem/qos/policy_fixed_prio.cc +++ b/src/mem/qos/policy_fixed_prio.cc @@ -46,8 +46,8 @@ namespace QoS { -FixedPriorityPolicy::FixedPriorityPolicy(const Params* p) - : Policy(p), defaultPriority(p->qos_fixed_prio_default_prio) +FixedPriorityPolicy::FixedPriorityPolicy(const Params &p) + : Policy(p), defaultPriority(p.qos_fixed_prio_default_prio) {} FixedPriorityPolicy::~FixedPriorityPolicy() @@ -96,7 +96,7 @@ FixedPriorityPolicy::schedule(const RequestorID id, const uint64_t data) } // namespace QoS QoS::FixedPriorityPolicy * -QoSFixedPriorityPolicyParams::create() +QoSFixedPriorityPolicyParams::create() const { - return new QoS::FixedPriorityPolicy(this); + return new QoS::FixedPriorityPolicy(*this); } diff --git a/src/mem/qos/policy_fixed_prio.hh b/src/mem/qos/policy_fixed_prio.hh index b25c34b35..14b611efc 100644 --- a/src/mem/qos/policy_fixed_prio.hh +++ b/src/mem/qos/policy_fixed_prio.hh @@ -56,7 +56,7 @@ class FixedPriorityPolicy : public Policy using Params = QoSFixedPriorityPolicyParams; public: - FixedPriorityPolicy(const Params*); + FixedPriorityPolicy(const Params &); virtual ~FixedPriorityPolicy(); void init() override; diff --git a/src/mem/qos/policy_pf.cc b/src/mem/qos/policy_pf.cc index 47e2096a5..988749d82 100644 --- a/src/mem/qos/policy_pf.cc +++ b/src/mem/qos/policy_pf.cc @@ -43,8 +43,8 @@ namespace QoS { -PropFairPolicy::PropFairPolicy(const Params* p) - : Policy(p), weight(p->weight) +PropFairPolicy::PropFairPolicy(const Params &p) + : Policy(p), weight(p.weight) { fatal_if(weight < 0 || weight > 1, "weight must be a value between 0 and 1"); @@ -124,7 +124,7 @@ PropFairPolicy::schedule(const RequestorID pkt_id, const uint64_t pkt_size) } // namespace QoS QoS::PropFairPolicy * -QoSPropFairPolicyParams::create() +QoSPropFairPolicyParams::create() const { - return new QoS::PropFairPolicy(this); + return new QoS::PropFairPolicy(*this); } diff --git a/src/mem/qos/policy_pf.hh b/src/mem/qos/policy_pf.hh index 429e85bcb..ec40953e8 100644 --- a/src/mem/qos/policy_pf.hh +++ b/src/mem/qos/policy_pf.hh @@ -59,11 +59,14 @@ namespace QoS { class PropFairPolicy : public Policy { using Params = QoSPropFairPolicyParams; - const Params *params() const - { return static_cast(_params); } + const Params & + params() const + { + return static_cast(_params); + } public: - PropFairPolicy(const Params*); + PropFairPolicy(const Params &); virtual ~PropFairPolicy(); /** diff --git a/src/mem/qos/q_policy.cc b/src/mem/qos/q_policy.cc index df16c5176..6c415b80e 100644 --- a/src/mem/qos/q_policy.cc +++ b/src/mem/qos/q_policy.cc @@ -49,9 +49,9 @@ namespace QoS { QueuePolicy* -QueuePolicy::create(const QoSMemCtrlParams* p) +QueuePolicy::create(const QoSMemCtrlParams &p) { - switch (p->qos_q_policy) { + switch (p.qos_q_policy) { case Enums::QoSQPolicy::fifo: return new FifoQueuePolicy(p); case Enums::QoSQPolicy::lrg: diff --git a/src/mem/qos/q_policy.hh b/src/mem/qos/q_policy.hh index f932b9114..dc412084a 100644 --- a/src/mem/qos/q_policy.hh +++ b/src/mem/qos/q_policy.hh @@ -70,7 +70,7 @@ class QueuePolicy * @param p QoS::MemCtrl parameter variable * @return Pointer to the QueuePolicy */ - static QueuePolicy* create(const QoSMemCtrlParams* p); + static QueuePolicy* create(const QoSMemCtrlParams &p); /** * This method is called by the memory controller after it enqueues a @@ -102,7 +102,7 @@ class QueuePolicy virtual ~QueuePolicy() {}; protected: - QueuePolicy(const QoSMemCtrlParams* p) + QueuePolicy(const QoSMemCtrlParams &p) : memCtrl(nullptr) {} @@ -114,7 +114,7 @@ class QueuePolicy class LifoQueuePolicy : public QueuePolicy { public: - LifoQueuePolicy(const QoSMemCtrlParams* p) + LifoQueuePolicy(const QoSMemCtrlParams &p) : QueuePolicy(p) {} @@ -135,7 +135,7 @@ class LifoQueuePolicy : public QueuePolicy class FifoQueuePolicy : public QueuePolicy { public: - FifoQueuePolicy(const QoSMemCtrlParams* p) + FifoQueuePolicy(const QoSMemCtrlParams &p) : QueuePolicy(p) {} @@ -161,7 +161,7 @@ class FifoQueuePolicy : public QueuePolicy class LrgQueuePolicy : public QueuePolicy { public: - LrgQueuePolicy(const QoSMemCtrlParams* p) + LrgQueuePolicy(const QoSMemCtrlParams &p) : QueuePolicy(p) {} diff --git a/src/mem/qos/turnaround_policy.hh b/src/mem/qos/turnaround_policy.hh index f4e27425b..0b0a571a7 100644 --- a/src/mem/qos/turnaround_policy.hh +++ b/src/mem/qos/turnaround_policy.hh @@ -51,7 +51,7 @@ class TurnaroundPolicy : public SimObject using Params = QoSTurnaroundPolicyParams; public: - TurnaroundPolicy(const Params* p) : SimObject(p) {}; + TurnaroundPolicy(const Params &p) : SimObject(p) {}; virtual ~TurnaroundPolicy() {}; diff --git a/src/mem/qos/turnaround_policy_ideal.cc b/src/mem/qos/turnaround_policy_ideal.cc index 312a7bb24..22b12e084 100644 --- a/src/mem/qos/turnaround_policy_ideal.cc +++ b/src/mem/qos/turnaround_policy_ideal.cc @@ -41,7 +41,7 @@ namespace QoS { -TurnaroundPolicyIdeal::TurnaroundPolicyIdeal(const Params* p) +TurnaroundPolicyIdeal::TurnaroundPolicyIdeal(const Params &p) : TurnaroundPolicy(p) {} @@ -98,7 +98,7 @@ TurnaroundPolicyIdeal::selectBusState() } // namespace QoS QoS::TurnaroundPolicyIdeal * -QoSTurnaroundPolicyIdealParams::create() +QoSTurnaroundPolicyIdealParams::create() const { - return new QoS::TurnaroundPolicyIdeal(this); + return new QoS::TurnaroundPolicyIdeal(*this); } diff --git a/src/mem/qos/turnaround_policy_ideal.hh b/src/mem/qos/turnaround_policy_ideal.hh index 3624dc49c..b8c85c889 100644 --- a/src/mem/qos/turnaround_policy_ideal.hh +++ b/src/mem/qos/turnaround_policy_ideal.hh @@ -53,7 +53,7 @@ namespace QoS { class TurnaroundPolicyIdeal: public TurnaroundPolicy { public: - TurnaroundPolicyIdeal(const Params*); + TurnaroundPolicyIdeal(const Params &); virtual ~TurnaroundPolicyIdeal(); diff --git a/src/mem/ruby/network/BasicLink.cc b/src/mem/ruby/network/BasicLink.cc index b1691cd55..c5311ae02 100644 --- a/src/mem/ruby/network/BasicLink.cc +++ b/src/mem/ruby/network/BasicLink.cc @@ -28,13 +28,13 @@ #include "mem/ruby/network/BasicLink.hh" -BasicLink::BasicLink(const Params *p) +BasicLink::BasicLink(const Params &p) : SimObject(p) { - m_latency = p->latency; - m_bandwidth_factor = p->bandwidth_factor; - m_weight = p->weight; - mVnets = p->supported_vnets; + m_latency = p.latency; + m_bandwidth_factor = p.bandwidth_factor; + m_weight = p.weight; + mVnets = p.supported_vnets; } void @@ -49,29 +49,29 @@ BasicLink::print(std::ostream& out) const } BasicLink * -BasicLinkParams::create() +BasicLinkParams::create() const { - return new BasicLink(this); + return new BasicLink(*this); } -BasicExtLink::BasicExtLink(const Params *p) +BasicExtLink::BasicExtLink(const Params &p) : BasicLink(p) { } BasicExtLink * -BasicExtLinkParams::create() +BasicExtLinkParams::create() const { - return new BasicExtLink(this); + return new BasicExtLink(*this); } -BasicIntLink::BasicIntLink(const Params *p) +BasicIntLink::BasicIntLink(const Params &p) : BasicLink(p) { } BasicIntLink * -BasicIntLinkParams::create() +BasicIntLinkParams::create() const { - return new BasicIntLink(this); + return new BasicIntLink(*this); } diff --git a/src/mem/ruby/network/BasicLink.hh b/src/mem/ruby/network/BasicLink.hh index dfa94b850..b16b53c8d 100644 --- a/src/mem/ruby/network/BasicLink.hh +++ b/src/mem/ruby/network/BasicLink.hh @@ -46,8 +46,8 @@ class BasicLink : public SimObject { public: typedef BasicLinkParams Params; - BasicLink(const Params *p); - const Params *params() const { return (const Params *)_params; } + BasicLink(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } void init(); @@ -71,8 +71,8 @@ class BasicExtLink : public BasicLink { public: typedef BasicExtLinkParams Params; - BasicExtLink(const Params *p); - const Params *params() const { return (const Params *)_params; } + BasicExtLink(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } friend class Topology; }; @@ -81,8 +81,8 @@ class BasicIntLink : public BasicLink { public: typedef BasicIntLinkParams Params; - BasicIntLink(const Params *p); - const Params *params() const { return (const Params *)_params; } + BasicIntLink(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } friend class Topology; }; diff --git a/src/mem/ruby/network/BasicRouter.cc b/src/mem/ruby/network/BasicRouter.cc index 644d3599a..450ca3630 100644 --- a/src/mem/ruby/network/BasicRouter.cc +++ b/src/mem/ruby/network/BasicRouter.cc @@ -28,11 +28,11 @@ #include "mem/ruby/network/BasicRouter.hh" -BasicRouter::BasicRouter(const Params *p) +BasicRouter::BasicRouter(const Params &p) : ClockedObject(p) { - m_id = p->router_id; - m_latency = p->latency; + m_id = p.router_id; + m_latency = p.latency; } void @@ -47,7 +47,7 @@ BasicRouter::print(std::ostream& out) const } BasicRouter * -BasicRouterParams::create() +BasicRouterParams::create() const { - return new BasicRouter(this); + return new BasicRouter(*this); } diff --git a/src/mem/ruby/network/BasicRouter.hh b/src/mem/ruby/network/BasicRouter.hh index a74dadb21..3e6f1030a 100644 --- a/src/mem/ruby/network/BasicRouter.hh +++ b/src/mem/ruby/network/BasicRouter.hh @@ -40,8 +40,8 @@ class BasicRouter : public ClockedObject { public: typedef BasicRouterParams Params; - BasicRouter(const Params *p); - const Params *params() const { return (const Params *)_params; } + BasicRouter(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } void init(); diff --git a/src/mem/ruby/network/MessageBuffer.cc b/src/mem/ruby/network/MessageBuffer.cc index 00e8fea22..b3631f192 100644 --- a/src/mem/ruby/network/MessageBuffer.cc +++ b/src/mem/ruby/network/MessageBuffer.cc @@ -52,13 +52,13 @@ using namespace std; using m5::stl_helpers::operator<<; -MessageBuffer::MessageBuffer(const Params *p) +MessageBuffer::MessageBuffer(const Params &p) : SimObject(p), m_stall_map_size(0), - m_max_size(p->buffer_size), m_time_last_time_size_checked(0), + m_max_size(p.buffer_size), m_time_last_time_size_checked(0), m_time_last_time_enqueue(0), m_time_last_time_pop(0), - m_last_arrival_time(0), m_strict_fifo(p->ordered), - m_randomization(p->randomization), - m_allow_zero_latency(p->allow_zero_latency) + m_last_arrival_time(0), m_strict_fifo(p.ordered), + m_randomization(p.randomization), + m_allow_zero_latency(p.allow_zero_latency) { m_msg_counter = 0; m_consumer = NULL; @@ -530,7 +530,7 @@ MessageBuffer::functionalAccess(Packet *pkt, bool is_read) } MessageBuffer * -MessageBufferParams::create() +MessageBufferParams::create() const { - return new MessageBuffer(this); + return new MessageBuffer(*this); } diff --git a/src/mem/ruby/network/MessageBuffer.hh b/src/mem/ruby/network/MessageBuffer.hh index fc69d34fd..65bae7943 100644 --- a/src/mem/ruby/network/MessageBuffer.hh +++ b/src/mem/ruby/network/MessageBuffer.hh @@ -69,7 +69,7 @@ class MessageBuffer : public SimObject { public: typedef MessageBufferParams Params; - MessageBuffer(const Params *p); + MessageBuffer(const Params &p); void reanalyzeMessages(Addr addr, Tick current_time); void reanalyzeAllMessages(Tick current_time); diff --git a/src/mem/ruby/network/Network.cc b/src/mem/ruby/network/Network.cc index a676a3827..8be4acef1 100644 --- a/src/mem/ruby/network/Network.cc +++ b/src/mem/ruby/network/Network.cc @@ -49,17 +49,17 @@ uint32_t Network::m_virtual_networks; uint32_t Network::m_control_msg_size; uint32_t Network::m_data_msg_size; -Network::Network(const Params *p) +Network::Network(const Params &p) : ClockedObject(p) { - m_virtual_networks = p->number_of_virtual_networks; - m_control_msg_size = p->control_msg_size; + m_virtual_networks = p.number_of_virtual_networks; + m_control_msg_size = p.control_msg_size; - fatal_if(p->data_msg_size > p->ruby_system->getBlockSizeBytes(), + fatal_if(p.data_msg_size > p.ruby_system->getBlockSizeBytes(), "%s: data message size > cache line size", name()); - m_data_msg_size = p->data_msg_size + m_control_msg_size; + m_data_msg_size = p.data_msg_size + m_control_msg_size; - params()->ruby_system->registerNetwork(this); + params().ruby_system->registerNetwork(this); // Populate localNodeVersions with the version of each MachineType in // this network. This will be used to compute a global to local ID. @@ -67,10 +67,10 @@ Network::Network(const Params *p) // ext_node per ext_link and it points to an AbstractController. // For RubySystems with one network global and local ID are the same. std::unordered_map> localNodeVersions; - for (auto &it : params()->ext_links) { - AbstractController *cntrl = it->params()->ext_node; + for (auto &it : params().ext_links) { + AbstractController *cntrl = it->params().ext_node; localNodeVersions[cntrl->getType()].push_back(cntrl->getVersion()); - params()->ruby_system->registerMachineID(cntrl->getMachineID(), this); + params().ruby_system->registerMachineID(cntrl->getMachineID(), this); } // Compute a local ID for each MachineType using the same order as SLICC @@ -94,9 +94,9 @@ Network::Network(const Params *p) assert(m_nodes != 0); assert(m_virtual_networks != 0); - m_topology_ptr = new Topology(m_nodes, p->routers.size(), + m_topology_ptr = new Topology(m_nodes, p.routers.size(), m_virtual_networks, - p->ext_links, p->int_links); + p.ext_links, p.int_links); // Allocate to and from queues // Queues that are getting messages from protocol @@ -113,10 +113,10 @@ Network::Network(const Params *p) } // Initialize the controller's network pointers - for (std::vector::const_iterator i = p->ext_links.begin(); - i != p->ext_links.end(); ++i) { + for (std::vector::const_iterator i = p.ext_links.begin(); + i != p.ext_links.end(); ++i) { BasicExtLink *ext_link = (*i); - AbstractController *abs_cntrl = ext_link->params()->ext_node; + AbstractController *abs_cntrl = ext_link->params().ext_node; abs_cntrl->initNetworkPtr(this); const AddrRangeList &ranges = abs_cntrl->getAddrRanges(); if (!ranges.empty()) { @@ -132,8 +132,8 @@ Network::Network(const Params *p) // Register a callback function for combining the statistics Stats::registerDumpCallback([this]() { collateStats(); }); - for (auto &it : dynamic_cast(this)->params()->ext_links) { - it->params()->ext_node->initNetQueues(); + for (auto &it : dynamic_cast(this)->params().ext_links) { + it->params().ext_node->initNetQueues(); } } diff --git a/src/mem/ruby/network/Network.hh b/src/mem/ruby/network/Network.hh index 371ceb8bb..8af1610a1 100644 --- a/src/mem/ruby/network/Network.hh +++ b/src/mem/ruby/network/Network.hh @@ -77,9 +77,12 @@ class Network : public ClockedObject { public: typedef RubyNetworkParams Params; - Network(const Params *p); - const Params * params() const - { return dynamic_cast(_params); } + Network(const Params &p); + const Params & + params() const + { + return dynamic_cast(_params); + } virtual ~Network(); diff --git a/src/mem/ruby/network/Topology.cc b/src/mem/ruby/network/Topology.cc index c9a581106..dc68b702c 100644 --- a/src/mem/ruby/network/Topology.cc +++ b/src/mem/ruby/network/Topology.cc @@ -71,13 +71,13 @@ Topology::Topology(uint32_t num_nodes, uint32_t num_routers, for (vector::const_iterator i = ext_links.begin(); i != ext_links.end(); ++i) { BasicExtLink *ext_link = (*i); - AbstractController *abs_cntrl = ext_link->params()->ext_node; - BasicRouter *router = ext_link->params()->int_node; + AbstractController *abs_cntrl = ext_link->params().ext_node; + BasicRouter *router = ext_link->params().int_node; int machine_base_idx = MachineType_base_number(abs_cntrl->getType()); int ext_idx1 = machine_base_idx + abs_cntrl->getVersion(); int ext_idx2 = ext_idx1 + m_nodes; - int int_idx = router->params()->router_id + 2*m_nodes; + int int_idx = router->params().router_id + 2*m_nodes; // create the internal uni-directional links in both directions // ext to int @@ -90,17 +90,17 @@ Topology::Topology(uint32_t num_nodes, uint32_t num_routers, for (vector::const_iterator i = int_links.begin(); i != int_links.end(); ++i) { BasicIntLink *int_link = (*i); - BasicRouter *router_src = int_link->params()->src_node; - BasicRouter *router_dst = int_link->params()->dst_node; + BasicRouter *router_src = int_link->params().src_node; + BasicRouter *router_dst = int_link->params().dst_node; - PortDirection src_outport = int_link->params()->src_outport; - PortDirection dst_inport = int_link->params()->dst_inport; + PortDirection src_outport = int_link->params().src_outport; + PortDirection dst_inport = int_link->params().dst_inport; // Store the IntLink pointers for later m_int_link_vector.push_back(int_link); - int src = router_src->params()->router_id + 2*m_nodes; - int dst = router_dst->params()->router_id + 2*m_nodes; + int src = router_src->params().router_id + 2*m_nodes; + int dst = router_dst->params().router_id + 2*m_nodes; // create the internal uni-directional link from src to dst addLink(src, dst, int_link, src_outport, dst_inport); diff --git a/src/mem/ruby/network/fault_model/FaultModel.cc b/src/mem/ruby/network/fault_model/FaultModel.cc index 2c3dd8aad..147b73611 100644 --- a/src/mem/ruby/network/fault_model/FaultModel.cc +++ b/src/mem/ruby/network/fault_model/FaultModel.cc @@ -50,7 +50,7 @@ using namespace std; #define MAX(a,b) ((a > b) ? (a) : (b)) -FaultModel::FaultModel(const Params *p) : SimObject(p) +FaultModel::FaultModel(const Params &p) : SimObject(p) { // read configurations into "configurations" vector // format: <10 fault types> @@ -58,17 +58,17 @@ FaultModel::FaultModel(const Params *p) : SimObject(p) for (int i = 0; more_records; i += (fields_per_conf_record)){ system_conf configuration; configuration.buff_per_vc = - p->baseline_fault_vector_database[i + conf_record_buff_per_vc]; + p.baseline_fault_vector_database[i + conf_record_buff_per_vc]; configuration.vcs = - p->baseline_fault_vector_database[i + conf_record_vcs]; + p.baseline_fault_vector_database[i + conf_record_vcs]; for (int fault_index = 0; fault_index < number_of_fault_types; fault_index++){ configuration.fault_type[fault_index] = - p->baseline_fault_vector_database[i + + p.baseline_fault_vector_database[i + conf_record_first_fault_type + fault_index] / 100; } configurations.push_back(configuration); - if (p->baseline_fault_vector_database[i+fields_per_conf_record] < 0){ + if (p.baseline_fault_vector_database[i+fields_per_conf_record] < 0){ more_records = false; } } @@ -78,9 +78,9 @@ FaultModel::FaultModel(const Params *p) : SimObject(p) more_records = true; for (int i = 0; more_records; i += (fields_per_temperature_record)){ int record_temperature = - p->temperature_weights_database[i + temperature_record_temp]; + p.temperature_weights_database[i + temperature_record_temp]; int record_weight = - p->temperature_weights_database[i + temperature_record_weight]; + p.temperature_weights_database[i + temperature_record_weight]; static int first_record = true; if (first_record){ for (int temperature = 0; temperature < record_temperature; @@ -91,7 +91,7 @@ FaultModel::FaultModel(const Params *p) : SimObject(p) } assert(record_temperature == temperature_weights.size()); temperature_weights.push_back(record_weight); - if (p->temperature_weights_database[i + + if (p.temperature_weights_database[i + fields_per_temperature_record] < 0){ more_records = false; } @@ -269,7 +269,7 @@ FaultModel::print(void) } FaultModel * -FaultModelParams::create() +FaultModelParams::create() const { - return new FaultModel(this); + return new FaultModel(*this); } diff --git a/src/mem/ruby/network/fault_model/FaultModel.hh b/src/mem/ruby/network/fault_model/FaultModel.hh index 183360f52..fa446c6b9 100644 --- a/src/mem/ruby/network/fault_model/FaultModel.hh +++ b/src/mem/ruby/network/fault_model/FaultModel.hh @@ -54,8 +54,8 @@ class FaultModel : public SimObject { public: typedef FaultModelParams Params; - FaultModel(const Params *p); - const Params *params() const { return (const Params *)_params; } + FaultModel(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } /************************************************************************/ /********** THE FAULT TYPES SUPPORTED BY THE FAULT MODEL ***************/ diff --git a/src/mem/ruby/network/garnet/CreditLink.hh b/src/mem/ruby/network/garnet/CreditLink.hh index 87358247b..998a004da 100644 --- a/src/mem/ruby/network/garnet/CreditLink.hh +++ b/src/mem/ruby/network/garnet/CreditLink.hh @@ -38,7 +38,7 @@ class CreditLink : public NetworkLink { public: typedef CreditLinkParams Params; - CreditLink(const Params *p) : NetworkLink(p) {} + CreditLink(const Params &p) : NetworkLink(p) {} }; #endif // __MEM_RUBY_NETWORK_GARNET_0_CREDITLINK_HH__ diff --git a/src/mem/ruby/network/garnet/GarnetLink.cc b/src/mem/ruby/network/garnet/GarnetLink.cc index ae969330d..0bbc5b1c7 100644 --- a/src/mem/ruby/network/garnet/GarnetLink.cc +++ b/src/mem/ruby/network/garnet/GarnetLink.cc @@ -35,34 +35,33 @@ #include "mem/ruby/network/garnet/NetworkBridge.hh" #include "mem/ruby/network/garnet/NetworkLink.hh" -GarnetIntLink::GarnetIntLink(const Params *p) +GarnetIntLink::GarnetIntLink(const Params &p) : BasicIntLink(p) { // Uni-directional - m_network_link = p->network_link; - m_credit_link = p->credit_link; + m_network_link = p.network_link; + m_credit_link = p.credit_link; - srcCdcEn = p->src_cdc; - dstCdcEn = p->dst_cdc; + srcCdcEn = p.src_cdc; + dstCdcEn = p.dst_cdc; - srcSerdesEn = p->src_serdes; - dstSerdesEn = p->dst_serdes; + srcSerdesEn = p.src_serdes; + dstSerdesEn = p.dst_serdes; srcBridgeEn = false; dstBridgeEn = false; if (srcCdcEn || srcSerdesEn) { srcBridgeEn = true; - srcNetBridge = p->src_net_bridge; - srcCredBridge = p->src_cred_bridge; + srcNetBridge = p.src_net_bridge; + srcCredBridge = p.src_cred_bridge; } if (dstCdcEn || dstSerdesEn) { dstBridgeEn = true; - dstNetBridge = p->dst_net_bridge; - dstCredBridge = p->dst_cred_bridge; + dstNetBridge = p.dst_net_bridge; + dstCredBridge = p.dst_cred_bridge; } - } void @@ -88,50 +87,49 @@ GarnetIntLink::print(std::ostream& out) const } GarnetIntLink * -GarnetIntLinkParams::create() +GarnetIntLinkParams::create() const { - return new GarnetIntLink(this); + return new GarnetIntLink(*this); } -GarnetExtLink::GarnetExtLink(const Params *p) +GarnetExtLink::GarnetExtLink(const Params &p) : BasicExtLink(p) { // Bi-directional // In - m_network_links[0] = p->network_links[0]; - m_credit_links[0] = p->credit_links[0]; + m_network_links[0] = p.network_links[0]; + m_credit_links[0] = p.credit_links[0]; // Out - m_network_links[1] = p->network_links[1]; - m_credit_links[1] = p->credit_links[1]; + m_network_links[1] = p.network_links[1]; + m_credit_links[1] = p.credit_links[1]; - extCdcEn = p->ext_cdc; - intCdcEn = p->int_cdc; + extCdcEn = p.ext_cdc; + intCdcEn = p.int_cdc; - extSerdesEn = p->ext_serdes; - intSerdesEn = p->int_serdes; + extSerdesEn = p.ext_serdes; + intSerdesEn = p.int_serdes; extBridgeEn = false; intBridgeEn = false; if (extCdcEn || extSerdesEn) { extBridgeEn = true; - extNetBridge[0] = p->ext_net_bridge[0]; - extCredBridge[0] = p->ext_cred_bridge[0]; - extNetBridge[1] = p->ext_net_bridge[1]; - extCredBridge[1] = p->ext_cred_bridge[1]; + extNetBridge[0] = p.ext_net_bridge[0]; + extCredBridge[0] = p.ext_cred_bridge[0]; + extNetBridge[1] = p.ext_net_bridge[1]; + extCredBridge[1] = p.ext_cred_bridge[1]; } if (intCdcEn || intSerdesEn) { intBridgeEn = true; - intNetBridge[0] = p->int_net_bridge[0]; - intNetBridge[1] = p->int_net_bridge[1]; - intCredBridge[0] = p->int_cred_bridge[0]; - intCredBridge[1] = p->int_cred_bridge[1]; + intNetBridge[0] = p.int_net_bridge[0]; + intNetBridge[1] = p.int_net_bridge[1]; + intCredBridge[0] = p.int_cred_bridge[0]; + intCredBridge[1] = p.int_cred_bridge[1]; } - } void @@ -163,7 +161,7 @@ GarnetExtLink::print(std::ostream& out) const } GarnetExtLink * -GarnetExtLinkParams::create() +GarnetExtLinkParams::create() const { - return new GarnetExtLink(this); + return new GarnetExtLink(*this); } diff --git a/src/mem/ruby/network/garnet/GarnetLink.hh b/src/mem/ruby/network/garnet/GarnetLink.hh index 554a0da5b..6abecd0b3 100644 --- a/src/mem/ruby/network/garnet/GarnetLink.hh +++ b/src/mem/ruby/network/garnet/GarnetLink.hh @@ -46,7 +46,7 @@ class GarnetIntLink : public BasicIntLink { public: typedef GarnetIntLinkParams Params; - GarnetIntLink(const Params *p); + GarnetIntLink(const Params &p); void init(); @@ -86,7 +86,7 @@ class GarnetExtLink : public BasicExtLink { public: typedef GarnetExtLinkParams Params; - GarnetExtLink(const Params *p); + GarnetExtLink(const Params &p); void init(); diff --git a/src/mem/ruby/network/garnet/GarnetNetwork.cc b/src/mem/ruby/network/garnet/GarnetNetwork.cc index 4e3ef1d8e..ec7331851 100644 --- a/src/mem/ruby/network/garnet/GarnetNetwork.cc +++ b/src/mem/ruby/network/garnet/GarnetNetwork.cc @@ -53,19 +53,19 @@ using namespace std; * (see configs/network/Network.py) */ -GarnetNetwork::GarnetNetwork(const Params *p) +GarnetNetwork::GarnetNetwork(const Params &p) : Network(p) { - m_num_rows = p->num_rows; - m_ni_flit_size = p->ni_flit_size; + m_num_rows = p.num_rows; + m_ni_flit_size = p.ni_flit_size; m_max_vcs_per_vnet = 0; - m_buffers_per_data_vc = p->buffers_per_data_vc; - m_buffers_per_ctrl_vc = p->buffers_per_ctrl_vc; - m_routing_algorithm = p->routing_algorithm; + m_buffers_per_data_vc = p.buffers_per_data_vc; + m_buffers_per_ctrl_vc = p.buffers_per_ctrl_vc; + m_routing_algorithm = p.routing_algorithm; - m_enable_fault_model = p->enable_fault_model; + m_enable_fault_model = p.enable_fault_model; if (m_enable_fault_model) - fault_model = p->fault_model; + fault_model = p.fault_model; m_vnet_type.resize(m_virtual_networks); @@ -77,8 +77,8 @@ GarnetNetwork::GarnetNetwork(const Params *p) } // record the routers - for (vector::const_iterator i = p->routers.begin(); - i != p->routers.end(); ++i) { + for (vector::const_iterator i = p.routers.begin(); + i != p.routers.end(); ++i) { Router* router = safe_cast(*i); m_routers.push_back(router); @@ -87,8 +87,8 @@ GarnetNetwork::GarnetNetwork(const Params *p) } // record the network interfaces - for (vector::const_iterator i = p->netifs.begin(); - i != p->netifs.end(); ++i) { + for (vector::const_iterator i = p.netifs.begin(); + i != p.netifs.end(); ++i) { NetworkInterface *ni = safe_cast(*i); m_nis.push_back(ni); ni->init_net_ptr(this); @@ -507,7 +507,7 @@ GarnetNetwork::regStats() void GarnetNetwork::collateStats() { - RubySystem *rs = params()->ruby_system; + RubySystem *rs = params().ruby_system; double time_delta = double(curCycle() - rs->getStartCycle()); for (int i = 0; i < m_networklinks.size(); i++) { @@ -557,9 +557,9 @@ GarnetNetwork::print(ostream& out) const } GarnetNetwork * -GarnetNetworkParams::create() +GarnetNetworkParams::create() const { - return new GarnetNetwork(this); + return new GarnetNetwork(*this); } uint32_t diff --git a/src/mem/ruby/network/garnet/GarnetNetwork.hh b/src/mem/ruby/network/garnet/GarnetNetwork.hh index 2f9f543bc..63c1a2c68 100644 --- a/src/mem/ruby/network/garnet/GarnetNetwork.hh +++ b/src/mem/ruby/network/garnet/GarnetNetwork.hh @@ -51,7 +51,7 @@ class GarnetNetwork : public Network { public: typedef GarnetNetworkParams Params; - GarnetNetwork(const Params *p); + GarnetNetwork(const Params &p); ~GarnetNetwork() = default; void init(); diff --git a/src/mem/ruby/network/garnet/NetworkBridge.cc b/src/mem/ruby/network/garnet/NetworkBridge.cc index 9a1490c64..ec23aea86 100644 --- a/src/mem/ruby/network/garnet/NetworkBridge.cc +++ b/src/mem/ruby/network/garnet/NetworkBridge.cc @@ -41,18 +41,18 @@ #include "debug/RubyNetwork.hh" #include "params/GarnetIntLink.hh" -NetworkBridge::NetworkBridge(const Params *p) +NetworkBridge::NetworkBridge(const Params &p) :CreditLink(p) { enCdc = true; enSerDes = true; - mType = p->vtype; + mType = p.vtype; - cdcLatency = p->cdc_latency; - serDesLatency = p->serdes_latency; + cdcLatency = p.cdc_latency; + serDesLatency = p.serdes_latency; lastScheduledAt = 0; - nLink = p->link; + nLink = p.link; if (mType == Enums::LINK_OBJECT) { nLink->setLinkConsumer(this); setSourceQueue(nLink->getBuffer(), nLink); @@ -265,7 +265,7 @@ NetworkBridge::wakeup() } NetworkBridge * -NetworkBridgeParams::create() +NetworkBridgeParams::create() const { - return new NetworkBridge(this); + return new NetworkBridge(*this); } diff --git a/src/mem/ruby/network/garnet/NetworkBridge.hh b/src/mem/ruby/network/garnet/NetworkBridge.hh index c6c37cb79..8003c614c 100644 --- a/src/mem/ruby/network/garnet/NetworkBridge.hh +++ b/src/mem/ruby/network/garnet/NetworkBridge.hh @@ -54,7 +54,7 @@ class NetworkBridge: public CreditLink { public: typedef NetworkBridgeParams Params; - NetworkBridge(const Params *p); + NetworkBridge(const Params &p); ~NetworkBridge(); void initBridge(NetworkBridge *coBrid, bool cdc_en, bool serdes_en); diff --git a/src/mem/ruby/network/garnet/NetworkInterface.cc b/src/mem/ruby/network/garnet/NetworkInterface.cc index 6dbe0d999..bbff5b416 100644 --- a/src/mem/ruby/network/garnet/NetworkInterface.cc +++ b/src/mem/ruby/network/garnet/NetworkInterface.cc @@ -44,11 +44,11 @@ using namespace std; -NetworkInterface::NetworkInterface(const Params *p) - : ClockedObject(p), Consumer(this), m_id(p->id), - m_virtual_networks(p->virt_nets), m_vc_per_vnet(0), +NetworkInterface::NetworkInterface(const Params &p) + : ClockedObject(p), Consumer(this), m_id(p.id), + m_virtual_networks(p.virt_nets), m_vc_per_vnet(0), m_vc_allocator(m_virtual_networks, 0), - m_deadlock_threshold(p->garnet_deadlock_threshold), + m_deadlock_threshold(p.garnet_deadlock_threshold), vc_busy_counter(m_virtual_networks, 0) { m_stall_count.resize(m_virtual_networks); @@ -673,7 +673,7 @@ NetworkInterface::functionalWrite(Packet *pkt) } NetworkInterface * -GarnetNetworkInterfaceParams::create() +GarnetNetworkInterfaceParams::create() const { - return new NetworkInterface(this); + return new NetworkInterface(*this); } diff --git a/src/mem/ruby/network/garnet/NetworkInterface.hh b/src/mem/ruby/network/garnet/NetworkInterface.hh index 2f9077220..51347cc28 100644 --- a/src/mem/ruby/network/garnet/NetworkInterface.hh +++ b/src/mem/ruby/network/garnet/NetworkInterface.hh @@ -53,7 +53,7 @@ class NetworkInterface : public ClockedObject, public Consumer { public: typedef GarnetNetworkInterfaceParams Params; - NetworkInterface(const Params *p); + NetworkInterface(const Params &p); ~NetworkInterface() = default; void addInPort(NetworkLink *in_link, CreditLink *credit_link); diff --git a/src/mem/ruby/network/garnet/NetworkLink.cc b/src/mem/ruby/network/garnet/NetworkLink.cc index 872159db5..24c23c127 100644 --- a/src/mem/ruby/network/garnet/NetworkLink.cc +++ b/src/mem/ruby/network/garnet/NetworkLink.cc @@ -36,18 +36,18 @@ #include "debug/RubyNetwork.hh" #include "mem/ruby/network/garnet/CreditLink.hh" -NetworkLink::NetworkLink(const Params *p) - : ClockedObject(p), Consumer(this), m_id(p->link_id), +NetworkLink::NetworkLink(const Params &p) + : ClockedObject(p), Consumer(this), m_id(p.link_id), m_type(NUM_LINK_TYPES_), - m_latency(p->link_latency), m_link_utilized(0), - m_virt_nets(p->virt_nets), linkBuffer(), + m_latency(p.link_latency), m_link_utilized(0), + m_virt_nets(p.virt_nets), linkBuffer(), link_consumer(nullptr), link_srcQueue(nullptr) { - int num_vnets = (p->supported_vnets).size(); + int num_vnets = (p.supported_vnets).size(); mVnets.resize(num_vnets); - bitWidth = p->width; + bitWidth = p.width; for (int i = 0; i < num_vnets; i++) { - mVnets[i] = p->supported_vnets[i]; + mVnets[i] = p.supported_vnets[i]; } } @@ -111,15 +111,15 @@ NetworkLink::resetStats() } NetworkLink * -NetworkLinkParams::create() +NetworkLinkParams::create() const { - return new NetworkLink(this); + return new NetworkLink(*this); } CreditLink * -CreditLinkParams::create() +CreditLinkParams::create() const { - return new CreditLink(this); + return new CreditLink(*this); } uint32_t diff --git a/src/mem/ruby/network/garnet/NetworkLink.hh b/src/mem/ruby/network/garnet/NetworkLink.hh index 22b1a7c72..20e090404 100644 --- a/src/mem/ruby/network/garnet/NetworkLink.hh +++ b/src/mem/ruby/network/garnet/NetworkLink.hh @@ -48,7 +48,7 @@ class NetworkLink : public ClockedObject, public Consumer { public: typedef NetworkLinkParams Params; - NetworkLink(const Params *p); + NetworkLink(const Params &p); ~NetworkLink() = default; void setLinkConsumer(Consumer *consumer); diff --git a/src/mem/ruby/network/garnet/Router.cc b/src/mem/ruby/network/garnet/Router.cc index 47cb9be08..311564fc5 100644 --- a/src/mem/ruby/network/garnet/Router.cc +++ b/src/mem/ruby/network/garnet/Router.cc @@ -41,10 +41,10 @@ using namespace std; -Router::Router(const Params *p) - : BasicRouter(p), Consumer(this), m_latency(p->latency), - m_virtual_networks(p->virt_nets), m_vc_per_vnet(p->vcs_per_vnet), - m_num_vcs(m_virtual_networks * m_vc_per_vnet), m_bit_width(p->width), +Router::Router(const Params &p) + : BasicRouter(p), Consumer(this), m_latency(p.latency), + m_virtual_networks(p.virt_nets), m_vc_per_vnet(p.vcs_per_vnet), + m_num_vcs(m_virtual_networks * m_vc_per_vnet), m_bit_width(p.width), m_network_ptr(nullptr), routingUnit(this), switchAllocator(this), crossbarSwitch(this) { @@ -285,7 +285,7 @@ Router::functionalWrite(Packet *pkt) } Router * -GarnetRouterParams::create() +GarnetRouterParams::create() const { - return new Router(this); + return new Router(*this); } diff --git a/src/mem/ruby/network/garnet/Router.hh b/src/mem/ruby/network/garnet/Router.hh index 59d16bdf0..31cdd7592 100644 --- a/src/mem/ruby/network/garnet/Router.hh +++ b/src/mem/ruby/network/garnet/Router.hh @@ -57,7 +57,7 @@ class Router : public BasicRouter, public Consumer { public: typedef GarnetRouterParams Params; - Router(const Params *p); + Router(const Params &p); ~Router() = default; diff --git a/src/mem/ruby/network/simple/SimpleLink.cc b/src/mem/ruby/network/simple/SimpleLink.cc index 04a60d888..70437624f 100644 --- a/src/mem/ruby/network/simple/SimpleLink.cc +++ b/src/mem/ruby/network/simple/SimpleLink.cc @@ -28,14 +28,14 @@ #include "mem/ruby/network/simple/SimpleLink.hh" -SimpleExtLink::SimpleExtLink(const Params *p) +SimpleExtLink::SimpleExtLink(const Params &p) : BasicExtLink(p) { // For the simple links, the bandwidth factor translates to the // bandwidth multiplier. The multipiler, in combination with the // endpoint bandwidth multiplier - message size multiplier ratio, // determines the link bandwidth in bytes - m_bw_multiplier = p->bandwidth_factor; + m_bw_multiplier = p.bandwidth_factor; } void @@ -45,19 +45,19 @@ SimpleExtLink::print(std::ostream& out) const } SimpleExtLink * -SimpleExtLinkParams::create() +SimpleExtLinkParams::create() const { - return new SimpleExtLink(this); + return new SimpleExtLink(*this); } -SimpleIntLink::SimpleIntLink(const Params *p) +SimpleIntLink::SimpleIntLink(const Params &p) : BasicIntLink(p) { // For the simple links, the bandwidth factor translates to the // bandwidth multiplier. The multipiler, in combination with the // endpoint bandwidth multiplier - message size multiplier ratio, // determines the link bandwidth in bytes - m_bw_multiplier = p->bandwidth_factor; + m_bw_multiplier = p.bandwidth_factor; } void @@ -67,7 +67,7 @@ SimpleIntLink::print(std::ostream& out) const } SimpleIntLink * -SimpleIntLinkParams::create() +SimpleIntLinkParams::create() const { - return new SimpleIntLink(this); + return new SimpleIntLink(*this); } diff --git a/src/mem/ruby/network/simple/SimpleLink.hh b/src/mem/ruby/network/simple/SimpleLink.hh index 3ca2356ba..68465e018 100644 --- a/src/mem/ruby/network/simple/SimpleLink.hh +++ b/src/mem/ruby/network/simple/SimpleLink.hh @@ -41,8 +41,8 @@ class SimpleExtLink : public BasicExtLink { public: typedef SimpleExtLinkParams Params; - SimpleExtLink(const Params *p); - const Params *params() const { return (const Params *)_params; } + SimpleExtLink(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } friend class Topology; void print(std::ostream& out) const; @@ -62,8 +62,8 @@ class SimpleIntLink : public BasicIntLink { public: typedef SimpleIntLinkParams Params; - SimpleIntLink(const Params *p); - const Params *params() const { return (const Params *)_params; } + SimpleIntLink(const Params &p); + const Params ¶ms() const { return (const Params &)_params; } friend class Topology; void print(std::ostream& out) const; diff --git a/src/mem/ruby/network/simple/SimpleNetwork.cc b/src/mem/ruby/network/simple/SimpleNetwork.cc index edffc3d92..86d043210 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.cc +++ b/src/mem/ruby/network/simple/SimpleNetwork.cc @@ -54,20 +54,20 @@ using namespace std; -SimpleNetwork::SimpleNetwork(const Params *p) - : Network(p), m_buffer_size(p->buffer_size), - m_endpoint_bandwidth(p->endpoint_bandwidth), - m_adaptive_routing(p->adaptive_routing) +SimpleNetwork::SimpleNetwork(const Params &p) + : Network(p), m_buffer_size(p.buffer_size), + m_endpoint_bandwidth(p.endpoint_bandwidth), + m_adaptive_routing(p.adaptive_routing) { // record the routers - for (vector::const_iterator i = p->routers.begin(); - i != p->routers.end(); ++i) { + for (vector::const_iterator i = p.routers.begin(); + i != p.routers.end(); ++i) { Switch* s = safe_cast(*i); m_switches.push_back(s); s->init_net_ptr(this); } - m_int_link_buffers = p->int_link_buffers; + m_int_link_buffers = p.int_link_buffers; m_num_connected_buffers = 0; } @@ -180,9 +180,9 @@ SimpleNetwork::print(ostream& out) const } SimpleNetwork * -SimpleNetworkParams::create() +SimpleNetworkParams::create() const { - return new SimpleNetwork(this); + return new SimpleNetwork(*this); } /* diff --git a/src/mem/ruby/network/simple/SimpleNetwork.hh b/src/mem/ruby/network/simple/SimpleNetwork.hh index 90e26128f..aee5ef553 100644 --- a/src/mem/ruby/network/simple/SimpleNetwork.hh +++ b/src/mem/ruby/network/simple/SimpleNetwork.hh @@ -44,7 +44,7 @@ class SimpleNetwork : public Network { public: typedef SimpleNetworkParams Params; - SimpleNetwork(const Params *p); + SimpleNetwork(const Params &p); ~SimpleNetwork() = default; void init(); diff --git a/src/mem/ruby/network/simple/Switch.cc b/src/mem/ruby/network/simple/Switch.cc index d1e5026b1..67b452413 100644 --- a/src/mem/ruby/network/simple/Switch.cc +++ b/src/mem/ruby/network/simple/Switch.cc @@ -51,12 +51,12 @@ using namespace std; using m5::stl_helpers::operator<<; -Switch::Switch(const Params *p) - : BasicRouter(p), perfectSwitch(m_id, this, p->virt_nets), +Switch::Switch(const Params &p) + : BasicRouter(p), perfectSwitch(m_id, this, p.virt_nets), m_num_connected_buffers(0) { - m_port_buffers.reserve(p->port_buffers.size()); - for (auto& buffer : p->port_buffers) { + m_port_buffers.reserve(p.port_buffers.size()); + for (auto& buffer : p.port_buffers) { m_port_buffers.emplace_back(buffer); } } @@ -80,7 +80,7 @@ Switch::addOutPort(const vector& out, Cycles link_latency, int bw_multiplier) { // Create a throttle - throttles.emplace_back(m_id, m_network_ptr->params()->ruby_system, + throttles.emplace_back(m_id, m_network_ptr->params().ruby_system, throttles.size(), link_latency, bw_multiplier, m_network_ptr->getEndpointBandwidth(), this); @@ -185,7 +185,7 @@ Switch::functionalWrite(Packet *pkt) } Switch * -SwitchParams::create() +SwitchParams::create() const { - return new Switch(this); + return new Switch(*this); } diff --git a/src/mem/ruby/network/simple/Switch.hh b/src/mem/ruby/network/simple/Switch.hh index 5d2690621..aac595206 100644 --- a/src/mem/ruby/network/simple/Switch.hh +++ b/src/mem/ruby/network/simple/Switch.hh @@ -60,7 +60,7 @@ class Switch : public BasicRouter { public: typedef SwitchParams Params; - Switch(const Params *p); + Switch(const Params &p); ~Switch() = default; void init(); diff --git a/src/mem/ruby/profiler/Profiler.cc b/src/mem/ruby/profiler/Profiler.cc index 505e3a17d..a6933b03f 100644 --- a/src/mem/ruby/profiler/Profiler.cc +++ b/src/mem/ruby/profiler/Profiler.cc @@ -80,17 +80,17 @@ using namespace std; using m5::stl_helpers::operator<<; -Profiler::Profiler(const RubySystemParams *p, RubySystem *rs) - : m_ruby_system(rs), m_hot_lines(p->hot_lines), - m_all_instructions(p->all_instructions), - m_num_vnets(p->number_of_virtual_networks) +Profiler::Profiler(const RubySystemParams &p, RubySystem *rs) + : m_ruby_system(rs), m_hot_lines(p.hot_lines), + m_all_instructions(p.all_instructions), + m_num_vnets(p.number_of_virtual_networks) { - m_address_profiler_ptr = new AddressProfiler(p->num_of_sequencers, this); + m_address_profiler_ptr = new AddressProfiler(p.num_of_sequencers, this); m_address_profiler_ptr->setHotLines(m_hot_lines); m_address_profiler_ptr->setAllInstructions(m_all_instructions); if (m_all_instructions) { - m_inst_profiler_ptr = new AddressProfiler(p->num_of_sequencers, this); + m_inst_profiler_ptr = new AddressProfiler(p.num_of_sequencers, this); m_inst_profiler_ptr->setHotLines(m_hot_lines); m_inst_profiler_ptr->setAllInstructions(m_all_instructions); } diff --git a/src/mem/ruby/profiler/Profiler.hh b/src/mem/ruby/profiler/Profiler.hh index 5632b8490..c1d08e4e4 100644 --- a/src/mem/ruby/profiler/Profiler.hh +++ b/src/mem/ruby/profiler/Profiler.hh @@ -64,7 +64,7 @@ class AddressProfiler; class Profiler { public: - Profiler(const RubySystemParams *params, RubySystem *rs); + Profiler(const RubySystemParams ¶ms, RubySystem *rs); ~Profiler(); RubySystem *m_ruby_system; diff --git a/src/mem/ruby/slicc_interface/AbstractController.cc b/src/mem/ruby/slicc_interface/AbstractController.cc index a211c558a..1e8d8e09f 100644 --- a/src/mem/ruby/slicc_interface/AbstractController.cc +++ b/src/mem/ruby/slicc_interface/AbstractController.cc @@ -47,16 +47,16 @@ #include "mem/ruby/system/Sequencer.hh" #include "sim/system.hh" -AbstractController::AbstractController(const Params *p) - : ClockedObject(p), Consumer(this), m_version(p->version), - m_clusterID(p->cluster_id), - m_id(p->system->getRequestorId(this)), m_is_blocking(false), - m_number_of_TBEs(p->number_of_TBEs), - m_transitions_per_cycle(p->transitions_per_cycle), - m_buffer_size(p->buffer_size), m_recycle_latency(p->recycle_latency), - m_mandatory_queue_latency(p->mandatory_queue_latency), +AbstractController::AbstractController(const Params &p) + : ClockedObject(p), Consumer(this), m_version(p.version), + m_clusterID(p.cluster_id), + m_id(p.system->getRequestorId(this)), m_is_blocking(false), + m_number_of_TBEs(p.number_of_TBEs), + m_transitions_per_cycle(p.transitions_per_cycle), + m_buffer_size(p.buffer_size), m_recycle_latency(p.recycle_latency), + m_mandatory_queue_latency(p.mandatory_queue_latency), memoryPort(csprintf("%s.memory", name()), this), - addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()) + addrRanges(p.addr_ranges.begin(), p.addr_ranges.end()) { if (m_version == 0) { // Combine the statistics from all controllers @@ -84,7 +84,7 @@ AbstractController::init() // different types. If this is the case, mapAddressToDownstreamMachine // needs to specify the machine type downstreamDestinations.resize(); - for (auto abs_cntrl : params()->downstream_destinations) { + for (auto abs_cntrl : params().downstream_destinations) { MachineID mid = abs_cntrl->getMachineID(); const AddrRangeList &ranges = abs_cntrl->getAddrRanges(); for (const auto addr_range : ranges) { diff --git a/src/mem/ruby/slicc_interface/AbstractController.hh b/src/mem/ruby/slicc_interface/AbstractController.hh index 2f3355686..8e19195dd 100644 --- a/src/mem/ruby/slicc_interface/AbstractController.hh +++ b/src/mem/ruby/slicc_interface/AbstractController.hh @@ -77,9 +77,9 @@ class AbstractController : public ClockedObject, public Consumer { public: typedef RubyControllerParams Params; - AbstractController(const Params *p); + AbstractController(const Params &p); void init(); - const Params *params() const { return (const Params *)_params; } + const Params ¶ms() const { return (const Params &)_params; } NodeID getVersion() const { return m_machineID.getNum(); } MachineType getType() const { return m_machineID.getType(); } diff --git a/src/mem/ruby/structures/CacheMemory.cc b/src/mem/ruby/structures/CacheMemory.cc index 0024d8a3b..51a38c495 100644 --- a/src/mem/ruby/structures/CacheMemory.cc +++ b/src/mem/ruby/structures/CacheMemory.cc @@ -63,25 +63,25 @@ operator<<(ostream& out, const CacheMemory& obj) } CacheMemory * -RubyCacheParams::create() +RubyCacheParams::create() const { - return new CacheMemory(this); + return new CacheMemory(*this); } -CacheMemory::CacheMemory(const Params *p) +CacheMemory::CacheMemory(const Params &p) : SimObject(p), - dataArray(p->dataArrayBanks, p->dataAccessLatency, - p->start_index_bit, p->ruby_system), - tagArray(p->tagArrayBanks, p->tagAccessLatency, - p->start_index_bit, p->ruby_system) -{ - m_cache_size = p->size; - m_cache_assoc = p->assoc; - m_replacementPolicy_ptr = p->replacement_policy; - m_start_index_bit = p->start_index_bit; - m_is_instruction_only_cache = p->is_icache; - m_resource_stalls = p->resourceStalls; - m_block_size = p->block_size; // may be 0 at this point. Updated in init() + dataArray(p.dataArrayBanks, p.dataAccessLatency, + p.start_index_bit, p.ruby_system), + tagArray(p.tagArrayBanks, p.tagAccessLatency, + p.start_index_bit, p.ruby_system) +{ + m_cache_size = p.size; + m_cache_assoc = p.assoc; + m_replacementPolicy_ptr = p.replacement_policy; + m_start_index_bit = p.start_index_bit; + m_is_instruction_only_cache = p.is_icache; + m_resource_stalls = p.resourceStalls; + m_block_size = p.block_size; // may be 0 at this point. Updated in init() m_use_occupancy = dynamic_cast( m_replacementPolicy_ptr) ? true : false; } diff --git a/src/mem/ruby/structures/CacheMemory.hh b/src/mem/ruby/structures/CacheMemory.hh index 245cfa94a..9434660cb 100644 --- a/src/mem/ruby/structures/CacheMemory.hh +++ b/src/mem/ruby/structures/CacheMemory.hh @@ -65,7 +65,7 @@ class CacheMemory : public SimObject public: typedef RubyCacheParams Params; typedef std::shared_ptr ReplData; - CacheMemory(const Params *p); + CacheMemory(const Params &p); ~CacheMemory(); void init(); diff --git a/src/mem/ruby/structures/DirectoryMemory.cc b/src/mem/ruby/structures/DirectoryMemory.cc index c6e3ccf54..bfb661147 100644 --- a/src/mem/ruby/structures/DirectoryMemory.cc +++ b/src/mem/ruby/structures/DirectoryMemory.cc @@ -51,8 +51,8 @@ using namespace std; -DirectoryMemory::DirectoryMemory(const Params *p) - : SimObject(p), addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()) +DirectoryMemory::DirectoryMemory(const Params &p) + : SimObject(p), addrRanges(p.addr_ranges.begin(), p.addr_ranges.end()) { m_size_bytes = 0; for (const auto &r: addrRanges) { @@ -160,7 +160,7 @@ DirectoryMemory::recordRequestType(DirectoryRequestType requestType) { } DirectoryMemory * -RubyDirectoryMemoryParams::create() +RubyDirectoryMemoryParams::create() const { - return new DirectoryMemory(this); + return new DirectoryMemory(*this); } diff --git a/src/mem/ruby/structures/DirectoryMemory.hh b/src/mem/ruby/structures/DirectoryMemory.hh index 3dd0e9566..80ed6abf6 100644 --- a/src/mem/ruby/structures/DirectoryMemory.hh +++ b/src/mem/ruby/structures/DirectoryMemory.hh @@ -55,7 +55,7 @@ class DirectoryMemory : public SimObject { public: typedef RubyDirectoryMemoryParams Params; - DirectoryMemory(const Params *p); + DirectoryMemory(const Params &p); ~DirectoryMemory(); void init(); diff --git a/src/mem/ruby/structures/RubyPrefetcher.cc b/src/mem/ruby/structures/RubyPrefetcher.cc index aa6c7cd7b..04225c843 100644 --- a/src/mem/ruby/structures/RubyPrefetcher.cc +++ b/src/mem/ruby/structures/RubyPrefetcher.cc @@ -49,20 +49,20 @@ #include "mem/ruby/system/RubySystem.hh" RubyPrefetcher* -RubyPrefetcherParams::create() +RubyPrefetcherParams::create() const { - return new RubyPrefetcher(this); + return new RubyPrefetcher(*this); } -RubyPrefetcher::RubyPrefetcher(const Params *p) - : SimObject(p), m_num_streams(p->num_streams), - m_array(p->num_streams), m_train_misses(p->train_misses), - m_num_startup_pfs(p->num_startup_pfs), - unitFilter(p->unit_filter), - negativeFilter(p->unit_filter), - nonUnitFilter(p->nonunit_filter), - m_prefetch_cross_pages(p->cross_page), - m_page_shift(p->sys->getPageShift()) +RubyPrefetcher::RubyPrefetcher(const Params &p) + : SimObject(p), m_num_streams(p.num_streams), + m_array(p.num_streams), m_train_misses(p.train_misses), + m_num_startup_pfs(p.num_startup_pfs), + unitFilter(p.unit_filter), + negativeFilter(p.unit_filter), + nonUnitFilter(p.nonunit_filter), + m_prefetch_cross_pages(p.cross_page), + m_page_shift(p.sys->getPageShift()) { assert(m_num_streams > 0); assert(m_num_startup_pfs <= MAX_PF_INFLIGHT); diff --git a/src/mem/ruby/structures/RubyPrefetcher.hh b/src/mem/ruby/structures/RubyPrefetcher.hh index b640cc3f3..89acb3b8b 100644 --- a/src/mem/ruby/structures/RubyPrefetcher.hh +++ b/src/mem/ruby/structures/RubyPrefetcher.hh @@ -96,7 +96,7 @@ class RubyPrefetcher : public SimObject { public: typedef RubyPrefetcherParams Params; - RubyPrefetcher(const Params *p); + RubyPrefetcher(const Params &p); ~RubyPrefetcher() = default; void issueNextPrefetch(Addr address, PrefetchEntry *stream); diff --git a/src/mem/ruby/structures/WireBuffer.cc b/src/mem/ruby/structures/WireBuffer.cc index 15398d8c0..1d91463db 100644 --- a/src/mem/ruby/structures/WireBuffer.cc +++ b/src/mem/ruby/structures/WireBuffer.cc @@ -54,7 +54,7 @@ operator<<(ostream& out, const WireBuffer& obj) // **************************************************************** // CONSTRUCTOR -WireBuffer::WireBuffer(const Params *p) +WireBuffer::WireBuffer(const Params &p) : SimObject(p) { m_msg_counter = 0; @@ -143,7 +143,7 @@ WireBuffer::wakeup() } WireBuffer * -RubyWireBufferParams::create() +RubyWireBufferParams::create() const { - return new WireBuffer(this); + return new WireBuffer(*this); } diff --git a/src/mem/ruby/structures/WireBuffer.hh b/src/mem/ruby/structures/WireBuffer.hh index f038705d9..be861ec84 100644 --- a/src/mem/ruby/structures/WireBuffer.hh +++ b/src/mem/ruby/structures/WireBuffer.hh @@ -57,7 +57,7 @@ class WireBuffer : public SimObject { public: typedef RubyWireBufferParams Params; - WireBuffer(const Params *p); + WireBuffer(const Params &p); void init(); ~WireBuffer(); diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index 4c61dd296..62b24eda1 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -45,9 +45,9 @@ DMARequest::DMARequest(uint64_t start_paddr, int len, bool write, { } -DMASequencer::DMASequencer(const Params *p) +DMASequencer::DMASequencer(const Params &p) : RubyPort(p), m_outstanding_count(0), - m_max_outstanding_requests(p->max_outstanding_requests) + m_max_outstanding_requests(p.max_outstanding_requests) { } @@ -201,7 +201,7 @@ DMASequencer::recordRequestType(DMASequencerRequestType requestType) } DMASequencer * -DMASequencerParams::create() +DMASequencerParams::create() const { - return new DMASequencer(this); + return new DMASequencer(*this); } diff --git a/src/mem/ruby/system/DMASequencer.hh b/src/mem/ruby/system/DMASequencer.hh index a3ee8afa7..2fa3f2afb 100644 --- a/src/mem/ruby/system/DMASequencer.hh +++ b/src/mem/ruby/system/DMASequencer.hh @@ -57,7 +57,7 @@ class DMASequencer : public RubyPort { public: typedef DMASequencerParams Params; - DMASequencer(const Params *); + DMASequencer(const Params &); void init() override; /* external interface */ diff --git a/src/mem/ruby/system/GPUCoalescer.cc b/src/mem/ruby/system/GPUCoalescer.cc index 310ba72fc..d9df1d893 100644 --- a/src/mem/ruby/system/GPUCoalescer.cc +++ b/src/mem/ruby/system/GPUCoalescer.cc @@ -182,7 +182,7 @@ UncoalescedTable::checkDeadlock(Tick threshold) } } -GPUCoalescer::GPUCoalescer(const Params *p) +GPUCoalescer::GPUCoalescer(const Params &p) : RubyPort(p), issueEvent([this]{ completeIssue(); }, "Issue coalesced request", false, Event::Progress_Event_Pri), @@ -197,23 +197,23 @@ GPUCoalescer::GPUCoalescer(const Params *p) m_outstanding_count = 0; - coalescingWindow = p->max_coalesces_per_cycle; + coalescingWindow = p.max_coalesces_per_cycle; m_max_outstanding_requests = 0; m_instCache_ptr = nullptr; m_dataCache_ptr = nullptr; - m_instCache_ptr = p->icache; - m_dataCache_ptr = p->dcache; - m_max_outstanding_requests = p->max_outstanding_requests; - m_deadlock_threshold = p->deadlock_threshold; + m_instCache_ptr = p.icache; + m_dataCache_ptr = p.dcache; + m_max_outstanding_requests = p.max_outstanding_requests; + m_deadlock_threshold = p.deadlock_threshold; assert(m_max_outstanding_requests > 0); assert(m_deadlock_threshold > 0); assert(m_instCache_ptr); assert(m_dataCache_ptr); - m_runningGarnetStandalone = p->garnet_standalone; + m_runningGarnetStandalone = p.garnet_standalone; } GPUCoalescer::~GPUCoalescer() diff --git a/src/mem/ruby/system/GPUCoalescer.hh b/src/mem/ruby/system/GPUCoalescer.hh index 2684d51bd..086cc6da3 100644 --- a/src/mem/ruby/system/GPUCoalescer.hh +++ b/src/mem/ruby/system/GPUCoalescer.hh @@ -230,7 +230,7 @@ class GPUCoalescer : public RubyPort }; typedef RubyGPUCoalescerParams Params; - GPUCoalescer(const Params *); + GPUCoalescer(const Params &); ~GPUCoalescer(); Port &getPort(const std::string &if_name, diff --git a/src/mem/ruby/system/HTMSequencer.cc b/src/mem/ruby/system/HTMSequencer.cc index 87bc7d74e..8c6afd04f 100644 --- a/src/mem/ruby/system/HTMSequencer.cc +++ b/src/mem/ruby/system/HTMSequencer.cc @@ -63,12 +63,12 @@ HTMSequencer::htmRetCodeConversion( } HTMSequencer * -RubyHTMSequencerParams::create() +RubyHTMSequencerParams::create() const { - return new HTMSequencer(this); + return new HTMSequencer(*this); } -HTMSequencer::HTMSequencer(const RubyHTMSequencerParams *p) +HTMSequencer::HTMSequencer(const RubyHTMSequencerParams &p) : Sequencer(p) { m_htmstart_tick = 0; diff --git a/src/mem/ruby/system/HTMSequencer.hh b/src/mem/ruby/system/HTMSequencer.hh index 5add836ef..e24cb57ee 100644 --- a/src/mem/ruby/system/HTMSequencer.hh +++ b/src/mem/ruby/system/HTMSequencer.hh @@ -51,7 +51,7 @@ class HTMSequencer : public Sequencer { public: - HTMSequencer(const RubyHTMSequencerParams *p); + HTMSequencer(const RubyHTMSequencerParams &p); ~HTMSequencer(); // callback to acknowledge HTM requests and diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc index 246971005..9a6434ab5 100644 --- a/src/mem/ruby/system/RubyPort.cc +++ b/src/mem/ruby/system/RubyPort.cc @@ -51,31 +51,31 @@ #include "sim/full_system.hh" #include "sim/system.hh" -RubyPort::RubyPort(const Params *p) - : ClockedObject(p), m_ruby_system(p->ruby_system), m_version(p->version), +RubyPort::RubyPort(const Params &p) + : ClockedObject(p), m_ruby_system(p.ruby_system), m_version(p.version), m_controller(NULL), m_mandatory_q_ptr(NULL), - m_usingRubyTester(p->using_ruby_tester), system(p->system), + m_usingRubyTester(p.using_ruby_tester), system(p.system), pioRequestPort(csprintf("%s.pio-request-port", name()), this), pioResponsePort(csprintf("%s.pio-response-port", name()), this), memRequestPort(csprintf("%s.mem-request-port", name()), this), memResponsePort(csprintf("%s-mem-response-port", name()), this, - p->ruby_system->getAccessBackingStore(), -1, - p->no_retry_on_stall), - gotAddrRanges(p->port_interrupt_out_port_connection_count), - m_isCPUSequencer(p->is_cpu_sequencer) + p.ruby_system->getAccessBackingStore(), -1, + p.no_retry_on_stall), + gotAddrRanges(p.port_interrupt_out_port_connection_count), + m_isCPUSequencer(p.is_cpu_sequencer) { assert(m_version != -1); // create the response ports based on the number of connected ports - for (size_t i = 0; i < p->port_in_ports_connection_count; ++i) { + for (size_t i = 0; i < p.port_in_ports_connection_count; ++i) { response_ports.push_back(new MemResponsePort(csprintf ("%s.response_ports%d", name(), i), this, - p->ruby_system->getAccessBackingStore(), - i, p->no_retry_on_stall)); + p.ruby_system->getAccessBackingStore(), + i, p.no_retry_on_stall)); } // create the request ports based on the number of connected ports - for (size_t i = 0; i < p->port_interrupt_out_port_connection_count; ++i) { + for (size_t i = 0; i < p.port_interrupt_out_port_connection_count; ++i) { request_ports.push_back(new PioRequestPort(csprintf( "%s.request_ports%d", name(), i), this)); } diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh index 73c4557c2..1d25ae9a2 100644 --- a/src/mem/ruby/system/RubyPort.hh +++ b/src/mem/ruby/system/RubyPort.hh @@ -144,7 +144,7 @@ class RubyPort : public ClockedObject }; typedef RubyPortParams Params; - RubyPort(const Params *p); + RubyPort(const Params &p); virtual ~RubyPort() {} void init() override; diff --git a/src/mem/ruby/system/RubyPortProxy.cc b/src/mem/ruby/system/RubyPortProxy.cc index 7401a6316..2badffa64 100644 --- a/src/mem/ruby/system/RubyPortProxy.cc +++ b/src/mem/ruby/system/RubyPortProxy.cc @@ -37,8 +37,9 @@ #include "mem/ruby/system/RubyPortProxy.hh" -RubyPortProxy::RubyPortProxy(const RubyPortProxyParams* p) : - RubyPort(p) { +RubyPortProxy::RubyPortProxy(const RubyPortProxyParams &p) : + RubyPort(p) +{ } RubyPortProxy::~RubyPortProxy() @@ -62,7 +63,7 @@ RubyPortProxy::makeRequest(PacketPtr pkt) } RubyPortProxy* -RubyPortProxyParams::create() +RubyPortProxyParams::create() const { - return new RubyPortProxy(this); + return new RubyPortProxy(*this); } diff --git a/src/mem/ruby/system/RubyPortProxy.hh b/src/mem/ruby/system/RubyPortProxy.hh index 2d9e1d693..59673172d 100644 --- a/src/mem/ruby/system/RubyPortProxy.hh +++ b/src/mem/ruby/system/RubyPortProxy.hh @@ -59,7 +59,7 @@ class RubyPortProxy : public RubyPort * * @param p Parameters inherited from the RubyPort */ - RubyPortProxy(const RubyPortProxyParams* p); + RubyPortProxy(const RubyPortProxyParams &p); /** * Destruct a RubyPortProxy. diff --git a/src/mem/ruby/system/RubySystem.cc b/src/mem/ruby/system/RubySystem.cc index 565b4266d..8a6c35417 100644 --- a/src/mem/ruby/system/RubySystem.cc +++ b/src/mem/ruby/system/RubySystem.cc @@ -71,16 +71,16 @@ bool RubySystem::m_warmup_enabled = false; unsigned RubySystem::m_systems_to_warmup = 0; bool RubySystem::m_cooldown_enabled = false; -RubySystem::RubySystem(const Params *p) - : ClockedObject(p), m_access_backing_store(p->access_backing_store), +RubySystem::RubySystem(const Params &p) + : ClockedObject(p), m_access_backing_store(p.access_backing_store), m_cache_recorder(NULL) { - m_randomization = p->randomization; + m_randomization = p.randomization; - m_block_size_bytes = p->block_size_bytes; + m_block_size_bytes = p.block_size_bytes; assert(isPowerOf2(m_block_size_bytes)); m_block_size_bits = floorLog2(m_block_size_bytes); - m_memory_size_bits = p->memory_size_bits; + m_memory_size_bits = p.memory_size_bits; // Resize to the size of different machine types m_abstract_controls.resize(MachineType_NUM); @@ -89,7 +89,7 @@ RubySystem::RubySystem(const Params *p) Stats::registerDumpCallback([this]() { collateStats(); }); // Create the profiler m_profiler = new Profiler(p, this); - m_phys_mem = p->phys_mem; + m_phys_mem = p.phys_mem; } void @@ -155,7 +155,7 @@ RubySystem::registerRequestorIDs() } // Default all other requestor IDs to network 0 - for (auto id = 0; id < params()->system->maxRequestors(); ++id) { + for (auto id = 0; id < params().system->maxRequestors(); ++id) { if (!requestorToNetwork.count(id)) { requestorToNetwork.insert(std::make_pair(id, 0)); } @@ -640,7 +640,7 @@ RubySystem::functionalWrite(PacketPtr pkt) } RubySystem * -RubySystemParams::create() +RubySystemParams::create() const { - return new RubySystem(this); + return new RubySystem(*this); } diff --git a/src/mem/ruby/system/RubySystem.hh b/src/mem/ruby/system/RubySystem.hh index cdd2b5cfb..0c4ffc163 100644 --- a/src/mem/ruby/system/RubySystem.hh +++ b/src/mem/ruby/system/RubySystem.hh @@ -53,9 +53,9 @@ class RubySystem : public ClockedObject { public: typedef RubySystemParams Params; - RubySystem(const Params *p); + RubySystem(const Params &p); ~RubySystem(); - const Params *params() const { return (const Params *)_params; } + const Params ¶ms() const { return (const Params &)_params; } // config accessors static int getRandomization() { return m_randomization; } diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 6b50636d9..27fb2575f 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -62,26 +62,26 @@ using namespace std; Sequencer * -RubySequencerParams::create() +RubySequencerParams::create() const { - return new Sequencer(this); + return new Sequencer(*this); } -Sequencer::Sequencer(const Params *p) +Sequencer::Sequencer(const Params &p) : RubyPort(p), m_IncompleteTimes(MachineType_NUM), deadlockCheckEvent([this]{ wakeup(); }, "Sequencer deadlock check") { m_outstanding_count = 0; - m_dataCache_ptr = p->dcache; - m_max_outstanding_requests = p->max_outstanding_requests; - m_deadlock_threshold = p->deadlock_threshold; + m_dataCache_ptr = p.dcache; + m_max_outstanding_requests = p.max_outstanding_requests; + m_deadlock_threshold = p.deadlock_threshold; - m_coreId = p->coreid; // for tracking the two CorePair sequencers + m_coreId = p.coreid; // for tracking the two CorePair sequencers assert(m_max_outstanding_requests > 0); assert(m_deadlock_threshold > 0); - m_runningGarnetStandalone = p->garnet_standalone; + m_runningGarnetStandalone = p.garnet_standalone; } Sequencer::~Sequencer() diff --git a/src/mem/ruby/system/Sequencer.hh b/src/mem/ruby/system/Sequencer.hh index e1a3c2df1..83eea68b6 100644 --- a/src/mem/ruby/system/Sequencer.hh +++ b/src/mem/ruby/system/Sequencer.hh @@ -81,7 +81,7 @@ class Sequencer : public RubyPort { public: typedef RubySequencerParams Params; - Sequencer(const Params *); + Sequencer(const Params &); ~Sequencer(); /** diff --git a/src/mem/ruby/system/VIPERCoalescer.cc b/src/mem/ruby/system/VIPERCoalescer.cc index 82c7f0052..6589a7d76 100644 --- a/src/mem/ruby/system/VIPERCoalescer.cc +++ b/src/mem/ruby/system/VIPERCoalescer.cc @@ -54,12 +54,12 @@ using namespace std; VIPERCoalescer * -VIPERCoalescerParams::create() +VIPERCoalescerParams::create() const { - return new VIPERCoalescer(this); + return new VIPERCoalescer(*this); } -VIPERCoalescer::VIPERCoalescer(const Params *p) +VIPERCoalescer::VIPERCoalescer(const Params &p) : GPUCoalescer(p), m_cache_inv_pkt(nullptr), m_num_pending_invs(0) diff --git a/src/mem/ruby/system/VIPERCoalescer.hh b/src/mem/ruby/system/VIPERCoalescer.hh index 2f68c10bc..213a67557 100644 --- a/src/mem/ruby/system/VIPERCoalescer.hh +++ b/src/mem/ruby/system/VIPERCoalescer.hh @@ -55,7 +55,7 @@ class VIPERCoalescer : public GPUCoalescer { public: typedef VIPERCoalescerParams Params; - VIPERCoalescer(const Params *); + VIPERCoalescer(const Params &); ~VIPERCoalescer(); void writeCompleteCallback(Addr address, uint64_t instSeqNum); void invTCPCallback(Addr address); diff --git a/src/mem/serial_link.cc b/src/mem/serial_link.cc index 74ac43f54..1b07770d6 100644 --- a/src/mem/serial_link.cc +++ b/src/mem/serial_link.cc @@ -78,15 +78,14 @@ SerialLink::SerialLinkRequestPort::SerialLinkRequestPort(const std::string& { } -SerialLink::SerialLink(SerialLinkParams *p) +SerialLink::SerialLink(const SerialLinkParams &p) : ClockedObject(p), - cpu_side_port(p->name + ".cpu_side_port", *this, mem_side_port, - ticksToCycles(p->delay), p->resp_size, p->ranges), - mem_side_port(p->name + ".mem_side_port", *this, cpu_side_port, - ticksToCycles(p->delay), p->req_size), - num_lanes(p->num_lanes), - link_speed(p->link_speed) - + cpu_side_port(p.name + ".cpu_side_port", *this, mem_side_port, + ticksToCycles(p.delay), p.resp_size, p.ranges), + mem_side_port(p.name + ".mem_side_port", *this, cpu_side_port, + ticksToCycles(p.delay), p.req_size), + num_lanes(p.num_lanes), + link_speed(p.link_speed) { } @@ -423,7 +422,7 @@ SerialLink::SerialLinkResponsePort::getAddrRanges() const } SerialLink * -SerialLinkParams::create() +SerialLinkParams::create() const { - return new SerialLink(this); + return new SerialLink(*this); } diff --git a/src/mem/serial_link.hh b/src/mem/serial_link.hh index 903387e91..ad76c9ebc 100644 --- a/src/mem/serial_link.hh +++ b/src/mem/serial_link.hh @@ -319,7 +319,7 @@ class SerialLink : public ClockedObject typedef SerialLinkParams Params; - SerialLink(SerialLinkParams *p); + SerialLink(const SerialLinkParams &p); }; #endif //__MEM_SERIAL_LINK_HH__ diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc index c593a276a..80e4cb392 100644 --- a/src/mem/simple_mem.cc +++ b/src/mem/simple_mem.cc @@ -44,10 +44,10 @@ #include "base/trace.hh" #include "debug/Drain.hh" -SimpleMemory::SimpleMemory(const SimpleMemoryParams* p) : +SimpleMemory::SimpleMemory(const SimpleMemoryParams &p) : AbstractMemory(p), - port(name() + ".port", *this), latency(p->latency), - latency_var(p->latency_var), bandwidth(p->bandwidth), isBusy(false), + port(name() + ".port", *this), latency(p.latency), + latency_var(p.latency_var), bandwidth(p.bandwidth), isBusy(false), retryReq(false), retryResp(false), releaseEvent([this]{ release(); }, name()), dequeueEvent([this]{ dequeue(); }, name()) @@ -303,7 +303,7 @@ SimpleMemory::MemoryPort::recvRespRetry() } SimpleMemory* -SimpleMemoryParams::create() +SimpleMemoryParams::create() const { - return new SimpleMemory(this); + return new SimpleMemory(*this); } diff --git a/src/mem/simple_mem.hh b/src/mem/simple_mem.hh index e80c88fd4..22b23239a 100644 --- a/src/mem/simple_mem.hh +++ b/src/mem/simple_mem.hh @@ -173,7 +173,7 @@ class SimpleMemory : public AbstractMemory public: - SimpleMemory(const SimpleMemoryParams *p); + SimpleMemory(const SimpleMemoryParams &p); DrainState drain() override; diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py index f4b4dfaaa..371b40e1b 100644 --- a/src/mem/slicc/symbols/StateMachine.py +++ b/src/mem/slicc/symbols/StateMachine.py @@ -307,7 +307,7 @@ class $c_ident : public AbstractController { public: typedef ${c_ident}Params Params; - $c_ident(const Params *p); + $c_ident(const Params &p); static int getNumControllers(); void init(); @@ -540,9 +540,9 @@ using namespace std; code(''' $c_ident * -${c_ident}Params::create() +${c_ident}Params::create() const { - return new $c_ident(this); + return new $c_ident(*this); } int $c_ident::m_num_controllers = 0; @@ -559,13 +559,13 @@ stringstream ${ident}_transitionComment; #endif /** \\brief constructor */ -$c_ident::$c_ident(const Params *p) +$c_ident::$c_ident(const Params &p) : AbstractController(p) { m_machineID.type = MachineType_${ident}; m_machineID.num = m_version; m_num_controllers++; - p->ruby_system->registerAbstractController(this); + p.ruby_system->registerAbstractController(this); m_in_ports = $num_in_ports; ''') @@ -578,9 +578,9 @@ $c_ident::$c_ident(const Params *p) # for param in self.config_parameters: if param.pointer: - code('m_${{param.ident}}_ptr = p->${{param.ident}};') + code('m_${{param.ident}}_ptr = p.${{param.ident}};') else: - code('m_${{param.ident}} = p->${{param.ident}};') + code('m_${{param.ident}} = p.${{param.ident}};') if re.compile("sequencer").search(param.ident) or \ param.type_ast.type.c_ident == "GPUCoalescer" or \ @@ -826,7 +826,7 @@ $c_ident::regStats() event < ${ident}_Event_NUM; ++event) { Stats::Vector *t = new Stats::Vector(); t->init(m_num_controllers); - t->name(params()->ruby_system->name() + ".${c_ident}." + + t->name(params().ruby_system->name() + ".${c_ident}." + ${ident}_Event_to_string(event)); t->flags(Stats::pdf | Stats::total | Stats::oneline | Stats::nozero); @@ -844,7 +844,7 @@ $c_ident::regStats() Stats::Vector *t = new Stats::Vector(); t->init(m_num_controllers); - t->name(params()->ruby_system->name() + ".${c_ident}." + + t->name(params().ruby_system->name() + ".${c_ident}." + ${ident}_State_to_string(state) + "." + ${ident}_Event_to_string(event)); @@ -892,7 +892,7 @@ $c_ident::collateStats() for (${ident}_Event event = ${ident}_Event_FIRST; event < ${ident}_Event_NUM; ++event) { for (unsigned int i = 0; i < m_num_controllers; ++i) { - RubySystem *rs = params()->ruby_system; + RubySystem *rs = params().ruby_system; std::map::iterator it = rs->m_abstract_controls[MachineType_${ident}].find(i); assert(it != rs->m_abstract_controls[MachineType_${ident}].end()); @@ -908,7 +908,7 @@ $c_ident::collateStats() event < ${ident}_Event_NUM; ++event) { for (unsigned int i = 0; i < m_num_controllers; ++i) { - RubySystem *rs = params()->ruby_system; + RubySystem *rs = params().ruby_system; std::map::iterator it = rs->m_abstract_controls[MachineType_${ident}].find(i); assert(it != rs->m_abstract_controls[MachineType_${ident}].end()); diff --git a/src/mem/snoop_filter.cc b/src/mem/snoop_filter.cc index d1a62dc2b..7fa1f4e99 100644 --- a/src/mem/snoop_filter.cc +++ b/src/mem/snoop_filter.cc @@ -422,7 +422,7 @@ SnoopFilter::regStats() } SnoopFilter * -SnoopFilterParams::create() +SnoopFilterParams::create() const { - return new SnoopFilter(this); + return new SnoopFilter(*this); } diff --git a/src/mem/snoop_filter.hh b/src/mem/snoop_filter.hh index 6a3832559..815049435 100644 --- a/src/mem/snoop_filter.hh +++ b/src/mem/snoop_filter.hh @@ -91,10 +91,10 @@ class SnoopFilter : public SimObject { typedef std::vector SnoopList; - SnoopFilter (const SnoopFilterParams *p) : + SnoopFilter (const SnoopFilterParams &p) : SimObject(p), reqLookupResult(cachedLocations.end()), - linesize(p->system->cacheLineSize()), lookupLatency(p->lookup_latency), - maxEntryCount(p->max_capacity / p->system->cacheLineSize()) + linesize(p.system->cacheLineSize()), lookupLatency(p.lookup_latency), + maxEntryCount(p.max_capacity / p.system->cacheLineSize()) { } diff --git a/src/mem/xbar.cc b/src/mem/xbar.cc index f9544f8a6..49ee8ac54 100644 --- a/src/mem/xbar.cc +++ b/src/mem/xbar.cc @@ -51,17 +51,17 @@ #include "debug/Drain.hh" #include "debug/XBar.hh" -BaseXBar::BaseXBar(const BaseXBarParams *p) +BaseXBar::BaseXBar(const BaseXBarParams &p) : ClockedObject(p), - frontendLatency(p->frontend_latency), - forwardLatency(p->forward_latency), - responseLatency(p->response_latency), - headerLatency(p->header_latency), - width(p->width), - gotAddrRanges(p->port_default_connection_count + - p->port_mem_side_ports_connection_count, false), + frontendLatency(p.frontend_latency), + forwardLatency(p.forward_latency), + responseLatency(p.response_latency), + headerLatency(p.header_latency), + width(p.width), + gotAddrRanges(p.port_default_connection_count + + p.port_mem_side_ports_connection_count, false), gotAllAddrRanges(false), defaultPortID(InvalidPortID), - useDefaultRange(p->use_default_range), + useDefaultRange(p.use_default_range), transDist(this, "trans_dist", "Transaction distribution"), pktCount(this, "pkt_count", diff --git a/src/mem/xbar.hh b/src/mem/xbar.hh index cf067423e..88be87f59 100644 --- a/src/mem/xbar.hh +++ b/src/mem/xbar.hh @@ -385,7 +385,7 @@ class BaseXBar : public ClockedObject addresses not handled by another port to default device. */ const bool useDefaultRange; - BaseXBar(const BaseXBarParams *p); + BaseXBar(const BaseXBarParams &p); /** * Stats for transaction distribution and data passing through the diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py index 9c9a9ed0f..458942103 100644 --- a/src/python/m5/SimObject.py +++ b/src/python/m5/SimObject.py @@ -936,7 +936,7 @@ module_init(py::module &m_internal) code("{") if not hasattr(cls, 'abstract') or not cls.abstract: if 'type' in cls.__dict__: - code(" ${{cls.cxx_type}} create();") + code(" ${{cls.cxx_type}} create() const;") code.indent() if cls == SimObject: diff --git a/src/sim/clock_domain.cc b/src/sim/clock_domain.cc index a61934b3a..e591b8c1d 100644 --- a/src/sim/clock_domain.cc +++ b/src/sim/clock_domain.cc @@ -58,7 +58,7 @@ ClockDomain::ClockDomainStats::ClockDomainStats(ClockDomain &cd) clock.scalar(cd._clockPeriod); } -ClockDomain::ClockDomain(const Params *p, VoltageDomain *voltage_domain) +ClockDomain::ClockDomain(const Params &p, VoltageDomain *voltage_domain) : SimObject(p), _clockPeriod(0), _voltageDomain(voltage_domain), @@ -72,13 +72,13 @@ ClockDomain::voltage() const return _voltageDomain->voltage(); } -SrcClockDomain::SrcClockDomain(const Params *p) : - ClockDomain(p, p->voltage_domain), - freqOpPoints(p->clock), - _domainID(p->domain_id), - _perfLevel(p->init_perf_level) +SrcClockDomain::SrcClockDomain(const Params &p) : + ClockDomain(p, p.voltage_domain), + freqOpPoints(p.clock), + _domainID(p.domain_id), + _perfLevel(p.init_perf_level) { - VoltageDomain *vdom = p->voltage_domain; + VoltageDomain *vdom = p.voltage_domain; fatal_if(freqOpPoints.empty(), "DVFS: Empty set of frequencies for "\ "domain %d %s\n", _domainID, name()); @@ -182,15 +182,15 @@ SrcClockDomain::startup() } SrcClockDomain * -SrcClockDomainParams::create() +SrcClockDomainParams::create() const { - return new SrcClockDomain(this); + return new SrcClockDomain(*this); } -DerivedClockDomain::DerivedClockDomain(const Params *p) : - ClockDomain(p, p->clk_domain->voltageDomain()), - parent(*p->clk_domain), - clockDivider(p->clk_divider) +DerivedClockDomain::DerivedClockDomain(const Params &p) : + ClockDomain(p, p.clk_domain->voltageDomain()), + parent(*p.clk_domain), + clockDivider(p.clk_divider) { // Ensure that clock divider setting works as frequency divider and never // work as frequency multiplier @@ -229,7 +229,7 @@ DerivedClockDomain::updateClockPeriod() } DerivedClockDomain * -DerivedClockDomainParams::create() +DerivedClockDomainParams::create() const { - return new DerivedClockDomain(this); + return new DerivedClockDomain(*this); } diff --git a/src/sim/clock_domain.hh b/src/sim/clock_domain.hh index 05d1a216d..9296c1ada 100644 --- a/src/sim/clock_domain.hh +++ b/src/sim/clock_domain.hh @@ -95,7 +95,7 @@ class ClockDomain : public SimObject public: typedef ClockDomainParams Params; - ClockDomain(const Params *p, VoltageDomain *voltage_domain); + ClockDomain(const Params &p, VoltageDomain *voltage_domain); /** * Get the clock period. @@ -166,7 +166,7 @@ class SrcClockDomain : public ClockDomain public: typedef SrcClockDomainParams Params; - SrcClockDomain(const Params *p); + SrcClockDomain(const Params &p); /** * Set new clock value @@ -275,7 +275,7 @@ class DerivedClockDomain: public ClockDomain public: typedef DerivedClockDomainParams Params; - DerivedClockDomain(const Params *p); + DerivedClockDomain(const Params &p); /** * Called by the parent clock domain to propagate changes. This diff --git a/src/sim/clocked_object.cc b/src/sim/clocked_object.cc index e7aaca7db..e40751992 100644 --- a/src/sim/clocked_object.cc +++ b/src/sim/clocked_object.cc @@ -40,15 +40,15 @@ #include "base/logging.hh" #include "sim/power/power_model.hh" -ClockedObject::ClockedObject(const ClockedObjectParams *p) : - SimObject(p), Clocked(*p->clk_domain), powerState(p->power_state) +ClockedObject::ClockedObject(const ClockedObjectParams &p) : + SimObject(p), Clocked(*p.clk_domain), powerState(p.power_state) { // Register the power_model with the object // Slightly counter-intuitively, power models need to to register with the // clocked object and not the power stated object because the power model // needs information from the clock domain, which is an attribute of the // clocked object. - for (auto & power_model: p->power_model) + for (auto & power_model: p.power_model) power_model->setClockedObject(this); } diff --git a/src/sim/clocked_object.hh b/src/sim/clocked_object.hh index 4f94df80b..14cd4053e 100644 --- a/src/sim/clocked_object.hh +++ b/src/sim/clocked_object.hh @@ -231,14 +231,14 @@ class Clocked class ClockedObject : public SimObject, public Clocked { public: - ClockedObject(const ClockedObjectParams *p); + ClockedObject(const ClockedObjectParams &p); /** Parameters of ClockedObject */ typedef ClockedObjectParams Params; - const Params * + const Params & params() const { - return reinterpret_cast(_params); + return reinterpret_cast(_params); } void serialize(CheckpointOut &cp) const override; diff --git a/src/sim/dvfs_handler.cc b/src/sim/dvfs_handler.cc index 9591d8f41..224acde03 100644 --- a/src/sim/dvfs_handler.cc +++ b/src/sim/dvfs_handler.cc @@ -54,15 +54,15 @@ // DVFSHandler methods implementation // -DVFSHandler::DVFSHandler(const Params *p) +DVFSHandler::DVFSHandler(const Params &p) : SimObject(p), - sysClkDomain(p->sys_clk_domain), - enableHandler(p->enable), - _transLatency(p->transition_latency) + sysClkDomain(p.sys_clk_domain), + enableHandler(p.enable), + _transLatency(p.transition_latency) { // Check supplied list of domains for sanity and add them to the // domain ID -> domain* hash - for (auto dit = p->domains.begin(); dit != p->domains.end(); ++dit) { + for (auto dit = p.domains.begin(); dit != p.domains.end(); ++dit) { SrcClockDomain *d = *dit; DomainID domain_id = d->domainID(); @@ -253,7 +253,7 @@ DVFSHandler::unserialize(CheckpointIn &cp) } DVFSHandler* -DVFSHandlerParams::create() +DVFSHandlerParams::create() const { - return new DVFSHandler(this); + return new DVFSHandler(*this); } diff --git a/src/sim/dvfs_handler.hh b/src/sim/dvfs_handler.hh index 4bb8d8335..da04fc5c9 100644 --- a/src/sim/dvfs_handler.hh +++ b/src/sim/dvfs_handler.hh @@ -68,7 +68,7 @@ class DVFSHandler : public SimObject { public: typedef DVFSHandlerParams Params; - DVFSHandler(const Params *p); + DVFSHandler(const Params &p); typedef SrcClockDomain::DomainID DomainID; typedef SrcClockDomain::PerfLevel PerfLevel; diff --git a/src/sim/emul_driver.hh b/src/sim/emul_driver.hh index 9921d15b8..69d25ef61 100644 --- a/src/sim/emul_driver.hh +++ b/src/sim/emul_driver.hh @@ -58,8 +58,8 @@ class EmulatedDriver : public SimObject const std::string &filename; public: - EmulatedDriver(EmulatedDriverParams *p) - : SimObject(p), filename(p->filename) + EmulatedDriver(const EmulatedDriverParams &p) + : SimObject(p), filename(p.filename) { } diff --git a/src/sim/insttracer.hh b/src/sim/insttracer.hh index 284e04a53..22e248910 100644 --- a/src/sim/insttracer.hh +++ b/src/sim/insttracer.hh @@ -257,7 +257,7 @@ class InstRecord class InstTracer : public SimObject { public: - InstTracer(const Params *p) : SimObject(p) + InstTracer(const Params &p) : SimObject(p) {} virtual ~InstTracer() diff --git a/src/sim/kernel_workload.cc b/src/sim/kernel_workload.cc index d144872b1..9791dfc22 100644 --- a/src/sim/kernel_workload.cc +++ b/src/sim/kernel_workload.cc @@ -31,7 +31,7 @@ #include "params/KernelWorkload.hh" #include "sim/system.hh" -KernelWorkload::KernelWorkload(const Params &p) : Workload(&p), _params(p), +KernelWorkload::KernelWorkload(const Params &p) : Workload(p), _params(p), _loadAddrMask(p.load_addr_mask), _loadAddrOffset(p.load_addr_offset), commandLine(p.command_line) { @@ -137,7 +137,7 @@ KernelWorkload::unserialize(CheckpointIn &cp) } KernelWorkload * -KernelWorkloadParams::create() +KernelWorkloadParams::create() const { return new KernelWorkload(*this); } diff --git a/src/sim/power/mathexpr_powermodel.cc b/src/sim/power/mathexpr_powermodel.cc index 71131f58f..2f48034be 100644 --- a/src/sim/power/mathexpr_powermodel.cc +++ b/src/sim/power/mathexpr_powermodel.cc @@ -45,8 +45,8 @@ #include "sim/power/thermal_model.hh" #include "sim/sim_object.hh" -MathExprPowerModel::MathExprPowerModel(const Params *p) - : PowerModelState(p), dyn_expr(p->dyn), st_expr(p->st) +MathExprPowerModel::MathExprPowerModel(const Params &p) + : PowerModelState(p), dyn_expr(p.dyn), st_expr(p.st) { } @@ -115,7 +115,7 @@ MathExprPowerModel::regStats() } MathExprPowerModel* -MathExprPowerModelParams::create() +MathExprPowerModelParams::create() const { - return new MathExprPowerModel(this); + return new MathExprPowerModel(*this); } diff --git a/src/sim/power/mathexpr_powermodel.hh b/src/sim/power/mathexpr_powermodel.hh index 37ea1901d..deb425978 100644 --- a/src/sim/power/mathexpr_powermodel.hh +++ b/src/sim/power/mathexpr_powermodel.hh @@ -57,7 +57,7 @@ class MathExprPowerModel : public PowerModelState public: typedef MathExprPowerModelParams Params; - MathExprPowerModel(const Params *p); + MathExprPowerModel(const Params &p); /** * Get the dynamic power consumption. diff --git a/src/sim/power/power_model.cc b/src/sim/power/power_model.cc index ec1b62d1e..fa179e088 100644 --- a/src/sim/power/power_model.cc +++ b/src/sim/power/power_model.cc @@ -43,14 +43,14 @@ #include "sim/clocked_object.hh" #include "sim/sub_system.hh" -PowerModelState::PowerModelState(const Params *p) +PowerModelState::PowerModelState(const Params &p) : SimObject(p), _temp(0), clocked_object(NULL) { } -PowerModel::PowerModel(const Params *p) - : SimObject(p), states_pm(p->pm), subsystem(p->subsystem), - clocked_object(NULL), power_model_type(p->pm_type) +PowerModel::PowerModel(const Params &p) + : SimObject(p), states_pm(p.pm), subsystem(p.subsystem), + clocked_object(NULL), power_model_type(p.pm_type) { panic_if(subsystem == NULL, "Subsystem is NULL! This is not acceptable for a PowerModel!\n"); @@ -58,7 +58,7 @@ PowerModel::PowerModel(const Params *p) // The temperature passed here will be overwritten, if there is // a thermal model present for (auto & pms: states_pm){ - pms->setTemperature(p->ambient_temp); + pms->setTemperature(p.ambient_temp); } } @@ -88,9 +88,9 @@ PowerModel::regProbePoints() } PowerModel* -PowerModelParams::create() +PowerModelParams::create() const { - return new PowerModel(this); + return new PowerModel(*this); } double diff --git a/src/sim/power/power_model.hh b/src/sim/power/power_model.hh index 918b2d2b3..c8625ac96 100644 --- a/src/sim/power/power_model.hh +++ b/src/sim/power/power_model.hh @@ -56,7 +56,7 @@ class PowerModelState : public SimObject public: typedef PowerModelStateParams Params; - PowerModelState(const Params *p); + PowerModelState(const Params &p); /** * Get the dynamic power consumption. @@ -88,13 +88,13 @@ class PowerModelState : public SimObject dynamicPower .method(this, &PowerModelState::getDynamicPower) - .name(params()->name + ".dynamic_power") + .name(params().name + ".dynamic_power") .desc("Dynamic power for this object (Watts)") ; staticPower .method(this, &PowerModelState::getStaticPower) - .name(params()->name + ".static_power") + .name(params().name + ".static_power") .desc("Static power for this object (Watts)") ; } @@ -120,7 +120,7 @@ class PowerModel : public SimObject public: typedef PowerModelParams Params; - PowerModel(const Params *p); + PowerModel(const Params &p); /** * Get the dynamic power consumption. @@ -141,13 +141,13 @@ class PowerModel : public SimObject dynamicPower .method(this, &PowerModel::getDynamicPower) - .name(params()->name + ".dynamic_power") + .name(params().name + ".dynamic_power") .desc("Dynamic power for this power state") ; staticPower .method(this, &PowerModel::getStaticPower) - .name(params()->name + ".static_power") + .name(params().name + ".static_power") .desc("Static power for this power state") ; } diff --git a/src/sim/power/thermal_domain.cc b/src/sim/power/thermal_domain.cc index 5b7263a7b..11a9ca969 100644 --- a/src/sim/power/thermal_domain.cc +++ b/src/sim/power/thermal_domain.cc @@ -48,8 +48,8 @@ #include "sim/probe/probe.hh" #include "sim/sub_system.hh" -ThermalDomain::ThermalDomain(const Params *p) - : SimObject(p), _initTemperature(p->initial_temperature), +ThermalDomain::ThermalDomain(const Params &p) + : SimObject(p), _initTemperature(p.initial_temperature), node(NULL), subsystem(NULL) { } @@ -77,7 +77,7 @@ ThermalDomain::regStats() currentTemp .method(this, &ThermalDomain::currentTemperature) - .name(params()->name + ".temp") + .name(params().name + ".temp") .desc("Temperature in centigrate degrees") ; } @@ -89,9 +89,9 @@ ThermalDomain::emitUpdate() } ThermalDomain * -ThermalDomainParams::create() +ThermalDomainParams::create() const { - return new ThermalDomain(this); + return new ThermalDomain(*this); } void diff --git a/src/sim/power/thermal_domain.hh b/src/sim/power/thermal_domain.hh index 31996d95f..323ba2b60 100644 --- a/src/sim/power/thermal_domain.hh +++ b/src/sim/power/thermal_domain.hh @@ -59,7 +59,7 @@ class ThermalDomain : public SimObject, public ThermalEntity public: typedef ThermalDomainParams Params; - ThermalDomain(const Params *p); + ThermalDomain(const Params &p); /** * Get the startup temperature. diff --git a/src/sim/power/thermal_model.cc b/src/sim/power/thermal_model.cc index 98af02185..c6a50ad47 100644 --- a/src/sim/power/thermal_model.cc +++ b/src/sim/power/thermal_model.cc @@ -49,15 +49,15 @@ /** * ThermalReference */ -ThermalReference::ThermalReference(const Params *p) - : SimObject(p), _temperature(p->temperature), node(NULL) +ThermalReference::ThermalReference(const Params &p) + : SimObject(p), _temperature(p.temperature), node(NULL) { } ThermalReference * -ThermalReferenceParams::create() +ThermalReferenceParams::create() const { - return new ThermalReference(this); + return new ThermalReference(*this); } void @@ -82,15 +82,15 @@ ThermalReference::getEquation(ThermalNode * n, unsigned nnodes, /** * ThermalResistor */ -ThermalResistor::ThermalResistor(const Params *p) - : SimObject(p), _resistance(p->resistance), node1(NULL), node2(NULL) +ThermalResistor::ThermalResistor(const Params &p) + : SimObject(p), _resistance(p.resistance), node1(NULL), node2(NULL) { } ThermalResistor * -ThermalResistorParams::create() +ThermalResistorParams::create() const { - return new ThermalResistor(this); + return new ThermalResistor(*this); } void @@ -135,15 +135,15 @@ ThermalResistor::getEquation(ThermalNode * n, unsigned nnodes, /** * ThermalCapacitor */ -ThermalCapacitor::ThermalCapacitor(const Params *p) - : SimObject(p), _capacitance(p->capacitance), node1(NULL), node2(NULL) +ThermalCapacitor::ThermalCapacitor(const Params &p) + : SimObject(p), _capacitance(p.capacitance), node1(NULL), node2(NULL) { } ThermalCapacitor * -ThermalCapacitorParams::create() +ThermalCapacitorParams::create() const { - return new ThermalCapacitor(this); + return new ThermalCapacitor(*this); } void @@ -191,15 +191,15 @@ ThermalCapacitor::getEquation(ThermalNode * n, unsigned nnodes, /** * ThermalModel */ -ThermalModel::ThermalModel(const Params *p) - : ClockedObject(p), stepEvent([this]{ doStep(); }, name()), _step(p->step) +ThermalModel::ThermalModel(const Params &p) + : ClockedObject(p), stepEvent([this]{ doStep(); }, name()), _step(p.step) { } ThermalModel * -ThermalModelParams::create() +ThermalModelParams::create() const { - return new ThermalModel(this); + return new ThermalModel(*this); } void diff --git a/src/sim/power/thermal_model.hh b/src/sim/power/thermal_model.hh index c0408d929..81c1de8f2 100644 --- a/src/sim/power/thermal_model.hh +++ b/src/sim/power/thermal_model.hh @@ -60,7 +60,7 @@ class ThermalResistor : public SimObject, public ThermalEntity { public: typedef ThermalResistorParams Params; - ThermalResistor(const Params *p); + ThermalResistor(const Params &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; @@ -89,7 +89,7 @@ class ThermalCapacitor : public SimObject, public ThermalEntity { public: typedef ThermalCapacitorParams Params; - ThermalCapacitor(const Params *p); + ThermalCapacitor(const Params &p); void serialize(CheckpointOut &cp) const override; void unserialize(CheckpointIn &cp) override; @@ -117,9 +117,11 @@ class ThermalReference : public SimObject, public ThermalEntity { public: typedef ThermalReferenceParams Params; - ThermalReference(const Params *p); + ThermalReference(const Params &p); - void setNode(ThermalNode * n) { + void + setNode(ThermalNode *n) + { node = n; } @@ -148,7 +150,7 @@ class ThermalModel : public ClockedObject { public: typedef ThermalModelParams Params; - ThermalModel(const Params *p); + ThermalModel(const Params &p); void addDomain(ThermalDomain * d); void addReference(ThermalReference * r); diff --git a/src/sim/power/thermal_node.cc b/src/sim/power/thermal_node.cc index abd23109a..d2d05e619 100644 --- a/src/sim/power/thermal_node.cc +++ b/src/sim/power/thermal_node.cc @@ -43,13 +43,13 @@ /** * ThermalNode */ -ThermalNode::ThermalNode(const ThermalNodeParams *p) +ThermalNode::ThermalNode(const ThermalNodeParams &p) : SimObject(p), id(-1), isref(false), temp(0.0f) { } ThermalNode * -ThermalNodeParams::create() +ThermalNodeParams::create() const { - return new ThermalNode(this); + return new ThermalNode(*this); } diff --git a/src/sim/power/thermal_node.hh b/src/sim/power/thermal_node.hh index 5ef602eb1..68867b39e 100644 --- a/src/sim/power/thermal_node.hh +++ b/src/sim/power/thermal_node.hh @@ -50,7 +50,7 @@ struct ThermalNodeParams; class ThermalNode : public SimObject { public: - ThermalNode(const ThermalNodeParams *p); + ThermalNode(const ThermalNodeParams &p); int id; bool isref; diff --git a/src/sim/power_domain.cc b/src/sim/power_domain.cc index 0434e1eb2..c7a6b0899 100644 --- a/src/sim/power_domain.cc +++ b/src/sim/power_domain.cc @@ -42,9 +42,9 @@ #include "base/trace.hh" #include "debug/PowerDomain.hh" -PowerDomain::PowerDomain(const PowerDomainParams* p) : +PowerDomain::PowerDomain(const PowerDomainParams &p) : PowerState(p), - leaders(p->leaders), + leaders(p.leaders), pwrStateUpdateEvent(*this), stats(*this) { @@ -265,7 +265,7 @@ PowerDomain::PowerDomainStats::regStats() } PowerDomain* -PowerDomainParams::create() +PowerDomainParams::create() const { - return new PowerDomain(this); + return new PowerDomain(*this); } diff --git a/src/sim/power_domain.hh b/src/sim/power_domain.hh index c5294a6e2..b07b6de13 100644 --- a/src/sim/power_domain.hh +++ b/src/sim/power_domain.hh @@ -56,7 +56,7 @@ class PowerDomain : public PowerState { public: - PowerDomain(const PowerDomainParams* p); + PowerDomain(const PowerDomainParams &p); typedef PowerDomainParams Params; ~PowerDomain() override {}; diff --git a/src/sim/power_state.cc b/src/sim/power_state.cc index cb7487300..37ab87fac 100644 --- a/src/sim/power_state.cc +++ b/src/sim/power_state.cc @@ -42,13 +42,13 @@ #include "debug/PowerDomain.hh" #include "sim/power_domain.hh" -PowerState::PowerState(const PowerStateParams *p) : - SimObject(p), _currState(p->default_state), - possibleStates(p->possible_states.begin(), - p->possible_states.end()), +PowerState::PowerState(const PowerStateParams &p) : + SimObject(p), _currState(p.default_state), + possibleStates(p.possible_states.begin(), + p.possible_states.end()), stats(*this) { - for (auto &pm: p->leaders) { + for (auto &pm: p.leaders) { // Register this object as a follower. This object is // dependent on pm for power state transitions pm->addFollower(this); @@ -235,16 +235,15 @@ PowerState::PowerStateStats::regStats() using namespace Stats; - const PowerStateParams *p = powerState.params(); + const PowerStateParams &p = powerState.params(); numTransitions.flags(nozero); numPwrMatchStateTransitions.flags(nozero); // Each sample is time in ticks - unsigned num_bins = std::max(p->clk_gate_bins, 10U); + unsigned num_bins = std::max(p.clk_gate_bins, 10U); ticksClkGated - .init(p->clk_gate_min, p->clk_gate_max, - (p->clk_gate_max / num_bins)) + .init(p.clk_gate_min, p.clk_gate_max, (p.clk_gate_max / num_bins)) .flags(pdf | nozero | nonan) ; @@ -276,7 +275,7 @@ PowerState::PowerStateStats::preDumpStats() } PowerState* -PowerStateParams::create() +PowerStateParams::create() const { - return new PowerState(this); + return new PowerState(*this); } diff --git a/src/sim/power_state.hh b/src/sim/power_state.hh index 13e36e585..fe869ff71 100644 --- a/src/sim/power_state.hh +++ b/src/sim/power_state.hh @@ -61,13 +61,14 @@ class PowerDomain; class PowerState : public SimObject { public: - PowerState(const PowerStateParams *p); + PowerState(const PowerStateParams &p); /** Parameters of PowerState object */ typedef PowerStateParams Params; - const Params* params() const + const Params & + params() const { - return reinterpret_cast(_params); + return reinterpret_cast(_params); } virtual void addFollower(PowerState* pwr_obj) {}; diff --git a/src/sim/probe/probe.cc b/src/sim/probe/probe.cc index 097b93e46..27067adab 100644 --- a/src/sim/probe/probe.cc +++ b/src/sim/probe/probe.cc @@ -48,9 +48,10 @@ ProbePoint::ProbePoint(ProbeManager *manager, const std::string& _name) } } -ProbeListenerObject::ProbeListenerObject(const ProbeListenerObjectParams *params) +ProbeListenerObject::ProbeListenerObject( + const ProbeListenerObjectParams ¶ms) : SimObject(params), - manager(params->manager->getProbeManager()) + manager(params.manager->getProbeManager()) { } @@ -74,9 +75,9 @@ ProbeListener::~ProbeListener() } ProbeListenerObject* -ProbeListenerObjectParams::create() +ProbeListenerObjectParams::create() const { - return new ProbeListenerObject(this); + return new ProbeListenerObject(*this); } bool diff --git a/src/sim/probe/probe.hh b/src/sim/probe/probe.hh index bc73eb01b..97edf0bd7 100644 --- a/src/sim/probe/probe.hh +++ b/src/sim/probe/probe.hh @@ -102,7 +102,7 @@ class ProbeListenerObject : public SimObject std::vector listeners; public: - ProbeListenerObject(const ProbeListenerObjectParams *params); + ProbeListenerObject(const ProbeListenerObjectParams ¶ms); virtual ~ProbeListenerObject(); ProbeManager* getProbeManager() { return manager; } }; diff --git a/src/sim/process.cc b/src/sim/process.cc index 9cf52aa23..3968adbd3 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -90,7 +90,8 @@ Process::Loader::Loader() } Process * -Process::tryLoaders(ProcessParams *params, ::Loader::ObjectFile *obj_file) +Process::tryLoaders(const ProcessParams ¶ms, + ::Loader::ObjectFile *obj_file) { for (auto &loader: process_loaders()) { Process *p = loader->load(params, obj_file); @@ -102,31 +103,31 @@ Process::tryLoaders(ProcessParams *params, ::Loader::ObjectFile *obj_file) } static std::string -normalize(std::string& directory) +normalize(const std::string& directory) { if (directory.back() != '/') - directory += '/'; + return directory + '/'; return directory; } -Process::Process(ProcessParams *params, EmulationPageTable *pTable, +Process::Process(const ProcessParams ¶ms, EmulationPageTable *pTable, ::Loader::ObjectFile *obj_file) - : SimObject(params), system(params->system), - useArchPT(params->useArchPT), - kvmInSE(params->kvmInSE), + : SimObject(params), system(params.system), + useArchPT(params.useArchPT), + kvmInSE(params.kvmInSE), useForClone(false), pTable(pTable), objFile(obj_file), - argv(params->cmd), envp(params->env), - executable(params->executable), - tgtCwd(normalize(params->cwd)), + argv(params.cmd), envp(params.env), + executable(params.executable == "" ? params.cmd[0] : params.executable), + tgtCwd(normalize(params.cwd)), hostCwd(checkPathRedirect(tgtCwd)), - release(params->release), - _uid(params->uid), _euid(params->euid), - _gid(params->gid), _egid(params->egid), - _pid(params->pid), _ppid(params->ppid), - _pgid(params->pgid), drivers(params->drivers), - fds(make_shared(params->input, params->output, params->errout)), + release(params.release), + _uid(params.uid), _euid(params.euid), + _gid(params.gid), _egid(params.egid), + _pid(params.pid), _ppid(params.ppid), + _pgid(params.pgid), drivers(params.drivers), + fds(make_shared(params.input, params.output, params.errout)), childClearTID(0) { if (_pid >= System::maxPID) @@ -148,7 +149,7 @@ Process::Process(ProcessParams *params, EmulationPageTable *pTable, * with a new, equivalent value. If CLONE_THREAD is specified, patch * the tgid value with the old process' value. */ - _tgid = params->pid; + _tgid = params.pid; exitGroup = new bool(); sigchld = new bool(); @@ -508,18 +509,16 @@ Process::absolutePath(const std::string &filename, bool host_filesystem) } Process * -ProcessParams::create() +ProcessParams::create() const { // If not specified, set the executable parameter equal to the // simulated system's zeroth command line parameter - if (executable == "") { - executable = cmd[0]; - } + const std::string &exec = (executable == "") ? cmd[0] : executable; - auto *obj_file = Loader::createObjectFile(executable); - fatal_if(!obj_file, "Cannot load object file %s.", executable); + auto *obj_file = Loader::createObjectFile(exec); + fatal_if(!obj_file, "Cannot load object file %s.", exec); - Process *process = Process::tryLoaders(this, obj_file); + Process *process = Process::tryLoaders(*this, obj_file); fatal_if(!process, "Unknown error creating process object."); return process; diff --git a/src/sim/process.hh b/src/sim/process.hh index 449e0a5aa..2234cb03e 100644 --- a/src/sim/process.hh +++ b/src/sim/process.hh @@ -65,7 +65,7 @@ class ThreadContext; class Process : public SimObject { public: - Process(ProcessParams *params, EmulationPageTable *pTable, + Process(const ProcessParams ¶ms, EmulationPageTable *pTable, ::Loader::ObjectFile *obj_file); void serialize(CheckpointOut &cp) const override; @@ -201,13 +201,13 @@ class Process : public SimObject * error like file IO errors, etc., those should fail non-silently * with a panic or fail as normal. */ - virtual Process *load(ProcessParams *params, + virtual Process *load(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file) = 0; }; // Try all the Loader instance's "load" methods one by one until one is // successful. If none are, complain and fail. - static Process *tryLoaders(ProcessParams *params, + static Process *tryLoaders(const ProcessParams ¶ms, ::Loader::ObjectFile *obj_file); ::Loader::ObjectFile *objFile; diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc index aacca7326..a50937438 100644 --- a/src/sim/pseudo_inst.cc +++ b/src/sim/pseudo_inst.cc @@ -214,7 +214,7 @@ loadsymbol(ThreadContext *tc) if (!FullSystem) panicFsOnlyPseudoInst("loadsymbol"); - const string &filename = tc->getCpuPtr()->system->params()->symbolfile; + const string &filename = tc->getCpuPtr()->system->params().symbolfile; if (filename.empty()) { return; } @@ -318,7 +318,7 @@ void resetstats(ThreadContext *tc, Tick delay, Tick period) { DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period); - if (!tc->getCpuPtr()->params()->do_statistics_insts) + if (!tc->getCpuPtr()->params().do_statistics_insts) return; @@ -332,7 +332,7 @@ void dumpstats(ThreadContext *tc, Tick delay, Tick period) { DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period); - if (!tc->getCpuPtr()->params()->do_statistics_insts) + if (!tc->getCpuPtr()->params().do_statistics_insts) return; @@ -346,7 +346,7 @@ void dumpresetstats(ThreadContext *tc, Tick delay, Tick period) { DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period); - if (!tc->getCpuPtr()->params()->do_statistics_insts) + if (!tc->getCpuPtr()->params().do_statistics_insts) return; @@ -360,7 +360,7 @@ void m5checkpoint(ThreadContext *tc, Tick delay, Tick period) { DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period); - if (!tc->getCpuPtr()->params()->do_checkpoint_insts) + if (!tc->getCpuPtr()->params().do_checkpoint_insts) return; if (DistIface::readyToCkpt(delay, period)) { @@ -380,7 +380,7 @@ readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset) return 0; } - const string &file = tc->getSystemPtr()->params()->readfile; + const string &file = tc->getSystemPtr()->params().readfile; if (file.empty()) { return ULL(0); } @@ -499,9 +499,9 @@ workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) { DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid); System *sys = tc->getSystemPtr(); - const System::Params *params = sys->params(); + const System::Params ¶ms = sys->params(); - if (params->exit_on_work_items) { + if (params.exit_on_work_items) { exitSimLoop("workbegin", static_cast(workid)); return; } @@ -515,20 +515,20 @@ workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) // If specified, determine if this is the specific work item the user // identified // - if (params->work_item_id == -1 || params->work_item_id == workid) { + if (params.work_item_id == -1 || params.work_item_id == workid) { uint64_t systemWorkBeginCount = sys->incWorkItemsBegin(); int cpuId = tc->getCpuPtr()->cpuId(); - if (params->work_cpus_ckpt_count != 0 && - sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { + if (params.work_cpus_ckpt_count != 0 && + sys->markWorkItem(cpuId) >= params.work_cpus_ckpt_count) { // // If active cpus equals checkpoint count, create checkpoint // exitSimLoop("checkpoint"); } - if (systemWorkBeginCount == params->work_begin_ckpt_count) { + if (systemWorkBeginCount == params.work_begin_ckpt_count) { // // Note: the string specified as the cause of the exit event must // exactly equal "checkpoint" inorder to create a checkpoint @@ -536,14 +536,14 @@ workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid) exitSimLoop("checkpoint"); } - if (systemWorkBeginCount == params->work_begin_exit_count) { + if (systemWorkBeginCount == params.work_begin_exit_count) { // // If a certain number of work items started, exit simulation // exitSimLoop("work started count reach"); } - if (cpuId == params->work_begin_cpu_id_exit) { + if (cpuId == params.work_begin_cpu_id_exit) { // // If work started on the cpu id specified, exit simulation // @@ -562,9 +562,9 @@ workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) { DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid); System *sys = tc->getSystemPtr(); - const System::Params *params = sys->params(); + const System::Params ¶ms = sys->params(); - if (params->exit_on_work_items) { + if (params.exit_on_work_items) { exitSimLoop("workend", static_cast(workid)); return; } @@ -577,21 +577,21 @@ workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) // If specified, determine if this is the specific work item the user // identified // - if (params->work_item_id == -1 || params->work_item_id == workid) { + if (params.work_item_id == -1 || params.work_item_id == workid) { uint64_t systemWorkEndCount = sys->incWorkItemsEnd(); int cpuId = tc->getCpuPtr()->cpuId(); - if (params->work_cpus_ckpt_count != 0 && - sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) { + if (params.work_cpus_ckpt_count != 0 && + sys->markWorkItem(cpuId) >= params.work_cpus_ckpt_count) { // // If active cpus equals checkpoint count, create checkpoint // exitSimLoop("checkpoint"); } - if (params->work_end_ckpt_count != 0 && - systemWorkEndCount == params->work_end_ckpt_count) { + if (params.work_end_ckpt_count != 0 && + systemWorkEndCount == params.work_end_ckpt_count) { // // If total work items completed equals checkpoint count, create // checkpoint @@ -599,8 +599,8 @@ workend(ThreadContext *tc, uint64_t workid, uint64_t threadid) exitSimLoop("checkpoint"); } - if (params->work_end_exit_count != 0 && - systemWorkEndCount == params->work_end_exit_count) { + if (params.work_end_exit_count != 0 && + systemWorkEndCount == params.work_end_exit_count) { // // If total work items completed equals exit count, exit simulation // diff --git a/src/sim/redirect_path.cc b/src/sim/redirect_path.cc index f911daf82..912c4585a 100644 --- a/src/sim/redirect_path.cc +++ b/src/sim/redirect_path.cc @@ -44,18 +44,18 @@ normalizePath(std::string path) return path; } -RedirectPath::RedirectPath(const RedirectPathParams *p) +RedirectPath::RedirectPath(const RedirectPathParams &p) : SimObject(p) { - _appPath = normalizePath(p->app_path); + _appPath = normalizePath(p.app_path); - for (auto hp : p->host_paths) { + for (auto hp : p.host_paths) { _hostPaths.push_back(normalizePath(hp)); } } RedirectPath* -RedirectPathParams::create() +RedirectPathParams::create() const { - return new RedirectPath(this); + return new RedirectPath(*this); } diff --git a/src/sim/redirect_path.hh b/src/sim/redirect_path.hh index b98f54d60..e7e684b8c 100644 --- a/src/sim/redirect_path.hh +++ b/src/sim/redirect_path.hh @@ -43,7 +43,7 @@ class RedirectPath : public SimObject { public: - RedirectPath(const RedirectPathParams *p); + RedirectPath(const RedirectPathParams &p); const std::string& appPath() { return _appPath; }; const std::vector& hostPaths() { return _hostPaths; }; diff --git a/src/sim/root.cc b/src/sim/root.cc index e1c6a7b6f..d9098a671 100644 --- a/src/sim/root.cc +++ b/src/sim/root.cc @@ -163,18 +163,18 @@ Root::timeSyncSpinThreshold(Time newThreshold) timeSyncEnable(en); } -Root::Root(RootParams *p) - : SimObject(p), _enabled(false), _periodTick(p->time_sync_period), +Root::Root(const RootParams &p) + : SimObject(p), _enabled(false), _periodTick(p.time_sync_period), syncEvent([this]{ timeSync(); }, name()) { - _period.setTick(p->time_sync_period); - _spinThreshold.setTick(p->time_sync_spin_threshold); + _period.setTick(p.time_sync_period); + _spinThreshold.setTick(p.time_sync_spin_threshold); assert(_root == NULL); _root = this; lastTime.setTimer(); - simQuantum = p->sim_quantum; + simQuantum = p.sim_quantum; // Some of the statistics are global and need to be accessed by // stat formulas. The most convenient way to implement that is by @@ -186,7 +186,7 @@ Root::Root(RootParams *p) void Root::startup() { - timeSyncEnable(params()->time_sync_enable); + timeSyncEnable(params().time_sync_enable); } void @@ -202,7 +202,7 @@ bool FullSystem; unsigned int FullSystemInt; Root * -RootParams::create() +RootParams::create() const { static bool created = false; if (created) @@ -213,5 +213,5 @@ RootParams::create() FullSystem = full_system; FullSystemInt = full_system ? 1 : 0; - return new Root(this); + return new Root(*this); } diff --git a/src/sim/root.hh b/src/sim/root.hh index a88673a7b..fa152ff2d 100644 --- a/src/sim/root.hh +++ b/src/sim/root.hh @@ -132,13 +132,13 @@ class Root : public SimObject void timeSyncSpinThreshold(Time newThreshold); typedef RootParams Params; - const Params * + const Params & params() const { - return dynamic_cast(_params); + return dynamic_cast(_params); } - Root(Params *p); + Root(const Params &p); /** Schedule the timesync event at startup(). */ diff --git a/src/sim/se_workload.cc b/src/sim/se_workload.cc index dccd7ca5c..2cd383897 100644 --- a/src/sim/se_workload.cc +++ b/src/sim/se_workload.cc @@ -31,7 +31,7 @@ #include "params/SEWorkload.hh" #include "sim/process.hh" -SEWorkload::SEWorkload(const Params &p) : Workload(&p), _params(p) +SEWorkload::SEWorkload(const Params &p) : Workload(p), _params(p) {} void @@ -41,7 +41,7 @@ SEWorkload::syscall(ThreadContext *tc) } SEWorkload * -SEWorkloadParams::create() +SEWorkloadParams::create() const { return new SEWorkload(*this); } diff --git a/src/sim/sim_object.cc b/src/sim/sim_object.cc index 7a4b24e7a..58780b2d7 100644 --- a/src/sim/sim_object.cc +++ b/src/sim/sim_object.cc @@ -52,8 +52,8 @@ SimObject::SimObjectList SimObject::simObjectList; // // SimObject constructor: used to maintain static simObjectList // -SimObject::SimObject(const Params *p) - : EventManager(getEventQueue(p->eventq_index)), +SimObject::SimObject(const Params &p) + : EventManager(getEventQueue(p.eventq_index)), Stats::Group(nullptr), _params(p) { diff --git a/src/sim/sim_object.hh b/src/sim/sim_object.hh index 2b94ca4cf..ca2e1d5c3 100644 --- a/src/sim/sim_object.hh +++ b/src/sim/sim_object.hh @@ -107,7 +107,7 @@ class SimObject : public EventManager, public Serializable, public Drainable, * * @ingroup api_simobject */ - const SimObjectParams *_params; + const SimObjectParams &_params; public: typedef SimObjectParams Params; @@ -116,12 +116,12 @@ class SimObject : public EventManager, public Serializable, public Drainable, * * @ingroup api_simobject */ - const Params *params() const { return _params; } + const Params ¶ms() const { return _params; } /** * @ingroup api_simobject */ - SimObject(const Params *_params); + SimObject(const Params &_params); virtual ~SimObject(); @@ -130,7 +130,7 @@ class SimObject : public EventManager, public Serializable, public Drainable, /** * @ingroup api_simobject */ - virtual const std::string name() const { return params()->name; } + virtual const std::string name() const { return params().name; } /** * init() is called after all C++ SimObjects have been created and diff --git a/src/sim/sub_system.cc b/src/sim/sub_system.cc index 294d1b4f5..2c0b1aa35 100644 --- a/src/sim/sub_system.cc +++ b/src/sim/sub_system.cc @@ -41,12 +41,12 @@ #include "sim/power/power_model.hh" #include "sim/power/thermal_domain.hh" -SubSystem::SubSystem(const Params *p) +SubSystem::SubSystem(const Params &p) : SimObject(p) { // Link thermalDomain <-> SubSystem - if (p->thermal_domain) - p->thermal_domain->setSubSystem(this); + if (p.thermal_domain) + p.thermal_domain->setSubSystem(this); } double @@ -68,7 +68,7 @@ SubSystem::getStaticPower() const } SubSystem * -SubSystemParams::create() +SubSystemParams::create() const { - return new SubSystem(this); + return new SubSystem(*this); } diff --git a/src/sim/sub_system.hh b/src/sim/sub_system.hh index 548e73548..dfa97612e 100644 --- a/src/sim/sub_system.hh +++ b/src/sim/sub_system.hh @@ -58,7 +58,7 @@ class SubSystem : public SimObject { public: typedef SubSystemParams Params; - SubSystem(const Params *p); + SubSystem(const Params &p); double getDynamicPower() const; diff --git a/src/sim/system.cc b/src/sim/system.cc index 9011a75a5..46b92622b 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -205,32 +205,32 @@ System::Threads::quiesceTick(ContextID id, Tick when) int System::numSystemsRunning = 0; -System::System(Params *p) +System::System(const Params &p) : SimObject(p), _systemPort("system_port", this), - multiThread(p->multi_thread), + multiThread(p.multi_thread), pagePtr(0), - init_param(p->init_param), - physProxy(_systemPort, p->cache_line_size), - workload(p->workload), + init_param(p.init_param), + physProxy(_systemPort, p.cache_line_size), + workload(p.workload), #if USE_KVM - kvmVM(p->kvm_vm), + kvmVM(p.kvm_vm), #else kvmVM(nullptr), #endif - physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve, - p->shared_backstore), - memoryMode(p->mem_mode), - _cacheLineSize(p->cache_line_size), + physmem(name() + ".physmem", p.memories, p.mmap_using_noreserve, + p.shared_backstore), + memoryMode(p.mem_mode), + _cacheLineSize(p.cache_line_size), workItemsBegin(0), workItemsEnd(0), - numWorkIds(p->num_work_ids), - thermalModel(p->thermal_model), + numWorkIds(p.num_work_ids), + thermalModel(p.thermal_model), _params(p), - _m5opRange(p->m5ops_base ? - RangeSize(p->m5ops_base, 0x10000) : + _m5opRange(p.m5ops_base ? + RangeSize(p.m5ops_base, 0x10000) : AddrRange(1, 0)), // Create an empty range if disabled totalNumInsts(0), - redirectPaths(p->redirect_paths) + redirectPaths(p.redirect_paths) { if (workload) workload->system = this; @@ -262,8 +262,8 @@ System::System(Params *p) numSystemsRunning++; // Set back pointers to the system in all memories - for (int x = 0; x < params()->memories.size(); x++) - params()->memories[x]->system(this); + for (int x = 0; x < params().memories.size(); x++) + params().memories[x]->system(this); } System::~System() @@ -653,7 +653,7 @@ System::getRequestorName(RequestorID requestor_id) } System * -SystemParams::create() +SystemParams::create() const { - return new System(this); + return new System(*this); } diff --git a/src/sim/system.hh b/src/sim/system.hh index e5d4ec625..4b4461686 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -381,7 +381,7 @@ class System : public SimObject, public PCEventScope ByteOrder getGuestByteOrder() const { - return _params->byte_order; + return _params.byte_order; } /** @@ -558,7 +558,7 @@ class System : public SimObject, public PCEventScope typedef SystemParams Params; protected: - Params *_params; + const Params &_params; /** * Range for memory-mapped m5 pseudo ops. The range will be @@ -567,10 +567,10 @@ class System : public SimObject, public PCEventScope const AddrRange _m5opRange; public: - System(Params *p); + System(const Params &p); ~System(); - const Params *params() const { return (const Params *)_params; } + const Params ¶ms() const { return (const Params &)_params; } /** * Range used by memory-mapped m5 pseudo-ops if enabled. Returns diff --git a/src/sim/ticked_object.cc b/src/sim/ticked_object.cc index 7af439cd5..3564b4d03 100644 --- a/src/sim/ticked_object.cc +++ b/src/sim/ticked_object.cc @@ -106,7 +106,7 @@ Ticked::unserialize(CheckpointIn &cp) lastStopped = Cycles(lastStoppedUint); } -TickedObject::TickedObject(const TickedObjectParams *params, +TickedObject::TickedObject(const TickedObjectParams ¶ms, Event::Priority priority) : ClockedObject(params), /* Make numCycles in Ticked */ diff --git a/src/sim/ticked_object.hh b/src/sim/ticked_object.hh index 91a85edcf..399161808 100644 --- a/src/sim/ticked_object.hh +++ b/src/sim/ticked_object.hh @@ -163,7 +163,7 @@ class Ticked : public Serializable class TickedObject : public ClockedObject, public Ticked { public: - TickedObject(const TickedObjectParams *params, + TickedObject(const TickedObjectParams ¶ms, Event::Priority priority = Event::CPU_Tick_Pri); /** Disambiguate to make these functions overload correctly */ diff --git a/src/sim/voltage_domain.cc b/src/sim/voltage_domain.cc index 5a973fa5f..14d7c869f 100644 --- a/src/sim/voltage_domain.cc +++ b/src/sim/voltage_domain.cc @@ -45,8 +45,8 @@ #include "params/VoltageDomain.hh" #include "sim/sim_object.hh" -VoltageDomain::VoltageDomain(const Params *p) - : SimObject(p), voltageOpPoints(p->voltage), _perfLevel(0), stats(*this) +VoltageDomain::VoltageDomain(const Params &p) + : SimObject(p), voltageOpPoints(p.voltage), _perfLevel(0), stats(*this) { fatal_if(voltageOpPoints.empty(), "DVFS: Empty set of voltages for "\ "voltage domain %s\n", name()); @@ -125,9 +125,9 @@ VoltageDomain::startup() { } VoltageDomain * -VoltageDomainParams::create() +VoltageDomainParams::create() const { - return new VoltageDomain(this); + return new VoltageDomain(*this); } void diff --git a/src/sim/voltage_domain.hh b/src/sim/voltage_domain.hh index 5ab8c6060..ebda786b5 100644 --- a/src/sim/voltage_domain.hh +++ b/src/sim/voltage_domain.hh @@ -55,7 +55,7 @@ class VoltageDomain : public SimObject public: typedef VoltageDomainParams Params; - VoltageDomain(const Params *p); + VoltageDomain(const Params &p); typedef SrcClockDomain::PerfLevel PerfLevel; diff --git a/src/sim/workload.hh b/src/sim/workload.hh index 7c1b66d39..60b1cff75 100644 --- a/src/sim/workload.hh +++ b/src/sim/workload.hh @@ -55,7 +55,7 @@ class Workload : public SimObject } stats; public: - Workload(const WorkloadParams *_params) : SimObject(_params), stats(this) + Workload(const WorkloadParams &_params) : SimObject(_params), stats(this) {} void recordQuiesce() { stats.quiesce++; } diff --git a/src/systemc/core/kernel.cc b/src/systemc/core/kernel.cc index 15cb3da17..75e5bc94a 100644 --- a/src/systemc/core/kernel.cc +++ b/src/systemc/core/kernel.cc @@ -54,7 +54,7 @@ bool Kernel::endOfSimulationComplete() { return endComplete; } sc_core::sc_status Kernel::status() { return _status; } void Kernel::status(sc_core::sc_status s) { _status = s; } -Kernel::Kernel(Params *params) : +Kernel::Kernel(const Params ¶ms) : SimObject(params), t0Event(this, false, EventBase::Default_Pri - 1) { // Install ourselves as the scheduler's event manager. @@ -183,10 +183,10 @@ Kernel *kernel; } // namespace sc_gem5 sc_gem5::Kernel * -SystemC_KernelParams::create() +SystemC_KernelParams::create() const { panic_if(sc_gem5::kernel, "Only one systemc kernel object may be defined.\n"); - sc_gem5::kernel = new sc_gem5::Kernel(this); + sc_gem5::kernel = new sc_gem5::Kernel(*this); return sc_gem5::kernel; } diff --git a/src/systemc/core/kernel.hh b/src/systemc/core/kernel.hh index 44c1b87dc..c58e0f129 100644 --- a/src/systemc/core/kernel.hh +++ b/src/systemc/core/kernel.hh @@ -46,7 +46,7 @@ class Kernel : public SimObject { public: typedef SystemC_KernelParams Params; - Kernel(Params *params); + Kernel(const Params ¶ms); void init() override; void regStats() override; diff --git a/src/systemc/tlm_bridge/gem5_to_tlm.cc b/src/systemc/tlm_bridge/gem5_to_tlm.cc index ffcd53127..ba8f121a2 100644 --- a/src/systemc/tlm_bridge/gem5_to_tlm.cc +++ b/src/systemc/tlm_bridge/gem5_to_tlm.cc @@ -441,14 +441,14 @@ Gem5ToTlmBridge::invalidate_direct_mem_ptr( template Gem5ToTlmBridge::Gem5ToTlmBridge( - Params *params, const sc_core::sc_module_name &mn) : + const Params ¶ms, const sc_core::sc_module_name &mn) : Gem5ToTlmBridgeBase(mn), bridgeResponsePort(std::string(name()) + ".gem5", *this), socket("tlm_socket"), wrapper(socket, std::string(name()) + ".tlm", InvalidPortID), - system(params->system), blockingRequest(nullptr), + system(params.system), blockingRequest(nullptr), needToSendRequestRetry(false), blockingResponse(nullptr), - addrRanges(params->addr_ranges.begin(), params->addr_ranges.end()) + addrRanges(params.addr_ranges.begin(), params.addr_ranges.end()) { } @@ -479,15 +479,15 @@ Gem5ToTlmBridge::before_end_of_elaboration() } // namespace sc_gem5 sc_gem5::Gem5ToTlmBridge<32> * -Gem5ToTlmBridge32Params::create() +Gem5ToTlmBridge32Params::create() const { return new sc_gem5::Gem5ToTlmBridge<32>( - this, sc_core::sc_module_name(name.c_str())); + *this, sc_core::sc_module_name(name.c_str())); } sc_gem5::Gem5ToTlmBridge<64> * -Gem5ToTlmBridge64Params::create() +Gem5ToTlmBridge64Params::create() const { return new sc_gem5::Gem5ToTlmBridge<64>( - this, sc_core::sc_module_name(name.c_str())); + *this, sc_core::sc_module_name(name.c_str())); } diff --git a/src/systemc/tlm_bridge/gem5_to_tlm.hh b/src/systemc/tlm_bridge/gem5_to_tlm.hh index 1fe084028..25720278e 100644 --- a/src/systemc/tlm_bridge/gem5_to_tlm.hh +++ b/src/systemc/tlm_bridge/gem5_to_tlm.hh @@ -189,7 +189,7 @@ class Gem5ToTlmBridge : public Gem5ToTlmBridgeBase ::Port &gem5_getPort(const std::string &if_name, int idx=-1) override; typedef Gem5ToTlmBridgeBaseParams Params; - Gem5ToTlmBridge(Params *p, const sc_core::sc_module_name &mn); + Gem5ToTlmBridge(const Params &p, const sc_core::sc_module_name &mn); tlm_utils::simple_initiator_socket, BITWIDTH> & getSocket() diff --git a/src/systemc/tlm_bridge/tlm_to_gem5.cc b/src/systemc/tlm_bridge/tlm_to_gem5.cc index 3891f58af..0cc0d7ff4 100644 --- a/src/systemc/tlm_bridge/tlm_to_gem5.cc +++ b/src/systemc/tlm_bridge/tlm_to_gem5.cc @@ -477,14 +477,14 @@ TlmToGem5Bridge::gem5_getPort(const std::string &if_name, int idx) template TlmToGem5Bridge::TlmToGem5Bridge( - Params *params, const sc_core::sc_module_name &mn) : + const Params ¶ms, const sc_core::sc_module_name &mn) : TlmToGem5BridgeBase(mn), peq(this, &TlmToGem5Bridge::peq_cb), waitForRetry(false), pendingRequest(nullptr), pendingPacket(nullptr), needToSendRetry(false), responseInProgress(false), bmp(std::string(name()) + "master", *this), socket("tlm_socket"), wrapper(socket, std::string(name()) + ".tlm", InvalidPortID), - system(params->system), - _id(params->system->getGlobalRequestorId( + system(params.system), + _id(params.system->getGlobalRequestorId( std::string("[systemc].") + name())) { } @@ -524,15 +524,15 @@ TlmToGem5Bridge::before_end_of_elaboration() } // namespace sc_gem5 sc_gem5::TlmToGem5Bridge<32> * -TlmToGem5Bridge32Params::create() +TlmToGem5Bridge32Params::create() const { return new sc_gem5::TlmToGem5Bridge<32>( - this, sc_core::sc_module_name(name.c_str())); + *this, sc_core::sc_module_name(name.c_str())); } sc_gem5::TlmToGem5Bridge<64> * -TlmToGem5Bridge64Params::create() +TlmToGem5Bridge64Params::create() const { return new sc_gem5::TlmToGem5Bridge<64>( - this, sc_core::sc_module_name(name.c_str())); + *this, sc_core::sc_module_name(name.c_str())); } diff --git a/src/systemc/tlm_bridge/tlm_to_gem5.hh b/src/systemc/tlm_bridge/tlm_to_gem5.hh index f1e3e081a..279f76d64 100644 --- a/src/systemc/tlm_bridge/tlm_to_gem5.hh +++ b/src/systemc/tlm_bridge/tlm_to_gem5.hh @@ -161,7 +161,7 @@ class TlmToGem5Bridge : public TlmToGem5BridgeBase ::Port &gem5_getPort(const std::string &if_name, int idx=-1) override; typedef TlmToGem5BridgeBaseParams Params; - TlmToGem5Bridge(Params *p, const sc_core::sc_module_name &mn); + TlmToGem5Bridge(const Params &p, const sc_core::sc_module_name &mn); tlm_utils::simple_target_socket, BITWIDTH> & getSocket() -- 2.30.2