From 923f65fec50038203f2db4fd373c8fa37cd52e54 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Mon, 7 Dec 2020 00:33:57 +0000
Subject: [PATCH]

---
 3d_gpu/architecture/dynamic_simd.mdwn | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn
index d00a90b8b..478842e7c 100644
--- a/3d_gpu/architecture/dynamic_simd.mdwn
+++ b/3d_gpu/architecture/dynamic_simd.mdwn
@@ -1,5 +1,8 @@
 # Dynamic Partitioned SIMD
 
+Links:
+* <https://bugs.libre-soc.org/show_bug.cgi?id=458>
+
 To save hugely on gate count the normal practice of having separate scalar ALUs and separate SIMD ALUs is not followed.
 
 Instead a suite of "partition points" identical in fashion to the Aspex Microelectronics ASP (Array-String-Architecture) architecture is deployed.
-- 
2.30.2