From 928605936939d4364b5019b2bdda63612fbc4fdb Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Tue, 28 Jan 2020 13:59:34 +0200 Subject: [PATCH] [ARC] Pass along -mcode-density flag to the assembler. This change makes sure that if the driver is invoked with "-mcode-density" flag, then the assembler will receive it too. Note Claudiu Zissulescu: This is an old patch of which I forgot to add the test. testsuite/ 2019-09-03 Sahahb Vahedi * gcc.target/arc/code-density-flag.c: New test. --- gcc/testsuite/ChangeLog | 4 +++ .../gcc.target/arc/code-density-flag.c | 34 +++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 gcc/testsuite/gcc.target/arc/code-density-flag.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index d9441cb0a2e..c08bc22b5a0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2020-01-28 Sahahb Vahedi + + * gcc.target/arc/code-density-flag.c: New test + 2020-01-28 Tobias Burnus PR fortran/93464 diff --git a/gcc/testsuite/gcc.target/arc/code-density-flag.c b/gcc/testsuite/gcc.target/arc/code-density-flag.c new file mode 100644 index 00000000000..1ecf1a2ca29 --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/code-density-flag.c @@ -0,0 +1,34 @@ +/* Produce code-dense instructions and the assembler must * + * be okay with it. An example would be: * + * * + * sub_s r3, r1, r3 * + * * + * While generally for _short instructions_ , it is not * + * allowed to have different registers as the first and * + * second operands, the code-dense mode allows it. * + * This test is about the fact that if "-mcode-density" is * + * passed to gcc driver as the flag, "as" must receive it * + * as well, else it is going to choke on such encodings. */ + +/* { dg-do assemble } */ +/* { dg-skip-if "" { ! { clmcpu } } } */ +/* { dg-options "-mcpu=em_mini -mcode-density" } */ + +typedef long long uint64_t; + +uint64_t f1(void) +{ + return 1; +} + +void f2(void) +{ + uint64_t start_us = 0; + while ((f1() - start_us) < 2); +} + +/* This is a tricky check, because it hardcodes register * + * numbers. Nevertheless, it is easier than coming up with * + * a regular expression that the first two operands should * + * not be the same. */ +/* { dg-final { scan-assembler "sub_s\\s+r3,r1,r3" } } */ -- 2.30.2