From 92970adb4ba4e64422f46893642f8b85f4e130f5 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 23 Jan 2020 19:34:06 +0000 Subject: [PATCH] aco: fix operand to scc when selecting SGPR ufind_msb/ifind_msb MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Fixes: 93c8ebfa78 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_instruction_selection.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 7ce8e5d8aab..17be816d020 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -1139,7 +1139,7 @@ void visit_alu_instr(isel_context *ctx, nir_alu_instr *instr) Temp msb = sub.def(0).getTemp(); Temp carry = sub.def(1).getTemp(); - bld.sop2(aco_opcode::s_cselect_b32, Definition(dst), Operand((uint32_t)-1), msb, carry); + bld.sop2(aco_opcode::s_cselect_b32, Definition(dst), Operand((uint32_t)-1), msb, bld.scc(carry)); } else if (src.regClass() == v1) { aco_opcode op = instr->op == nir_op_ufind_msb ? aco_opcode::v_ffbh_u32 : aco_opcode::v_ffbh_i32; Temp msb_rev = bld.tmp(v1); -- 2.30.2