From 92f65418fcc19866f1eff988eca3750ee8c776f6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 10 Jun 2020 12:20:17 +0100 Subject: [PATCH] move to common ALUHelpers for CR test_pipe_caller.py --- src/soc/fu/cr/test/test_pipe_caller.py | 26 +++++++------------------- src/soc/fu/test/common.py | 19 ++++++++++++++++++- 2 files changed, 25 insertions(+), 20 deletions(-) diff --git a/src/soc/fu/cr/test/test_pipe_caller.py b/src/soc/fu/cr/test/test_pipe_caller.py index 7bf1e260..50bb6903 100644 --- a/src/soc/fu/cr/test/test_pipe_caller.py +++ b/src/soc/fu/cr/test/test_pipe_caller.py @@ -12,7 +12,7 @@ from soc.simulator.program import Program from soc.decoder.isa.all import ISA -from soc.fu.test.common import TestCase +from soc.fu.test.common import TestCase, ALUHelpers from soc.fu.cr.pipeline import CRBasePipe from soc.fu.cr.pipe_data import CRPipeSpec import random @@ -194,24 +194,12 @@ class TestRunner(FHDLTestCase): def set_inputs(self, alu, dec2, simulator): inp = yield from get_cu_inputs(dec2, simulator) - if 'full_cr' in inp: - yield alu.p.data_i.full_cr.eq(inp['full_cr']) - else: - yield alu.p.data_i.full_cr.eq(0) - if 'cr_a' in inp: - yield alu.p.data_i.cr_a.eq(inp['cr_a']) - if 'cr_b' in inp: - yield alu.p.data_i.cr_b.eq(inp['cr_b']) - if 'cr_c' in inp: - yield alu.p.data_i.cr_c.eq(inp['cr_c']) - if 'ra' in inp: - yield alu.p.data_i.ra.eq(inp['ra']) - else: - yield alu.p.data_i.ra.eq(0) - if 'rb' in inp: - yield alu.p.data_i.rb.eq(inp['rb']) - else: - yield alu.p.data_i.rb.eq(0) + yield from ALUHelpers.set_full_cr(alu, dec2, inp) + yield from ALUHelpers.set_cr_a(alu, dec2, inp) + yield from ALUHelpers.set_cr_b(alu, dec2, inp) + yield from ALUHelpers.set_cr_c(alu, dec2, inp) + yield from ALUHelpers.set_int_ra(alu, dec2, inp) + yield from ALUHelpers.set_int_rb(alu, dec2, inp) def assert_outputs(self, alu, dec2, simulator, code): whole_reg = yield dec2.e.write_cr_whole diff --git a/src/soc/fu/test/common.py b/src/soc/fu/test/common.py index 302d1b79..5ffd130b 100644 --- a/src/soc/fu/test/common.py +++ b/src/soc/fu/test/common.py @@ -22,8 +22,11 @@ class ALUHelpers: def set_int_ra(alu, dec2, inp): if 'ra' in inp: yield alu.p.data_i.ra.eq(inp['ra']) + else: + yield alu.p.data_i.ra.eq(0) def set_int_rb(alu, dec2, inp): + yield alu.p.data_i.rb.eq(0) if 'rb' in inp: yield alu.p.data_i.rb.eq(inp['rb']) # If there's an immediate, set the B operand to that @@ -57,5 +60,19 @@ class ALUHelpers: def set_cr_a(alu, dec2, inp): if 'cr_a' in inp: - yield alu.p.data_i.cr.eq(inp['cr_a']) + yield alu.p.data_i.cr_a.eq(inp['cr_a']) + + def set_cr_b(alu, dec2, inp): + if 'cr_b' in inp: + yield alu.p.data_i.cr_b.eq(inp['cr_b']) + + def set_cr_c(alu, dec2, inp): + if 'cr_c' in inp: + yield alu.p.data_i.cr_c.eq(inp['cr_c']) + + def set_full_cr(alu, dec2, inp): + if 'full_cr' in inp: + yield alu.p.data_i.full_cr.eq(inp['full_cr']) + else: + yield alu.p.data_i.full_cr.eq(0) -- 2.30.2