From 938df03d609eac4ca8b90cc3f4ca2b1c6c9781be Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:08:45 +0100 Subject: [PATCH] added english language description for stwbrsx instruction --- openpower/isa/fixedstoreshift.mdwn | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/openpower/isa/fixedstoreshift.mdwn b/openpower/isa/fixedstoreshift.mdwn index b6042963..f7c7a7e8 100644 --- a/openpower/isa/fixedstoreshift.mdwn +++ b/openpower/isa/fixedstoreshift.mdwn @@ -101,7 +101,7 @@ Pseudo-code: Description: Let the effective address (EA) be the sum of the contents of - register RB shifted by (SH+1) and (RB). + register RB shifted by (SH+1) and (RA). RS[48:63] are stored into the halfword in storage addressed by EA. @@ -151,7 +151,7 @@ Pseudo-code: Description: Let the effective address (EA) be the sum of the contents of - register RB shifted by (SH+1) and (RB). + register RB shifted by (SH+1) and (RA). RS[32:63] are stored into the word in storage addressed by EA. @@ -205,7 +205,7 @@ Pseudo-code: Description: Let the effective address (EA) be the sum of the contents of - register RB shifted by (SH+1) and (RA). + register (RB) shifted by (SH+1) and (RA). (RS) is stored into the doubleword in storage addressed by EA. @@ -260,8 +260,9 @@ Pseudo-code: Description: - Let the effective address (EA) be the sum - (RA|0)+ (RB). (RS)[56:63] are stored into bits 0:7 of the + Let the effective address (EA) be the sum of the contents of + register RB shifted by (SH+1) and (RA|0). + (RS)[56:63] are stored into bits 0:7 of the word in storage addressed by EA. (RS) [48:55] are stored into bits 8:15 of the word in storage addressed by EA. (RS)[40:47] are stored into bits 16:23 of the word in stor- -- 2.30.2