From 9397d0502122eaf943b58d62d26d5f57c38716cd Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 30 Sep 2018 06:14:17 +0100 Subject: [PATCH] start linking in predication into sv --- riscv/insn_template_sv.cc | 3 ++- riscv/sv_decode.h | 10 ++++++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/riscv/insn_template_sv.cc b/riscv/insn_template_sv.cc index 45fa97d..a83d7b0 100644 --- a/riscv/insn_template_sv.cc +++ b/riscv/insn_template_sv.cc @@ -18,8 +18,9 @@ reg_t FN(processor_t* p, insn_t s_insn, reg_t pc) // need to know if register is used as float or int. // REGS_PATTERN is generated by id_regs.py (per opcode) unsigned int floatintmap = REGS_PATTERN; - sv_insn_t insn(p, bits, floatintmap); reg_t predicate = 0; + sv_insn_t insn(p, bits, floatintmap, + predicate, predicate, predicate, predicate); // identify which regs have had their CSR entries set as vectorised. // really could do with a macro for-loop here... oh well... // integer ops, RD, RS1, RS2, RS3 (use sv_int_tb) diff --git a/riscv/sv_decode.h b/riscv/sv_decode.h index f2f344c..0858b45 100644 --- a/riscv/sv_decode.h +++ b/riscv/sv_decode.h @@ -20,12 +20,14 @@ class sv_insn_t: public insn_t { public: - sv_insn_t(processor_t *pr, insn_bits_t bits, unsigned int f) : + sv_insn_t(processor_t *pr, insn_bits_t bits, unsigned int f, + uint64_t &p_rd, uint64_t &p_rs1, uint64_t &p_rs2, uint64_t &p_rs3) : insn_t(bits), p(pr), vloop_continue(true), fimap(f), cached_rd(0xff), cached_rs1(0xff), cached_rs2(0xff), cached_rs3(0xff), offs_rd(0), offs_rs1(0), - offs_rs2(0), offs_rs3(0) {} + offs_rs2(0), offs_rs3(0), + prd(p_rd), prs1(p_rs1), prs2(p_rs2), prs3(p_rs3) {} uint64_t rd () { return _remap(insn_t::rd (), fimap & REG_RD , offs_rd , cached_rd); } uint64_t rs1() @@ -75,6 +77,10 @@ private: int offs_rs1; int offs_rs2; int offs_rs3; + uint64_t prd; + uint64_t prs1; + uint64_t prs2; + uint64_t prs3; // remaps the register through the lookup table. // will need to take the current loop index/offset somehow uint64_t remap(uint64_t reg, bool isint, int &offs); -- 2.30.2