From 9576ae688d21f5ce634d6b896a7c100f74357d8c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 20 Jul 2018 06:06:35 +0100 Subject: [PATCH] add `define generator --- src/bsv/peripheral_gen.py | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py index ab68dcb..270bc80 100644 --- a/src/bsv/peripheral_gen.py +++ b/src/bsv/peripheral_gen.py @@ -1,6 +1,14 @@ class PBase(object): pass + def axi_reg_def(self, start, name, idx): + name = name.upper() + offs = self.num_axi_regs32()*4 + end = start + offs - 1 + return (" `define%(name)s%(idx)dBase 'h%(start)08x'\n" \ + " `define%(name)s%(idx)dEnd 'h%(end)08x'\n" % locals(), + offs) + class uart(PBase): def importfn(self): -- 2.30.2