From 95debbf1436bbab7f564881cd3cbe6c55c764bdd Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Mon, 15 Oct 2018 17:22:05 -0600 Subject: [PATCH] ft32.md (ft32_general_movsrc_operand): Disable reg + sym +- const_int addressing modes. * config/ft32/ft32.md (ft32_general_movsrc_operand): Disable reg + sym +- const_int addressing modes. From-SVN: r265179 --- gcc/ChangeLog | 5 +++++ gcc/config/ft32/predicates.md | 7 ++++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 789e43b2388..0f4e293d06f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-10-12 Jeff Law + + * config/ft32/ft32.md (ft32_general_movsrc_operand): Disable + reg + sym +- const_int addressing modes. + 2018-10-15 David Malcolm * common.opt (fdiagnostics-minimum-margin-width=): New option. diff --git a/gcc/config/ft32/predicates.md b/gcc/config/ft32/predicates.md index bac2e8ef5aa..0c147ec1aab 100644 --- a/gcc/config/ft32/predicates.md +++ b/gcc/config/ft32/predicates.md @@ -23,6 +23,11 @@ ;; ------------------------------------------------------------------------- ;; Nonzero if OP can be source of a simple move operation. +;; +;; The CONST_INT could really be CONST if we were to fix +;; ft32_print_operand_address to format the address correctly. +;; It might require assembler/linker work as well to ensure +;; the right relocation is emitted. (define_predicate "ft32_general_movsrc_operand" (match_code "mem,const_int,reg,subreg,symbol_ref,label_ref,const") @@ -34,7 +39,7 @@ if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == PLUS && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG - && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST) + && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT) return 1; return general_operand (op, mode); -- 2.30.2