From 95df6c1bedaab54119629e9d3f3377fd7685c437 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 5 Sep 2021 15:04:38 +0100 Subject: [PATCH] --- openpower/sv/branches.mdwn | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/openpower/sv/branches.mdwn b/openpower/sv/branches.mdwn index 0702f5cb0..f8d5cbb95 100644 --- a/openpower/sv/branches.mdwn +++ b/openpower/sv/branches.mdwn @@ -121,7 +121,9 @@ Brief description of fields: * **sz** if predication is enabled will put 4 copies of `SNZ` in place of the src CR Field when the predicate bit is zero. otherwise the element - is ignored or skipped, depending on context. + is ignored or skipped, depending on context. Contrast this with + normal SVP64 zeroing behaviour, where *only* a zero is put in + place of masked-out predicate bits. * **ALL** when set, all branch conditional tests must pass in order for the branch to succeed. When clear, it is the first sequentially encountered successful test that causes the branch to succeed. -- 2.30.2