From 95fa753149effc6f410261c3953451221e087478 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 6 Mar 2015 10:10:34 +0100 Subject: [PATCH] liteeth: add phy autodetect function (phy can still be instanciated directly) --- misoclib/com/liteeth/phy/__init__.py | 17 +++++++++++++++++ targets/kc705.py | 4 ++-- targets/mlabs_video.py | 4 ++-- 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/misoclib/com/liteeth/phy/__init__.py b/misoclib/com/liteeth/phy/__init__.py index e69de29b..8a96d7fb 100644 --- a/misoclib/com/liteeth/phy/__init__.py +++ b/misoclib/com/liteeth/phy/__init__.py @@ -0,0 +1,17 @@ +from misoclib.com.liteeth.common import * +from misoclib.com.liteeth.generic import * + +from misoclib.com.liteeth.phy.sim import LiteEthPHYSim +from misoclib.com.liteeth.phy.mii import LiteEthPHYMII +from misoclib.com.liteeth.phy.gmii import LiteEthPHYGMII + +def LiteEthPHY(clock_pads, pads, **kwargs): + # Autodetect PHY + if hasattr(pads, "source_stb"): + return LiteEthPHYSim(pads) + elif hasattr(clock_pads, "gtx") and flen(pads.tx_data) == 8: + return LiteEthPHYGMII(clock_pads, pads, **kwargs) + elif flen(pads.tx_data) == 4: + return LiteEthPHYMII(clock_pads, pads, **kwargs) + else: + raise ValueError("Unable to autodetect PHY from platform file, use direct instanciation") diff --git a/targets/kc705.py b/targets/kc705.py index 0281691c..6eae2d1d 100644 --- a/targets/kc705.py +++ b/targets/kc705.py @@ -7,7 +7,7 @@ from misoclib.mem.flash import spiflash from misoclib.soc import mem_decoder from misoclib.soc.sdram import SDRAMSoC -from misoclib.com.liteeth.phy.gmii import LiteEthPHYGMII +from misoclib.com.liteeth.phy import LiteEthPHY from misoclib.com.liteeth.mac import LiteEthMAC class _CRG(Module): @@ -133,7 +133,7 @@ class MiniSoC(BaseSoC): def __init__(self, platform, **kwargs): BaseSoC.__init__(self, platform, **kwargs) - self.submodules.ethphy = LiteEthPHYGMII(platform.request("eth_clocks"), platform.request("eth")) + self.submodules.ethphy = LiteEthPHY(platform.request("eth_clocks"), platform.request("eth")) self.submodules.ethmac = LiteEthMAC(phy=self.ethphy, dw=32, interface="wishbone") self.add_wb_slave(mem_decoder(self.mem_map["ethmac"]), self.ethmac.bus) self.add_memory_region("ethmac", self.mem_map["ethmac"]+0x80000000, 0x2000) diff --git a/targets/mlabs_video.py b/targets/mlabs_video.py index a281bf8f..b20d801f 100644 --- a/targets/mlabs_video.py +++ b/targets/mlabs_video.py @@ -13,7 +13,7 @@ from misoclib.video import framebuffer from misoclib.soc import mem_decoder from misoclib.soc.sdram import SDRAMSoC -from misoclib.com.liteeth.phy.mii import LiteEthPHYMII +from misoclib.com.liteeth.phy import LiteEthPHY from misoclib.com.liteeth.mac import LiteEthMAC class _MXClockPads: @@ -111,7 +111,7 @@ class MiniSoC(BaseSoC): self.submodules.buttons = gpio.GPIOIn(Cat(platform.request("user_btn", 0), platform.request("user_btn", 2))) self.submodules.leds = gpio.GPIOOut(Cat(platform.request("user_led", i) for i in range(2))) - self.submodules.ethphy = LiteEthPHYMII(platform.request("eth_clocks"), platform.request("eth")) + self.submodules.ethphy = LiteEthPHY(platform.request("eth_clocks"), platform.request("eth")) self.submodules.ethmac = LiteEthMAC(phy=self.ethphy, dw=32, interface="wishbone") self.add_wb_slave(mem_decoder(self.mem_map["ethmac"]), self.ethmac.bus) self.add_memory_region("ethmac", self.mem_map["ethmac"]+0x80000000, 0x2000) -- 2.30.2