From 960f48809ffebca14af27ce9e87eabc04dfe9b84 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 18 Dec 2015 11:41:38 -0800 Subject: [PATCH] vc4: Keep sample mask writes from being reordered after TLB writes Fixes a regression I noticed after introducing scheduling on the QIR. Cc: "11.1" --- src/gallium/drivers/vc4/vc4_qpu_schedule.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/vc4/vc4_qpu_schedule.c b/src/gallium/drivers/vc4/vc4_qpu_schedule.c index 98b7b6070d7..76cad2e03fe 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_schedule.c +++ b/src/gallium/drivers/vc4/vc4_qpu_schedule.c @@ -259,7 +259,8 @@ process_waddr_deps(struct schedule_state *state, struct schedule_node *n, } } else if (is_tmu_write(waddr)) { add_write_dep(state, &state->last_tmu_write, n); - } else if (qpu_waddr_is_tlb(waddr)) { + } else if (qpu_waddr_is_tlb(waddr) || + waddr == QPU_W_MS_FLAGS) { add_write_dep(state, &state->last_tlb, n); } else { switch (waddr) { -- 2.30.2