From 96230fdb1d6404b7ea1ea46488e0f8fa4ec075b1 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Thu, 18 May 2023 20:56:40 -0700 Subject: [PATCH] fix fcvttg FPSCR.FR computation --- openpower/sv/int_fp_mv/moves_and_conversions.mdwn | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn index c735a6944..f0207cc57 100644 --- a/openpower/sv/int_fp_mv/moves_and_conversions.mdwn +++ b/openpower/sv/int_fp_mv/moves_and_conversions.mdwn @@ -559,8 +559,10 @@ Section 7.1 of the ECMAScript / JavaScript overflow <- 1 # signals SO only when OE = 1 vxcvi_flag <- 1 xx_flag <- 0 - else if ¬bfp_COMPARE_EQ(src, result_bfp) then - xx_flag <- 1 + inc_flag <- 0 + else + xx_flag <- ¬bfp_COMPARE_EQ(src, result_bfp) + inc_flag <- bfp_COMPARE_GT(bfp_ABSOLUTE(result_bfp), bfp_ABSOLUTE(src)) if vxsnan_flag = 1 then SetFX(FPSCR.VXSNAN) if vxcvi_flag = 1 then SetFX(FPSCR.VXCVI) @@ -724,8 +726,10 @@ Special Registers altered: overflow <- 1 # signals SO only when OE = 1 vxcvi_flag <- 1 xx_flag <- 0 - else if ¬bfp_COMPARE_EQ(src, result_bfp) then - xx_flag <- 1 + inc_flag <- 0 + else + xx_flag <- ¬bfp_COMPARE_EQ(src, result_bfp) + inc_flag <- bfp_COMPARE_GT(bfp_ABSOLUTE(result_bfp), bfp_ABSOLUTE(src)) if vxsnan_flag = 1 then SetFX(FPSCR.VXSNAN) if vxcvi_flag = 1 then SetFX(FPSCR.VXCVI) -- 2.30.2