From 964289337140272acc4930a27690279a5e316dac Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sat, 16 Nov 2019 08:49:04 +0100 Subject: [PATCH] test/test_packet: add randomness on valid input, fix corner-cases on Packetizer --- litex/soc/interconnect/packet.py | 6 +++--- test/test_packet.py | 7 +++++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/litex/soc/interconnect/packet.py b/litex/soc/interconnect/packet.py index 145d4e67..eee4e833 100644 --- a/litex/soc/interconnect/packet.py +++ b/litex/soc/interconnect/packet.py @@ -238,9 +238,9 @@ class Packetizer(Module): ) ) header_offset_multiplier = 1 if header_words == 1 else 2 - self.sync += If(source.valid & source.ready, sink_d.eq(sink)) + self.sync += If(sink.ready, sink_d.eq(sink)) fsm.act("UNALIGNED-DATA-COPY", - source.valid.eq(sink_d.valid), + source.valid.eq(sink.valid | sink_d.last), source.last.eq(sink_d.last), If(fsm_from_idle, source.data[:max(header_leftover*8, 1)].eq(sr[min(header_offset_multiplier*data_width, len(sr)-1):]) @@ -250,7 +250,7 @@ class Packetizer(Module): source.data[header_leftover*8:].eq(sink.data), If(source.valid & source.ready, sink.ready.eq(1), - If(sink.valid, NextValue(fsm_from_idle, 0)), + NextValue(fsm_from_idle, 0), If(source.last, NextState("IDLE") ) diff --git a/test/test_packet.py b/test/test_packet.py index 55b8fac8..26a8aefb 100644 --- a/test/test_packet.py +++ b/test/test_packet.py @@ -53,7 +53,7 @@ class TestPacket(unittest.TestCase): datas = [prng.randrange(2**dw) for _ in range(prng.randrange(2**7))] packets.append(Packet(header, datas)) - def generator(dut): + def generator(dut, valid_rand=50): # Send packets for packet in packets: yield dut.sink.field_8b.eq(packet.header["field_8b"]) @@ -69,7 +69,10 @@ class TestPacket(unittest.TestCase): yield while (yield dut.sink.ready) == 0: yield - dut.sink.valid.eq(0) + yield dut.sink.valid.eq(0) + yield dut.sink.last.eq(0) + while prng.randrange(100) < valid_rand: + yield def checker(dut): dut.header_errors = 0 -- 2.30.2