From 968cbf94d90755a6bfb016ac501aca4d9006cbc8 Mon Sep 17 00:00:00 2001 From: Alan Hourihane Date: Tue, 14 Dec 2004 22:37:46 +0000 Subject: [PATCH] uint*t -> u_int*t --- src/mesa/drivers/dri/savage/savage_3d_reg.h | 66 ++++++++++----------- src/mesa/drivers/dri/savage/savage_xmesa.c | 4 +- src/mesa/drivers/dri/savage/savagedma.c | 36 +++++------ src/mesa/drivers/dri/savage/savageioctl.c | 50 ++++++++-------- src/mesa/drivers/dri/savage/savageioctl.h | 6 +- src/mesa/drivers/dri/savage/savagestate.c | 20 +++---- src/mesa/drivers/dri/savage/savagetex.c | 6 +- src/mesa/drivers/dri/savage/savagetris.c | 8 +-- 8 files changed, 98 insertions(+), 98 deletions(-) diff --git a/src/mesa/drivers/dri/savage/savage_3d_reg.h b/src/mesa/drivers/dri/savage/savage_3d_reg.h index 067c5f7214d..24c23d432ac 100644 --- a/src/mesa/drivers/dri/savage/savage_3d_reg.h +++ b/src/mesa/drivers/dri/savage/savage_3d_reg.h @@ -43,7 +43,7 @@ typedef union unsigned reserved : 4; unsigned ofs : 28; }ni; - uint32_t ui; + u_int32_t ui; } savageRegZPixelOffset; /* This reg exists only on Savage4. */ @@ -60,7 +60,7 @@ typedef union unsigned passZpassOp : 3; unsigned reserved : 3; }ni; - uint32_t ui; + u_int32_t ui; } savageRegStencilCtrl; /************************** @@ -85,7 +85,7 @@ typedef union unsigned palSize : 2; unsigned newPal : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexDescr_s4; typedef union { @@ -102,7 +102,7 @@ typedef union unsigned reserved3 : 10; unsigned newPal : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexDescr_s3d; /* The layout of this reg is the same on Savage4 and Savage3D, @@ -116,7 +116,7 @@ typedef union unsigned reserved : 1; unsigned addr : 29; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexAddr; /* The layout of this reg is the same on Savage4 and Savage3D. */ @@ -127,7 +127,7 @@ typedef union unsigned reserved : 3; unsigned addr : 29; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexPalAddr; /* The layout of this reg on Savage4 and Savage3D are very similar. */ @@ -138,7 +138,7 @@ typedef union unsigned xprClr0 : 16; unsigned xprClr1 : 16; /* this is reserved on Savage3D */ }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexXprClr; /* transparency color in RGB565 format*/ /* The layout of this reg differs between Savage4 and Savage3D. @@ -164,7 +164,7 @@ typedef union unsigned alphaArg1Invert : 1; unsigned alphaArg2Invert : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexCtrl_s4; typedef union { @@ -187,7 +187,7 @@ typedef union unsigned texXprEn : 1; unsigned reserved2 : 11; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexCtrl_s3d; /* This reg exists only on Savage4. */ @@ -218,7 +218,7 @@ typedef union unsigned colorDoDiffMul : 1; unsigned LeftShiftVal : 2; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexBlendCtrl; /* This reg exists only on Savage4. */ @@ -231,7 +231,7 @@ typedef union unsigned red : 8; unsigned alpha : 8; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTexBlendColor; /******************************** @@ -247,7 +247,7 @@ typedef union unsigned widthInTile : 6; unsigned bitPerPixel : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegTiledSurface; /******************************** @@ -264,7 +264,7 @@ typedef union unsigned scissorYStart : 12; unsigned alphaRefVal : 8; }ni; - uint32_t ui; + u_int32_t ui; } savageRegDrawCtrl0; /* This reg exists only on Savage4. */ @@ -281,7 +281,7 @@ typedef union unsigned alphaTestCmpFunc : 3; unsigned alphaTestEn : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegDrawCtrl1; /* This reg exists only on Savage4. */ @@ -304,7 +304,7 @@ typedef union unsigned flushPdDestWrites : 1; unsigned flushPdZbufWrites : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegDrawLocalCtrl; /* This reg exists only on Savage3D. */ @@ -330,7 +330,7 @@ typedef union /* havn't found an equivalent for Savage4. Utah-driver sets it to 0. */ unsigned interpMode : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegDrawCtrl; #define SAVAGETBC_DECAL_S3D 0 @@ -352,7 +352,7 @@ typedef union unsigned scissorYStart : 11; unsigned reserved2 : 5; } ni; - uint32_t ui; + u_int32_t ui; } savageRegScissorsStart; /* This reg exists only on Savage3D. */ @@ -365,7 +365,7 @@ typedef union unsigned scissorYEnd : 11; unsigned reserved2 : 5; } ni; - uint32_t ui; + u_int32_t ui; } savageRegScissorsEnd; /******************************** @@ -384,7 +384,7 @@ typedef union unsigned reserved : 1; unsigned addr : 29; /*quad word aligned*/ }ni; - uint32_t ui; + u_int32_t ui; } savageRegVertBufAddr; /* I havn't found a Savage3D equivalent of this reg in the Utah-driver. @@ -399,7 +399,7 @@ typedef union unsigned reserved : 1; unsigned addr : 29; /*4-quad word aligned*/ }ni; - uint32_t ui; + u_int32_t ui; } savageRegDMABufAddr; /******************************** @@ -427,7 +427,7 @@ typedef union unsigned reserved : 17; unsigned kickOff : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegFlag; /******************************** @@ -452,7 +452,7 @@ typedef union unsigned floatZEn : 1; unsigned wToZEn : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegZBufCtrl_s4; typedef union { @@ -474,7 +474,7 @@ typedef union unsigned wrZafterAlphaTst : 1; unsigned reserved2 : 15; }ni; - uint32_t ui; + u_int32_t ui; } savageRegZBufCtrl_s3d; /* The layout of this reg on Savage4 and Savage3D is very similar. */ @@ -495,7 +495,7 @@ typedef union */ unsigned zDepthSelect : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegZBufOffset; /* The layout of this reg is the same on Savage4 and Savage3D. */ @@ -512,7 +512,7 @@ typedef union unsigned wHigh : 6; unsigned reserved4 : 2; }ni; - uint32_t ui; + u_int32_t ui; } savageRegZWatermarks; /******************************** @@ -530,7 +530,7 @@ typedef union unsigned fogMode : 1; unsigned fogEndShift : 2; }ni; - uint32_t ui; + u_int32_t ui; } savageRegFogCtrl; /*not in spec, but tempo for pp and driver*/ @@ -541,7 +541,7 @@ typedef union unsigned fogDensity : 16; unsigned fogStart : 16; }ni; - uint32_t ui; + u_int32_t ui; } savageRegFogParam; /************************************** @@ -565,7 +565,7 @@ typedef union unsigned antiAliasMode : 2; unsigned dstPixFmt : 1; }ni; - uint32_t ui; + u_int32_t ui; } savageRegDestCtrl; /* The layout of this reg on Savage4 and Savage3D are very similar. */ @@ -584,7 +584,7 @@ typedef union * However, it is not used in either driver. */ unsigned destFlush : 2; }ni; - uint32_t ui; + u_int32_t ui; } savageRegDestTexWatermarks; /* Savage4/Twister/ProSavage register BCI addresses */ @@ -629,7 +629,7 @@ typedef union #define SAVAGE_FIRST_REG 0x18 #define SAVAGE_NR_REGS 34 typedef struct savage_registers_s4_t { - uint32_t unused1[6]; /* 0x18-0x1d */ + u_int32_t unused1[6]; /* 0x18-0x1d */ savageRegDrawLocalCtrl drawLocalCtrl; /* 0x1e */ savageRegTexPalAddr texPalAddr; /* 0x1f */ savageRegTexCtrl_s4 texCtrl[2]; /* 0x20, 0x21 */ @@ -655,7 +655,7 @@ typedef struct savage_registers_s3d_t { savageRegTexAddr texAddr; /* 0x1a */ savageRegTexDescr_s3d texDescr; /* 0x1b */ savageRegTexCtrl_s3d texCtrl; /* 0x1c */ - uint32_t unused1[3]; /* 0x1d-0x1f */ + u_int32_t unused1[3]; /* 0x1d-0x1f */ uint8_t fogTable[64]; /* 0x20-0x2f (16dwords) */ savageRegFogCtrl fogCtrl; /* 0x30 */ savageRegDrawCtrl drawCtrl; /* 0x31 */ @@ -666,12 +666,12 @@ typedef struct savage_registers_s3d_t { savageRegScissorsEnd scissorsEnd; /* 0x36 */ savageRegZWatermarks zWatermarks; /* 0x37 */ savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */ - uint32_t unused2; /* 0x39 */ + u_int32_t unused2; /* 0x39 */ } savageRegistersS3D; typedef union savage_registers_t { savageRegistersS4 s4; savageRegistersS3D s3d; - uint32_t ui[SAVAGE_NR_REGS]; + u_int32_t ui[SAVAGE_NR_REGS]; } savageRegisters; diff --git a/src/mesa/drivers/dri/savage/savage_xmesa.c b/src/mesa/drivers/dri/savage/savage_xmesa.c index a80ffce5d74..3f78b1f13a6 100644 --- a/src/mesa/drivers/dri/savage/savage_xmesa.c +++ b/src/mesa/drivers/dri/savage/savage_xmesa.c @@ -833,8 +833,8 @@ savageFillInModes( unsigned pixel_bits, unsigned depth_bits, GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ }; - uint8_t depth_bits_array[2]; - uint8_t stencil_bits_array[2]; + u_int8_t depth_bits_array[2]; + u_int8_t stencil_bits_array[2]; depth_bits_array[0] = depth_bits; diff --git a/src/mesa/drivers/dri/savage/savagedma.c b/src/mesa/drivers/dri/savage/savagedma.c index caaeeaa104e..eab13862607 100644 --- a/src/mesa/drivers/dri/savage/savagedma.c +++ b/src/mesa/drivers/dri/savage/savagedma.c @@ -85,7 +85,7 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) { /* make sure that everything has been filled in and committed */ assert (dmaBuff->end == dmaBuff->allocEnd); - size *= sizeof (uint32_t); /* size in bytes */ + size *= sizeof (u_int32_t); /* size in bytes */ if (dmaBuff->kickFlag == GL_TRUE) { if (size > DMA_PAGE_SIZE) return NULL; @@ -102,9 +102,9 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) { /* Flush DMA buffer via DMA */ void savageDMAFlush (savageContextPtr imesa) { - volatile uint32_t* BCIbase; + volatile u_int32_t* BCIbase; DMABufferPtr dmaBuff = &imesa->DMABuf; - uint32_t phyAddress; + u_int32_t phyAddress; GLuint dmaCount, dmaCount1, remain; int i; @@ -117,7 +117,7 @@ void savageDMAFlush (savageContextPtr imesa) { return; /* get bci base */ - BCIbase = (volatile uint32_t *)SAVAGE_GET_BCI_POINTER(imesa,4); + BCIbase = (volatile u_int32_t *)SAVAGE_GET_BCI_POINTER(imesa,4); /* set the eventtag */ *BCIbase = (dmaBuff->usingPage & 0xffffL) | (CMD_UpdateShadowStat << 27) @@ -136,7 +136,7 @@ void savageDMAFlush (savageContextPtr imesa) { dmaCount1 = (dmaCount + 31UL) & ~31UL; remain = (dmaCount1 - dmaCount) >> 2; for (i = 0; i < remain; i++) { - *((uint32_t *)dmaBuff->end) = 0x40000000L; + *((u_int32_t *)dmaBuff->end) = 0x40000000L; dmaBuff->end+=4; } dmaCount = (dmaCount1 >> 3) - 1; @@ -227,7 +227,7 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) { /* make sure that everything has been filled in and committed */ assert (dmaBuff->end == dmaBuff->allocEnd); - size *= sizeof (uint32_t); /* size in bytes */ + size *= sizeof (u_int32_t); /* size in bytes */ if (dmaBuff->end + size >= dmaBuff->buf->linear + DMA_PAGE_SIZE) { /* need kick off */ savageDMAFlush (imesa); @@ -238,9 +238,9 @@ void *savageDMAAlloc (savageContextPtr imesa, GLuint size) { /* Flush DMA buffer via BCI (faked DMA) */ void savageDMAFlush(savageContextPtr imesa) { - volatile uint32_t* BCIbase; + volatile u_int32_t* BCIbase; DMABufferPtr dmaBuff = &imesa->DMABuf; - uint32_t *entry; + u_int32_t *entry; /* make sure that everything has been filled in and committed */ assert (dmaBuff->allocEnd == dmaBuff->end); @@ -249,11 +249,11 @@ void savageDMAFlush(savageContextPtr imesa) { return; /* get bci base */ - BCIbase = (volatile uint32_t *)SAVAGE_GET_BCI_POINTER( - imesa, (dmaBuff->end - dmaBuff->start) / sizeof (uint32_t)); + BCIbase = (volatile u_int32_t *)SAVAGE_GET_BCI_POINTER( + imesa, (dmaBuff->end - dmaBuff->start) / sizeof (u_int32_t)); - for (entry = (uint32_t *)dmaBuff->start; - entry < (uint32_t *)dmaBuff->end; ++entry) + for (entry = (u_int32_t *)dmaBuff->start; + entry < (u_int32_t *)dmaBuff->end; ++entry) *BCIbase = *entry; dmaBuff->end = dmaBuff->allocEnd = dmaBuff->start; @@ -303,7 +303,7 @@ int savageDMAClose (savageContextPtr imesa) { * vertex DMA is implemented and eventually moved to the DRM. */ -static uint32_t vertex_data[16384]; /* 64KB */ +static u_int32_t vertex_data[16384]; /* 64KB */ static drmBuf vertex_buffer = { 0, /* idx */ 65536, /* total = 64KB */ @@ -315,8 +315,8 @@ void savageFakeVertices (savageContextPtr imesa, drmBufPtr buffer) { GLuint vertexStride = imesa->vertex_size; /* stride in dwords */ GLuint vertexSize = imesa->vertex_size; /* the real vertex size in dwords */ GLuint nVertices = buffer->used / (vertexStride*4); - uint32_t *data = (uint32_t*)buffer->address; - uint32_t vertexFormat = imesa->DrawPrimitiveCmd & SAVAGE_HW_SKIPFLAGS; + u_int32_t *data = (u_int32_t*)buffer->address; + u_int32_t vertexFormat = imesa->DrawPrimitiveCmd & SAVAGE_HW_SKIPFLAGS; GLuint i, j, left; /* we have the monopoly on vertex buffers ;-) */ @@ -333,15 +333,15 @@ void savageFakeVertices (savageContextPtr imesa, drmBufPtr buffer) { GLuint count = left > 255 ? 255 : left; /* Don't go through another buffering mechanism, copy to BCI * directly. */ - volatile uint32_t *vb = SAVAGE_GET_BCI_POINTER(imesa, + volatile u_int32_t *vb = SAVAGE_GET_BCI_POINTER(imesa, count*vertexSize + 1); WRITE_CMD (vb, SAVAGE_DRAW_PRIMITIVE( count, SAVAGE_HW_TRIANGLE_LIST | vertexFormat, 0), - uint32_t); + u_int32_t); for (i = 0; i < count; ++i) { for (j = 0; j < vertexSize; ++j) - WRITE_CMD (vb, data[j], uint32_t); + WRITE_CMD (vb, data[j], u_int32_t); data += vertexStride; } left -= count; diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c index 6d77eb408e7..ac9e055e931 100644 --- a/src/mesa/drivers/dri/savage/savageioctl.c +++ b/src/mesa/drivers/dri/savage/savageioctl.c @@ -63,7 +63,7 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) unsigned int y = pbox->y1; unsigned int width = pbox->x2 - x; unsigned int height = pbox->y2 - y; - uint32_t *bciptr; + u_int32_t *bciptr; if (pbox->x1 > pbox->x2 || pbox->y1 > pbox->y2 || @@ -73,27 +73,27 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) if ( pclear->flags & SAVAGE_FRONT ) { bciptr = savageDMAAlloc (imesa, 8); - WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->frontOffset,uint32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->frontBitmapDesc,uint32_t); - WRITE_CMD((bciptr) , pclear->clear_color,uint32_t); - WRITE_CMD((bciptr) , (y <<16) | x,uint32_t); - WRITE_CMD((bciptr) , (height << 16) | width,uint32_t); + WRITE_CMD((bciptr) , 0x4BCC8C00,u_int32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->frontOffset,u_int32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->frontBitmapDesc,u_int32_t); + WRITE_CMD((bciptr) , pclear->clear_color,u_int32_t); + WRITE_CMD((bciptr) , (y <<16) | x,u_int32_t); + WRITE_CMD((bciptr) , (height << 16) | width,u_int32_t); savageDMACommit (imesa, bciptr); } if ( pclear->flags & SAVAGE_BACK ) { bciptr = savageDMAAlloc (imesa, 8); - WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->backOffset,uint32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->backBitmapDesc,uint32_t); - WRITE_CMD((bciptr) , pclear->clear_color,uint32_t); - WRITE_CMD((bciptr) , (y <<16) | x,uint32_t); - WRITE_CMD((bciptr) , (height << 16) | width,uint32_t); + WRITE_CMD((bciptr) , 0x4BCC8C00,u_int32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->backOffset,u_int32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->backBitmapDesc,u_int32_t); + WRITE_CMD((bciptr) , pclear->clear_color,u_int32_t); + WRITE_CMD((bciptr) , (y <<16) | x,u_int32_t); + WRITE_CMD((bciptr) , (height << 16) | width,u_int32_t); savageDMACommit (imesa, bciptr); } if ( pclear->flags & (SAVAGE_DEPTH |SAVAGE_STENCIL) ) { - uint32_t writeMask = 0x0; + u_int32_t writeMask = 0x0; if(imesa->hw_stencil) { if(pclear->flags & SAVAGE_STENCIL) @@ -125,8 +125,8 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) bciptr = savageDMAAlloc (imesa, 10); if(writeMask != 0xFFFFFFFF) { - WRITE_CMD((bciptr) , 0x960100D7,uint32_t); - WRITE_CMD((bciptr) , writeMask,uint32_t); + WRITE_CMD((bciptr) , 0x960100D7,u_int32_t); + WRITE_CMD((bciptr) , writeMask,u_int32_t); } } else @@ -134,18 +134,18 @@ static void savage_BCI_clear(GLcontext *ctx, drm_savage_clear_t *pclear) bciptr = savageDMAAlloc (imesa, 6); } - WRITE_CMD((bciptr) , 0x4BCC8C00,uint32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->depthOffset,uint32_t); - WRITE_CMD((bciptr) , imesa->savageScreen->depthBitmapDesc,uint32_t); - WRITE_CMD((bciptr) , pclear->clear_depth,uint32_t); - WRITE_CMD((bciptr) , (y <<16) | x,uint32_t); - WRITE_CMD((bciptr) , (height << 16) | width,uint32_t); + WRITE_CMD((bciptr) , 0x4BCC8C00,u_int32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->depthOffset,u_int32_t); + WRITE_CMD((bciptr) , imesa->savageScreen->depthBitmapDesc,u_int32_t); + WRITE_CMD((bciptr) , pclear->clear_depth,u_int32_t); + WRITE_CMD((bciptr) , (y <<16) | x,u_int32_t); + WRITE_CMD((bciptr) , (height << 16) | width,u_int32_t); if(imesa->hw_stencil) { if(writeMask != 0xFFFFFFFF) { - WRITE_CMD((bciptr) , 0x960100D7,uint32_t); - WRITE_CMD((bciptr) , 0xFFFFFFFF,uint32_t); + WRITE_CMD((bciptr) , 0x960100D7,u_int32_t); + WRITE_CMD((bciptr) , 0xFFFFFFFF,u_int32_t); } } savageDMACommit (imesa, bciptr); @@ -164,7 +164,7 @@ static void savage_BCI_swap(savageContextPtr imesa) int nbox = imesa->sarea->nbox; drm_clip_rect_t *pbox = imesa->sarea->boxes; int i; - volatile uint32_t *bciptr; + volatile u_int32_t *bciptr; if (nbox > SAVAGE_NR_SAREA_CLIPRECTS) nbox = SAVAGE_NR_SAREA_CLIPRECTS; diff --git a/src/mesa/drivers/dri/savage/savageioctl.h b/src/mesa/drivers/dri/savage/savageioctl.h index 92f42950e13..87901b5a294 100644 --- a/src/mesa/drivers/dri/savage/savageioctl.h +++ b/src/mesa/drivers/dri/savage/savageioctl.h @@ -73,9 +73,9 @@ int savageFreeDMABuffer(savageContextPtr, drm_savage_alloc_cont_mem_t*); } while (0) static __inline -uint32_t *savageAllocDmaLow( savageContextPtr imesa, GLuint bytes ) +u_int32_t *savageAllocDmaLow( savageContextPtr imesa, GLuint bytes ) { - uint32_t *head; + u_int32_t *head; if (!imesa->vertex_dma_buffer) { LOCK_HARDWARE(imesa); @@ -89,7 +89,7 @@ uint32_t *savageAllocDmaLow( savageContextPtr imesa, GLuint bytes ) UNLOCK_HARDWARE(imesa); } - head = (uint32_t *)((uint8_t *)imesa->vertex_dma_buffer->address + + head = (u_int32_t *)((uint8_t *)imesa->vertex_dma_buffer->address + imesa->vertex_dma_buffer->used); imesa->vertex_dma_buffer->used += bytes; diff --git a/src/mesa/drivers/dri/savage/savagestate.c b/src/mesa/drivers/dri/savage/savagestate.c index 75289fcbfd4..cf252e6052b 100644 --- a/src/mesa/drivers/dri/savage/savagestate.c +++ b/src/mesa/drivers/dri/savage/savagestate.c @@ -1401,12 +1401,12 @@ static GLboolean savageGlobalRegChanged (savageContextPtr imesa, static void savageEmitContiguousRegs (savageContextPtr imesa, GLuint first, GLuint last) { GLuint i; - uint32_t *pBCIBase; + u_int32_t *pBCIBase; pBCIBase = savageDMAAlloc (imesa, last - first + 2); - WRITE_CMD (pBCIBase, SET_REGISTER(first, last - first + 1), uint32_t); + WRITE_CMD (pBCIBase, SET_REGISTER(first, last - first + 1), u_int32_t); for (i = first - SAVAGE_FIRST_REG; i <= last - SAVAGE_FIRST_REG; ++i) { - WRITE_CMD (pBCIBase, imesa->regs.ui[i], uint32_t); + WRITE_CMD (pBCIBase, imesa->regs.ui[i], u_int32_t); imesa->oldRegs.ui[i] = imesa->regs.ui[i]; } savageDMACommit (imesa, pBCIBase); @@ -1443,7 +1443,7 @@ static void savageEmitChangedRegChunk (savageContextPtr imesa, } static void savageUpdateRegister_s4(savageContextPtr imesa) { - uint32_t *pBCIBase; + u_int32_t *pBCIBase; /* * Scissors updates drawctrl0 and drawctrl 1 @@ -1470,7 +1470,7 @@ static void savageUpdateRegister_s4(savageContextPtr imesa) * 0x1e-0x27 are local, no need to check them for global changes */ if (imesa->lostContext || savageGlobalRegChanged (imesa, 0x28, 0x39)) { pBCIBase = savageDMAAlloc (imesa, 1); - WRITE_CMD (pBCIBase, WAIT_3D_IDLE, uint32_t); + WRITE_CMD (pBCIBase, WAIT_3D_IDLE, u_int32_t); savageDMACommit (imesa, pBCIBase); } if (imesa->lostContext) @@ -1483,7 +1483,7 @@ static void savageUpdateRegister_s4(savageContextPtr imesa) } static void savageUpdateRegister_s3d(savageContextPtr imesa) { - uint32_t *pBCIBase; + u_int32_t *pBCIBase; if (imesa->scissorChanged) { @@ -1520,7 +1520,7 @@ static void savageUpdateRegister_s3d(savageContextPtr imesa) * 0x18-0x1c and 0x20-0x38. The first range is local. */ if (imesa->lostContext || savageGlobalRegChanged (imesa, 0x20, 0x38)) { pBCIBase = savageDMAAlloc (imesa, 1); - WRITE_CMD (pBCIBase, WAIT_3D_IDLE, uint32_t); + WRITE_CMD (pBCIBase, WAIT_3D_IDLE, u_int32_t); savageDMACommit (imesa, pBCIBase); } /* FIXME: watermark registers aren't programmed correctly ATM */ @@ -1711,9 +1711,9 @@ static void savageDDInitState_s3d( savageContextPtr imesa ) imesa->globalRegMask.s3d.zBufCtrl.ni.zBufEn = 0x1; } void savageDDInitState( savageContextPtr imesa ) { - memset (imesa->regs.ui, 0, SAVAGE_NR_REGS*sizeof(uint32_t)); - memset (imesa->oldRegs.ui, 0, SAVAGE_NR_REGS*sizeof(uint32_t)); - memset (imesa->globalRegMask.ui, 0xff, SAVAGE_NR_REGS*sizeof(uint32_t)); + memset (imesa->regs.ui, 0, SAVAGE_NR_REGS*sizeof(u_int32_t)); + memset (imesa->oldRegs.ui, 0, SAVAGE_NR_REGS*sizeof(u_int32_t)); + memset (imesa->globalRegMask.ui, 0xff, SAVAGE_NR_REGS*sizeof(u_int32_t)); if (imesa->savageScreen->chipset >= S3_SAVAGE4) savageDDInitState_s4 (imesa); else diff --git a/src/mesa/drivers/dri/savage/savagetex.c b/src/mesa/drivers/dri/savage/savagetex.c index aabf6f1280c..9c5b376d71a 100644 --- a/src/mesa/drivers/dri/savage/savagetex.c +++ b/src/mesa/drivers/dri/savage/savagetex.c @@ -1072,7 +1072,7 @@ static void savageUpdateTex0State_s4( GLcontext *ctx ) if (imesa->regs.s4.texDescr.ni.tex1En) imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE; - imesa->regs.s4.texAddr[0].ui = (uint32_t) t->texParams.hwPhysAddress | 0x2; + imesa->regs.s4.texAddr[0].ui = (u_int32_t) t->texParams.hwPhysAddress | 0x2; if(t->heap == SAVAGE_AGP_HEAP) imesa->regs.s4.texAddr[0].ui |= 0x1; @@ -1272,7 +1272,7 @@ static void savageUpdateTex1State_s4( GLcontext *ctx ) imesa->regs.s4.texCtrl[1].ni.dMax = t->max_level; imesa->regs.s4.texDescr.ni.texBLoopEn = GL_TRUE; - imesa->regs.s4.texAddr[1].ui = (uint32_t) t->texParams.hwPhysAddress| 2; + imesa->regs.s4.texAddr[1].ui = (u_int32_t) t->texParams.hwPhysAddress| 2; if(t->heap == SAVAGE_AGP_HEAP) imesa->regs.s4.texAddr[1].ui |= 0x1; } @@ -1412,7 +1412,7 @@ static void savageUpdateTexState_s3d( GLcontext *ctx ) assert (t->image[0].internalFormat <= 7); imesa->regs.s3d.texDescr.ni.texFmt = t->image[0].internalFormat; - imesa->regs.s3d.texAddr.ui = (uint32_t) t->texParams.hwPhysAddress| 2; + imesa->regs.s3d.texAddr.ui = (u_int32_t) t->texParams.hwPhysAddress| 2; if(t->heap == SAVAGE_AGP_HEAP) imesa->regs.s3d.texAddr.ui |= 0x1; } diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c index e8b9eaa2863..e2fcd6c62bf 100644 --- a/src/mesa/drivers/dri/savage/savagetris.c +++ b/src/mesa/drivers/dri/savage/savagetris.c @@ -100,7 +100,7 @@ static void __inline__ savage_draw_triangle (savageContextPtr imesa, savageVertexPtr v1, savageVertexPtr v2) { GLuint vertsize = imesa->vertex_size; - uint32_t *vb = savageAllocDmaLow (imesa, 3*4*vertsize); + u_int32_t *vb = savageAllocDmaLow (imesa, 3*4*vertsize); GLuint j; EMIT_VERT (j, vb, vertsize, 0, v0); @@ -114,7 +114,7 @@ static void __inline__ savage_draw_quad (savageContextPtr imesa, savageVertexPtr v2, savageVertexPtr v3) { GLuint vertsize = imesa->vertex_size; - uint32_t *vb = savageAllocDmaLow (imesa, 6*4*vertsize); + u_int32_t *vb = savageAllocDmaLow (imesa, 6*4*vertsize); GLuint j; EMIT_VERT (j, vb, vertsize, 0, v0); @@ -128,7 +128,7 @@ static void __inline__ savage_draw_quad (savageContextPtr imesa, static __inline__ void savage_draw_point (savageContextPtr imesa, savageVertexPtr tmp) { GLuint vertsize = imesa->vertex_size; - uint32_t *vb = savageAllocDmaLow (imesa, 6*4*vertsize); + u_int32_t *vb = savageAllocDmaLow (imesa, 6*4*vertsize); const GLfloat x = tmp->v.x; const GLfloat y = tmp->v.y; const GLfloat sz = imesa->glCtx->Point._Size * .5; @@ -163,7 +163,7 @@ static __inline__ void savage_draw_line (savageContextPtr imesa, savageVertexPtr v0, savageVertexPtr v1 ) { GLuint vertsize = imesa->vertex_size; - uint32_t *vb = savageAllocDmaLow (imesa, 6*4*vertsize); + u_int32_t *vb = savageAllocDmaLow (imesa, 6*4*vertsize); GLfloat width = imesa->glCtx->Line._Width; GLfloat dx, dy, ix, iy; GLuint j; -- 2.30.2