From 96c0f29b988d9783ac7632f2871f9b27eddc2c23 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Wed, 23 Sep 2020 16:05:46 +0100 Subject: [PATCH] arch-arm: Do not use _flushMva for TLBI IPA This is just a cosmetic change Change-Id: If9ea1114ed7e20d5c952f401935532cf3335c501 Signed-off-by: Giacomo Travaglini Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35246 Reviewed-by: Nikos Nikoleris Tested-by: kokoro --- src/arch/arm/tlb.cc | 5 +++-- src/arch/arm/tlbi_op.hh | 7 +++++++ 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 04b5cd409..5d2ed902d 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -463,8 +463,9 @@ void TLB::flush(const TLBIIPA &tlbi_op) { assert(!isStage2); - stage2Tlb->_flushMva(tlbi_op.addr, 0xbeef, tlbi_op.secureLookup, - true, tlbi_op.targetEL, false); + + // Note, TLBIIPA::makeStage2 will generare a TLBIMVAA + stage2Tlb->flush(tlbi_op.makeStage2()); } void diff --git a/src/arch/arm/tlbi_op.hh b/src/arch/arm/tlbi_op.hh index cab0e52ae..ce72dfbca 100644 --- a/src/arch/arm/tlbi_op.hh +++ b/src/arch/arm/tlbi_op.hh @@ -292,6 +292,13 @@ class TLBIIPA : public TLBIOp void operator()(ThreadContext* tc) override; + /** TLBIIPA is basically a TLBIMVAA for stage2 TLBs */ + TLBIMVAA + makeStage2() const + { + return TLBIMVAA(EL1, secureLookup, addr); + } + Addr addr; }; -- 2.30.2