From 96f00e9147967b587ee3b0118b944464b06da0b6 Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 20 Aug 2019 17:51:50 -0700
Subject: [PATCH] Typo

---
 techlibs/xilinx/abc_map.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/techlibs/xilinx/abc_map.v b/techlibs/xilinx/abc_map.v
index 56b4fe7f9..dc5032d23 100644
--- a/techlibs/xilinx/abc_map.v
+++ b/techlibs/xilinx/abc_map.v
@@ -165,7 +165,7 @@ module RAM64X1D (
   \$__ABC_LUTMUX6 spo (.A(\$SPO ), .S({A0, A1, A2, A3, A4, A5}), .Y(SPO));
 endmodule
 
-module \$__ABC_RAM128X1D (
+module RAM128X1D (
   output       DPO, SPO,
   input        D,
   input        WCLK,
-- 
2.30.2