From 981ef2f02d8c67addc0e643cc7f95baab7f4b1f6 Mon Sep 17 00:00:00 2001 From: Chad Versace Date: Thu, 3 Dec 2015 08:40:47 -0800 Subject: [PATCH] anv: Embed isl_surf into anv_surface This reduces struct anv_surface to just two members: an offset and the embedded isl_surf. --- src/vulkan/anv_image.c | 33 ++++++++++----------------------- src/vulkan/anv_private.h | 21 +++------------------ src/vulkan/anv_wsi_wayland.c | 4 ++-- src/vulkan/anv_wsi_x11.c | 4 ++-- src/vulkan/gen7_cmd_buffer.c | 4 ++-- src/vulkan/gen7_state.c | 13 ++++++++----- src/vulkan/gen8_cmd_buffer.c | 8 ++++---- src/vulkan/gen8_state.c | 13 ++++++++----- 8 files changed, 39 insertions(+), 61 deletions(-) diff --git a/src/vulkan/anv_image.c b/src/vulkan/anv_image.c index 69103209022..f99155cad6a 100644 --- a/src/vulkan/anv_image.c +++ b/src/vulkan/anv_image.c @@ -147,7 +147,7 @@ anv_image_make_surface(const struct anv_device *dev, const struct anv_format *format, uint64_t *inout_image_size, uint32_t *inout_image_alignment, - struct anv_surface *out_surface) + struct anv_surface *out_anv_surf) { const VkImageCreateInfo *vk_info = anv_info->vk_info; @@ -157,8 +157,7 @@ anv_image_make_surface(const struct anv_device *dev, [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D, }; - struct isl_surf isl_surf; - isl_surf_init(&dev->isl_dev, &isl_surf, + isl_surf_init(&dev->isl_dev, &out_anv_surf->isl, .dim = vk_to_isl_surf_dim[vk_info->imageType], .format = format->surface_format, .width = vk_info->extent.width, @@ -172,17 +171,12 @@ anv_image_make_surface(const struct anv_device *dev, .usage = choose_isl_surf_usage(anv_info, format), .tiling_flags = choose_isl_tiling_flags(anv_info)); - *out_surface = (struct anv_surface) { - .offset = align_u32(*inout_image_size, isl_surf.alignment), - .stride = isl_surf.row_pitch, - .tiling = isl_surf.tiling, - .qpitch = isl_surf_get_array_pitch_sa_rows(&isl_surf), - .h_align = isl_surf_get_lod_alignment_sa(&isl_surf).width, - .v_align = isl_surf_get_lod_alignment_sa(&isl_surf).height, - }; + out_anv_surf->offset = align_u32(*inout_image_size, + out_anv_surf->isl.alignment); - *inout_image_size = out_surface->offset + isl_surf.size; - *inout_image_alignment = MAX(*inout_image_alignment, isl_surf.alignment); + *inout_image_size = out_anv_surf->offset + out_anv_surf->isl.size; + *inout_image_alignment = MAX(*inout_image_alignment, + out_anv_surf->isl.alignment); return VK_SUCCESS; } @@ -325,16 +319,9 @@ anv_surface_get_subresource_layout(struct anv_image *image, anv_assert(subresource->arrayLayer == 0); layout->offset = surface->offset; - layout->rowPitch = surface->stride; - - /* Anvil's qpitch is in units of rows. Vulkan's depthPitch is in bytes. */ - layout->depthPitch = surface->qpitch * surface->stride; - - /* FINISHME: We really shouldn't be doing this calculation here */ - if (image->array_size > 1) - layout->size = surface->qpitch * image->array_size; - else - layout->size = surface->stride * image->extent.height; + layout->rowPitch = surface->isl.row_pitch; + layout->depthPitch = isl_surf_get_array_pitch(&surface->isl); + layout->size = surface->isl.size; } void anv_GetImageSubresourceLayout( diff --git a/src/vulkan/anv_private.h b/src/vulkan/anv_private.h index 43ebf4c11ae..3fc305ba15e 100644 --- a/src/vulkan/anv_private.h +++ b/src/vulkan/anv_private.h @@ -1372,30 +1372,15 @@ struct anv_image_view_info anv_image_view_info_for_vk_image_view_type(VkImageViewType type); /** - * A proxy for the color surfaces, depth surfaces, and stencil surfaces. + * Subsurface of an anv_image. */ struct anv_surface { + struct isl_surf isl; + /** * Offset from VkImage's base address, as bound by vkBindImageMemory(). */ uint32_t offset; - - uint32_t stride; /**< RENDER_SURFACE_STATE.SurfacePitch */ - uint16_t qpitch; /**< RENDER_SURFACE_STATE.QPitch */ - - /** - * \name Alignment of miptree images, in units of pixels. - * - * These fields contain the real alignment values, not the values to be - * given to the GPU. For example, if h_align is 4, then program the GPU - * with HALIGN_4. - * \{ - */ - uint8_t h_align; /**< RENDER_SURFACE_STATE.SurfaceHorizontalAlignment */ - uint8_t v_align; /**< RENDER_SURFACE_STATE.SurfaceVerticalAlignment */ - /** \} */ - - enum isl_tiling tiling; }; struct anv_image { diff --git a/src/vulkan/anv_wsi_wayland.c b/src/vulkan/anv_wsi_wayland.c index 1dafcd996fe..dd5baa452a0 100644 --- a/src/vulkan/anv_wsi_wayland.c +++ b/src/vulkan/anv_wsi_wayland.c @@ -678,7 +678,7 @@ wsi_wl_image_init(struct wsi_wl_swapchain *chain, struct wsi_wl_image *image, int ret = anv_gem_set_tiling(chain->base.device, image->memory->bo.gem_handle, - surface->stride, I915_TILING_X); + surface->isl.row_pitch, I915_TILING_X); if (ret) { /* FINISHME: Choose a better error. */ result = vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY); @@ -699,7 +699,7 @@ wsi_wl_image_init(struct wsi_wl_swapchain *chain, struct wsi_wl_image *image, chain->extent.height, chain->drm_format, surface->offset, - surface->stride, + surface->isl.row_pitch, 0, 0, 0, 0 /* unused */); wl_display_roundtrip(chain->display->display); close(fd); diff --git a/src/vulkan/anv_wsi_x11.c b/src/vulkan/anv_wsi_x11.c index d327f4316d3..15ad98c3f8b 100644 --- a/src/vulkan/anv_wsi_x11.c +++ b/src/vulkan/anv_wsi_x11.c @@ -388,7 +388,7 @@ x11_surface_create_swapchain(struct anv_wsi_surface *wsi_surface, memory_h, 0); int ret = anv_gem_set_tiling(device, memory->bo.gem_handle, - surface->stride, I915_TILING_X); + surface->isl.row_pitch, I915_TILING_X); if (ret) { /* FINISHME: Choose a better error. */ result = vk_errorf(VK_ERROR_OUT_OF_DEVICE_MEMORY, @@ -415,7 +415,7 @@ x11_surface_create_swapchain(struct anv_wsi_surface *wsi_surface, image->size, pCreateInfo->imageExtent.width, pCreateInfo->imageExtent.height, - surface->stride, + surface->isl.row_pitch, depth, bpp, fd); chain->images[i].image = image; diff --git a/src/vulkan/gen7_cmd_buffer.c b/src/vulkan/gen7_cmd_buffer.c index dd80144270b..7101831080b 100644 --- a/src/vulkan/gen7_cmd_buffer.c +++ b/src/vulkan/gen7_cmd_buffer.c @@ -707,7 +707,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) .StencilWriteEnable = has_stencil, .HierarchicalDepthBufferEnable = false, .SurfaceFormat = iview->format->depth_format, - .SurfacePitch = image->depth_surface.stride - 1, + .SurfacePitch = image->depth_surface.isl.row_pitch - 1, .SurfaceBaseAddress = { .bo = image->bo, .offset = image->depth_surface.offset, @@ -758,7 +758,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) * The pitch must be set to 2x the value computed based on width, * as the stencil buffer is stored with two rows interleaved. */ - .SurfacePitch = 2 * image->stencil_surface.stride - 1, + .SurfacePitch = 2 * image->stencil_surface.isl.row_pitch - 1, .SurfaceBaseAddress = { .bo = image->bo, diff --git a/src/vulkan/gen7_state.c b/src/vulkan/gen7_state.c index 5a626f75eeb..6dcb5bffdf1 100644 --- a/src/vulkan/gen7_state.c +++ b/src/vulkan/gen7_state.c @@ -238,18 +238,21 @@ genX(image_view_init)(struct anv_image_view *iview, depth = image->extent.depth; } + const struct isl_extent3d lod_align_sa = + isl_surf_get_lod_alignment_sa(&surface->isl); + struct GENX(RENDER_SURFACE_STATE) surface_state = { .SurfaceType = image->surface_type, .SurfaceArray = image->array_size > 1, .SurfaceFormat = format->surface_format, - .SurfaceVerticalAlignment = anv_valign[surface->v_align], - .SurfaceHorizontalAlignment = anv_halign[surface->h_align], + .SurfaceVerticalAlignment = anv_valign[lod_align_sa.height], + .SurfaceHorizontalAlignment = anv_halign[lod_align_sa.width], /* From bspec (DevSNB, DevIVB): "Set Tile Walk to TILEWALK_XMAJOR if * Tiled Surface is False." */ - .TiledSurface = surface->tiling != ISL_TILING_LINEAR, - .TileWalk = surface->tiling == ISL_TILING_Y0 ? + .TiledSurface = surface->isl.tiling != ISL_TILING_LINEAR, + .TileWalk = surface->isl.tiling == ISL_TILING_Y0 ? TILEWALK_YMAJOR : TILEWALK_XMAJOR, .VerticalLineStride = 0, @@ -260,7 +263,7 @@ genX(image_view_init)(struct anv_image_view *iview, .Height = image->extent.height - 1, .Width = image->extent.width - 1, .Depth = depth - 1, - .SurfacePitch = surface->stride - 1, + .SurfacePitch = surface->isl.row_pitch - 1, .MinimumArrayElement = range->baseArrayLayer, .NumberofMultisamples = MULTISAMPLECOUNT_1, .XOffset = 0, diff --git a/src/vulkan/gen8_cmd_buffer.c b/src/vulkan/gen8_cmd_buffer.c index 6d0ac25b6d8..a23421102aa 100644 --- a/src/vulkan/gen8_cmd_buffer.c +++ b/src/vulkan/gen8_cmd_buffer.c @@ -659,7 +659,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) .StencilWriteEnable = has_stencil, .HierarchicalDepthBufferEnable = false, .SurfaceFormat = iview->format->depth_format, - .SurfacePitch = image->depth_surface.stride - 1, + .SurfacePitch = image->depth_surface.isl.row_pitch - 1, .SurfaceBaseAddress = { .bo = image->bo, .offset = image->depth_surface.offset, @@ -671,7 +671,7 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) .MinimumArrayElement = 0, .DepthBufferObjectControlState = GENX(MOCS), .RenderTargetViewExtent = 1 - 1, - .SurfaceQPitch = image->depth_surface.qpitch >> 2); + .SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->depth_surface.isl) >> 2); } else { /* Even when no depth buffer is present, the hardware requires that * 3DSTATE_DEPTH_BUFFER be programmed correctly. The Broadwell PRM says: @@ -709,13 +709,13 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer *cmd_buffer) * The pitch must be set to 2x the value computed based on width, * as the stencil buffer is stored with two rows interleaved. */ - .SurfacePitch = 2 * image->stencil_surface.stride - 1, + .SurfacePitch = 2 * image->stencil_surface.isl.row_pitch - 1, .SurfaceBaseAddress = { .bo = image->bo, .offset = image->offset + image->stencil_surface.offset, }, - .SurfaceQPitch = image->stencil_surface.stride >> 2); + .SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&image->stencil_surface.isl) >> 2); } else { anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_STENCIL_BUFFER)); } diff --git a/src/vulkan/gen8_state.c b/src/vulkan/gen8_state.c index f46611c629d..30478237bdd 100644 --- a/src/vulkan/gen8_state.c +++ b/src/vulkan/gen8_state.c @@ -183,13 +183,16 @@ genX(image_view_init)(struct anv_image_view *iview, [ISL_TILING_W] = WMAJOR, }; + const struct isl_extent3d lod_align_sa = + isl_surf_get_lod_alignment_sa(&surface->isl); + struct GENX(RENDER_SURFACE_STATE) surface_state = { .SurfaceType = image->surface_type, .SurfaceArray = image->array_size > 1, .SurfaceFormat = format_info->surface_format, - .SurfaceVerticalAlignment = anv_valign[surface->v_align], - .SurfaceHorizontalAlignment = anv_halign[surface->h_align], - .TileMode = isl_to_gen_tiling[surface->tiling], + .SurfaceVerticalAlignment = anv_valign[lod_align_sa.height], + .SurfaceHorizontalAlignment = anv_halign[lod_align_sa.width], + .TileMode = isl_to_gen_tiling[surface->isl.tiling], .VerticalLineStride = 0, .VerticalLineStrideOffset = 0, .SamplerL2BypassModeDisable = true, @@ -202,11 +205,11 @@ genX(image_view_init)(struct anv_image_view *iview, */ .BaseMipLevel = 0.0, - .SurfaceQPitch = surface->qpitch >> 2, + .SurfaceQPitch = isl_surf_get_array_pitch_el_rows(&surface->isl) >> 2, .Height = image->extent.height - 1, .Width = image->extent.width - 1, .Depth = depth - 1, - .SurfacePitch = surface->stride - 1, + .SurfacePitch = surface->isl.row_pitch - 1, .RenderTargetViewExtent = rt_view_extent - 1, .MinimumArrayElement = range->baseArrayLayer, .NumberofMultisamples = MULTISAMPLECOUNT_1, -- 2.30.2