From 98aab272a820ed4b426d7cdfe82599ea8a635246 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Thu, 23 Jan 2020 21:57:03 -0600 Subject: [PATCH] intel/disasm: Properly disassemble indirect SENDs Instead of emitting g[a0]UD for the indirect descriptor, emit a0<0>UD. This is more correct because there is no GRF involved. Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_disasm.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index e3e9b509f1b..57aa9e51091 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -1443,6 +1443,19 @@ src_sends_ia(FILE *file, return 0; } +static int +src_send_desc_ia(FILE *file, + const struct gen_device_info *devinfo, + unsigned _addr_subreg_nr) +{ + string(file, "a0"); + if (_addr_subreg_nr) + format(file, ".%d", _addr_subreg_nr); + format(file, "<0>UD"); + + return 0; +} + static int src0(FILE *file, const struct gen_device_info *devinfo, const brw_inst *inst) { @@ -1786,7 +1799,7 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, pad(file, 64); if (brw_inst_send_sel_reg32_desc(devinfo, inst)) { /* show the indirect descriptor source */ - err |= src_sends_ia(file, devinfo, BRW_REGISTER_TYPE_UD, 0, 0); + err |= src_send_desc_ia(file, devinfo, 0); } else { has_imm_desc = true; imm_desc = brw_inst_send_desc(devinfo, inst); @@ -1796,8 +1809,8 @@ brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo, pad(file, 80); if (brw_inst_send_sel_reg32_ex_desc(devinfo, inst)) { /* show the indirect descriptor source */ - err |= src_sends_ia(file, devinfo, BRW_REGISTER_TYPE_UD, 0, - brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst)); + err |= src_send_desc_ia(file, devinfo, + brw_inst_send_ex_desc_ia_subreg_nr(devinfo, inst)); } else { has_imm_ex_desc = true; imm_ex_desc = brw_inst_sends_ex_desc(devinfo, inst); -- 2.30.2