From 98e20ffd24f21f59b5eb49edb45961a2790bf81a Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Wed, 12 Jan 2005 14:14:56 +0000 Subject: [PATCH] (udivsi3_sh2a... (udivsi3_sh2a, divsi3_sh2a): Give these patterns an "in_delay_slot" attribute of "no" to prevent them being used in delay slots. This is forbidden because they might generate exceptions. From-SVN: r93225 --- gcc/ChangeLog | 7 +++++++ gcc/config/sh/sh.md | 6 ++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d666e251328..63d96c1edc6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2005-01-12 Nick Clifton + + * config/sh/sh.md (udivsi3_sh2a, divsi3_sh2a): Give these patterns + an "in_delay_slot" attribute of "no" to prevent them being used in + delay slots. This is forbidden because they might generate + exceptions. + 2005-01-12 Alan Modra PR target/19389 diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index ce4da84308e..b72582249d1 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1164,7 +1164,8 @@ (match_operand:SI 2 "arith_reg_operand" "z")))] "TARGET_SH2A" "divu %2,%1" - [(set_attr "type" "arith")]) + [(set_attr "type" "arith") + (set_attr "in_delay_slot" "no")]) ;; We must use a pseudo-reg forced to reg 0 in the SET_DEST rather than ;; hard register 0. If we used hard register 0, then the next instruction @@ -1348,7 +1349,8 @@ (match_operand:SI 2 "arith_reg_operand" "z")))] "TARGET_SH2A" "divs %2,%1" - [(set_attr "type" "arith")]) + [(set_attr "type" "arith") + (set_attr "in_delay_slot" "no")]) (define_insn "divsi3_i1" [(set (match_operand:SI 0 "register_operand" "=z") -- 2.30.2