From 99a2a30ed218a90988a01a811b1605944fd988f1 Mon Sep 17 00:00:00 2001 From: Neel Date: Sat, 17 Mar 2018 14:50:25 +0530 Subject: [PATCH] adding support for JTAG pins --- pinmap.txt | 5 +++++ src/interface_decl.py | 8 ++++++++ src/interface_def.py | 10 ++++++++++ src/parse.py | 1 + src/pinmux_generator.py | 13 +++++++++++++ src/wire_def.py | 23 +++++++++++++++++++++++ 6 files changed, 60 insertions(+) diff --git a/pinmap.txt b/pinmap.txt index 3c94746..82f9ffe 100644 --- a/pinmap.txt +++ b/pinmap.txt @@ -14,3 +14,8 @@ dedicated 5 uart1_rx 6 twi1_sda 7 twi1_scl +14 jtag0_tclk +15 jtag0_tdo +16 jtag0_tdi +17 jtag0_tms +18 jtag0_tdo diff --git a/src/interface_decl.py b/src/interface_decl.py index 8c390dd..4569b4c 100644 --- a/src/interface_decl.py +++ b/src/interface_decl.py @@ -56,4 +56,12 @@ sdinterface_decl = ''' (*always_ready,always_enabled*) method Action sd{0}_d3_outen (Bit#(1) in); (*always_ready,always_enabled*) method Bit#(1) sd{0}_d3_in; ''' + +jtaginterface_decl = ''' + (*always_ready,always_enabled*) method Bit#(1) jtag{0}_tdi; + (*always_ready,always_enabled*) method Bit#(1) jtag{0}_tms; + (*always_ready,always_enabled*) method Bit#(1) jtag{0}_tclk; + (*always_ready,always_enabled*) method Bit#(1) jtag{0}_trst; + (*always_ready,always_enabled*) method Action jtag{0}_tdo(Bit#(1) in); +''' # ======================================= # diff --git a/src/interface_def.py b/src/interface_def.py index acf0d9f..07d3b3f 100644 --- a/src/interface_def.py +++ b/src/interface_def.py @@ -92,4 +92,14 @@ sdinterface_def = ''' endmethod method sd{0}_d3_in=wrsd{0}_d3_in; ''' + +jtaginterface_def = ''' + method Bit#(1) jtag{0}_tdi=wrjtag{0}_tdi; + method Bit#(1) jtag{0}_tms=wrjtag{0}_tms; + method Bit#(1) jtag{0}_tclk=wrjtag{0}_tclk; + method Bit#(1) jtag{0}_trst=wrjtag{0}_trst; + method Action jtag{0}_tdo(Bit#(1) in); + wrjtag{0}_tdo<=in; + endmethod +''' # ============================================== # diff --git a/src/parse.py b/src/parse.py index ed7a970..a9913ae 100644 --- a/src/parse.py +++ b/src/parse.py @@ -6,6 +6,7 @@ N_UART = 4 N_SPI = 1 N_TWI = 2 N_SD = 2 +N_JTAG = 2 # ================ # diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index 11c2593..e4ef9f6 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -109,6 +109,11 @@ for i in range(0, N_SD): bsv_file.write(''' // interface declaration between SD-{0} and pinmux'''.format(i)) bsv_file.write(sdinterface_decl.format(i)) + +for i in range(0, N_JTAG): + bsv_file.write(''' + // interface declaration between JTAG-{0} and pinmux'''.format(i)) + bsv_file.write(jtaginterface_decl.format(i)) # ============================================================== # ===== finish interface definition and start module definition======= @@ -156,6 +161,12 @@ for i in range(0, N_SD): '''\n // following wires capture signals to IO CELL if sd-{0} is // allotted to it'''.format(i)) bsv_file.write(sdwires.format(i)) + +for i in range(0, N_JTAG): + bsv_file.write( + '''\n // following wires capture signals to IO CELL if jtag-{0} is + // allotted to it'''.format(i)) + bsv_file.write(jtagwires.format(i)) bsv_file.write("\n") # ==================================================================== # ========================= Actual pinmuxing ========================# @@ -181,6 +192,8 @@ for i in range(0, N_TWI): bsv_file.write(twiinterface_def.format(i)) for i in range(0, N_SD): bsv_file.write(sdinterface_def.format(i)) +for i in range(0, N_JTAG): + bsv_file.write(jtaginterface_def.format(i)) bsv_file.write(footer) print("BSV file successfully generated: bsv_src/pinmux.bsv") # ====================================================================== diff --git a/src/wire_def.py b/src/wire_def.py index b1a2f69..3982222 100644 --- a/src/wire_def.py +++ b/src/wire_def.py @@ -91,4 +91,27 @@ sdwires = ''' pullup_en:0, pulldown_en:0, pushpull_en:0, drivestrength:0, opendrain_en:0}}; ''' + +jtagwires = ''' + Wire#(Bit#(1)) wrjtag{0}_tdi<-mkDWire(0); + Wire#(Bit#(1)) wrjtag{0}_tms<-mkDWire(0); + Wire#(Bit#(1)) wrjtag{0}_tclk<-mkDWire(0); + Wire#(Bit#(1)) wrjtag{0}_trst<-mkDWire(0); + Wire#(Bit#(1)) wrjtag{0}_tdo<-mkDWire(0); + GenericIOType jtag{0}_tdi_io=GenericIOType{{outputval:0, output_en:0, + input_en:1, pullup_en:0, pulldown_en:0, pushpull_en:0, + drivestrength:0, opendrain_en:0}}; + GenericIOType jtag{0}_tdo_io=GenericIOType{{outputval:wrjtag{0}_tdo, + output_en:0, input_en:1, pullup_en:0, pulldown_en:0, + pushpull_en:0, drivestrength:0, opendrain_en:0}}; + GenericIOType jtag{0}_tms_io=GenericIOType{{outputval:0, output_en:0, + input_en:1, pullup_en:0, pulldown_en:0, pushpull_en:0, + drivestrength:0, opendrain_en:0}}; + GenericIOType jtag{0}_trst_io=GenericIOType{{outputval:0, output_en:0, + input_en:1, pullup_en:0, pulldown_en:0, pushpull_en:0, + drivestrength:0, opendrain_en:0}}; + GenericIOType jtag{0}_tclk_io=GenericIOType{{outputval:0, output_en:0, + input_en:1, pullup_en:0, pulldown_en:0, pushpull_en:0, + drivestrength:0, opendrain_en:0}}; +''' # =================================== # -- 2.30.2