From 99cd475cc9d3bd54140f84c24b55b9e05d7310a1 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sun, 8 Jan 2012 20:42:22 -0800 Subject: [PATCH] i965: Enable SIMD16 mode for shaders with loops on Gen6+. The hardware supports it; there's no reason not to. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 15eae43f487..b4ef80b6546 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1676,7 +1676,7 @@ fs_visitor::visit(ir_loop *ir) { fs_reg counter = reg_undef; - if (c->dispatch_width == 16) { + if (intel->gen < 6 && c->dispatch_width == 16) { fail("Can't support (non-uniform) control flow on 16-wide\n"); } -- 2.30.2