From 99e27dde2a1a5166bf312d285cd9182b8b9da97c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 6 Sep 2022 14:45:41 +0100 Subject: [PATCH] paragraph explaining regs not always accessible for all ops in svp64.mdwn --- openpower/sv/svp64.mdwn | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index dec1ff763..dae7e7b29 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -524,6 +524,10 @@ The register files are therefore extended: * FP is extended from fp0-32 to fp0-fp127 * CR Fields are extended from CR0-7 to CR0-127 +However due to pressure in `RM.EXTRA` not all these registers +are accessible by all instructions, particularly those with +a large number of operands (`madd`, `isel`). + In the following tables register numbers are constructed from the standard v3.0B / v3.1B 32 bit register field (RA, FRA) and the EXTRA2 or EXTRA3 field from the SV Prefix, determined by the specific -- 2.30.2