From 9a202971d6f5bca64f645e81e6d51779987580c1 Mon Sep 17 00:00:00 2001 From: klehman Date: Mon, 6 Sep 2021 22:22:12 -0400 Subject: [PATCH] Fixed typo for sraw test --- src/openpower/decoder/isa/test_caller_shift_rot.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/openpower/decoder/isa/test_caller_shift_rot.py b/src/openpower/decoder/isa/test_caller_shift_rot.py index 9cc12e86..4bfa5100 100644 --- a/src/openpower/decoder/isa/test_caller_shift_rot.py +++ b/src/openpower/decoder/isa/test_caller_shift_rot.py @@ -93,7 +93,7 @@ class DecoderTestCase(FHDLTestCase): sim = self.run_tst_program(program, initial_regs) self.assertEqual(sim.gpr(3), SelectableInt(0x123456, 64)) - def test_case_srw_1(self): + def test_case_srw_2(self): lst = ["sraw 3, 1, 2"] initial_regs = [0] * 32 initial_regs[1] = 0x82345678 # test the carry -- 2.30.2