From 9a5631784ee17058e6f220c5c0ef4c6f8473d957 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 4 Dec 2021 13:01:26 +0000 Subject: [PATCH] whoops fix up exception happened if alignment triggers from LoadStore1 set_wr_addr or set_rd_addr --- src/soc/fu/ldst/loadstore.py | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/soc/fu/ldst/loadstore.py b/src/soc/fu/ldst/loadstore.py index 2a3c85ae..15b2bfbd 100644 --- a/src/soc/fu/ldst/loadstore.py +++ b/src/soc/fu/ldst/loadstore.py @@ -286,6 +286,9 @@ class LoadStore1(PortInterfaceBase): with m.If(self.mmu_set_dar): sync += dar.eq(self.sprval_in) + # hmmm, alignment occurs in set_rd_addr/set_wr_addr, note exception + with m.If(self.align_intr): + comb += exc.happened.eq(1) # check for updating DAR with m.If(exception): sync += Display("exception %x", self.addr) -- 2.30.2