From 9b398b502e23c4597246db576765994ccd7127aa Mon Sep 17 00:00:00 2001 From: whitequark Date: Sun, 8 Sep 2019 23:55:05 +0000 Subject: [PATCH] hdl.ast: check type of Sample(domain=...). Fixes #199. --- nmigen/hdl/ast.py | 5 ++++- nmigen/test/test_hdl_ast.py | 7 ++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/nmigen/hdl/ast.py b/nmigen/hdl/ast.py index 07e00e5..0afa5d9 100644 --- a/nmigen/hdl/ast.py +++ b/nmigen/hdl/ast.py @@ -983,11 +983,14 @@ class Sample(Value): self.clocks = int(clocks) self.domain = domain if not isinstance(self.value, (Const, Signal, ClockSignal, ResetSignal, Initial)): - raise TypeError("Sampled value may only be a signal or a constant, not {!r}" + raise TypeError("Sampled value must be a signal or a constant, not {!r}" .format(self.value)) if self.clocks < 0: raise ValueError("Cannot sample a value {} cycles in the future" .format(-self.clocks)) + if not (self.domain is None or isinstance(self.domain, str)): + raise TypeError("Domain name must be a string or None, not {!r}" + .format(self.domain)) def shape(self): return self.value.shape() diff --git a/nmigen/test/test_hdl_ast.py b/nmigen/test/test_hdl_ast.py index a5cc22f..1fd70aa 100644 --- a/nmigen/test/test_hdl_ast.py +++ b/nmigen/test/test_hdl_ast.py @@ -629,7 +629,7 @@ class SampleTestCase(FHDLTestCase): def test_wrong_value_operator(self): with self.assertRaises(TypeError, - "Sampled value may only be a signal or a constant, not " + "Sampled value must be a signal or a constant, not " "(+ (sig $signal) (const 1'd1))"): Sample(Signal() + 1, 1, "sync") @@ -638,6 +638,11 @@ class SampleTestCase(FHDLTestCase): "Cannot sample a value 1 cycles in the future"): Sample(Signal(), -1, "sync") + def test_wrong_domain(self): + with self.assertRaises(TypeError, + "Domain name must be a string or None, not 0"): + Sample(Signal(), 1, 0) + class InitialTestCase(FHDLTestCase): def test_initial(self): -- 2.30.2