From 9ba4312712a96eba938c9d280e57f71929cdef41 Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Fri, 20 Sep 2019 09:42:40 +0000 Subject: [PATCH] re PR target/91269 (unaligned floating-point register with -mcpu=niagara4 -fcall-used-g6) PR target/91269 * config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define. From-SVN: r275994 --- gcc/ChangeLog | 5 +++ gcc/config/sparc/sparc.h | 7 ++++ gcc/testsuite/ChangeLog | 4 ++ gcc/testsuite/gcc.dg/pr91269.c | 70 ++++++++++++++++++++++++++++++++++ 4 files changed, 86 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/pr91269.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bda334b2df8..c841fffa7f7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-09-20 Eric Botcazou + + PR target/91269 + * config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define. + 2019-09-20 Richard Biener PR tree-optimization/91822 diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index defcba8ecd7..d14741846f5 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -711,6 +711,13 @@ along with GCC; see the file COPYING3. If not see register window instruction in the prologue. */ #define HARD_REGNO_RENAME_OK(FROM, TO) ((FROM) != 1) +/* Select a register mode required for caller save of hard regno REGNO. + Contrary to what is documented, the default is not the smallest suitable + mode but the largest suitable mode for the given (REGNO, NREGS) pair and + it quickly creates paradoxical subregs that can be problematic. */ +#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ + ((MODE) == VOIDmode ? choose_hard_reg_mode (REGNO, NREGS, false) : (MODE)) + /* Specify the registers used for certain standard purposes. The values of these macros are register numbers. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 59c6b7991ad..8e1b4be2c01 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-09-20 Eric Botcazou + + * gcc.dg/pr91269.c: New test. + 2019-09-20 Eric Botcazou * gcc.dg/typedef-var-1.c: New test. diff --git a/gcc/testsuite/gcc.dg/pr91269.c b/gcc/testsuite/gcc.dg/pr91269.c new file mode 100644 index 00000000000..8c03ba8dab2 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr91269.c @@ -0,0 +1,70 @@ +/* PR target/91269 */ +/* Testcase by Sergei Trofimovich */ + +/* { dg-do assemble } */ +/* { dg-options "-O2 -Wno-int-conversion" } */ +/* { dg-additional-options "-fcall-used-g6 -fPIE -mcpu=niagara4" { target sparc*-*-* } } */ + +struct m; + +enum { a = 2 }; +int b[1]; +int d[2715]; +int e, f, h; +enum { i = 2 } j; +inline int c(int k) { + char *cp; + if (k >= 62 && k <= 247) + cp = b[k]; + if (cp) + return 65533; + return 2; +} +inline int g(int k) { + if (k < sizeof(d)) + return e; + return 0; +} + +int u(struct m*, char*, char*); + +int l(struct m *k, char n, long o, int *p) { + int q, flags = j, r, s, lasttwo = *p; + char inptr, outptr; + while (inptr) { + if (__builtin_expect(h, 0)) + break; + unsigned ch = inptr; + if (lasttwo) { + long need = lasttwo >> 3; + if (__builtin_expect(need > n, 0)) + break; + } else if (s == i) { + long t = c(ch); + if (t != 65533) { + int jch = g(ch); + if (jch & 8) + continue; + } + } + if (ch <= 5) + ; + else { + long t = c(ch); + if (t != 65533) + ; + else { + switch (f >> 8) + case 79: + q = f == 20308 || f == 20350; + if (q) + if (j) + r = u(k, &inptr, &outptr); + s = *p; + if (r) + if (o && flags & a) + break; + } + } + } +} -- 2.30.2