From 9bcfb78ec42bd7406fd320ca59f8f43878efa23f Mon Sep 17 00:00:00 2001 From: Jordi Vaquero Date: Tue, 7 Apr 2020 12:23:03 +0200 Subject: [PATCH] arch-arm: Fix Sve Fcmla indexed instruction Sve implementation of FCMLA indexed instruction was incorrectly typed. This instruction is design to be used for half-precision and single precision. Change-Id: Ie529e21140ce5b26a8e72ac869a5422d32eba864 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28227 Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini Tested-by: kokoro --- src/arch/arm/isa/formats/sve_2nd_level.isa | 4 ++-- src/arch/arm/isa/insts/sve.isa | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/arch/arm/isa/formats/sve_2nd_level.isa b/src/arch/arm/isa/formats/sve_2nd_level.isa index b6f834038..53fd80d07 100644 --- a/src/arch/arm/isa/formats/sve_2nd_level.isa +++ b/src/arch/arm/isa/formats/sve_2nd_level.isa @@ -2799,12 +2799,12 @@ namespace Aarch64 case 2: zm = (IntRegIndex) (uint8_t) bits(machInst, 18, 16); imm = bits(machInst, 20, 19); - return new SveFcmlai(machInst, + return new SveFcmlai(machInst, zda, zn, zm, rot, imm); case 3: zm = (IntRegIndex) (uint8_t) bits(machInst, 19, 16); imm = bits(machInst, 20); - return new SveFcmlai(machInst, + return new SveFcmlai(machInst, zda, zn, zm, rot, imm); } return new Unknown64(machInst); diff --git a/src/arch/arm/isa/insts/sve.isa b/src/arch/arm/isa/insts/sve.isa index deb12bca4..06ff728b6 100644 --- a/src/arch/arm/isa/insts/sve.isa +++ b/src/arch/arm/isa/insts/sve.isa @@ -3558,7 +3558,7 @@ let {{ sveCmpInst('fcmuo', 'Fcmuo', 'SimdFloatCmpOp', fpTypes, fcmuoCode) # FCMLA (indexed) sveComplexMulAddInst('fcmla', 'Fcmlai', 'SimdFloatMultAccOp', - fpTypes[1:], predType = PredType.NONE) + fpTypes[:2], predType = PredType.NONE) # FCMLA (vectors) sveComplexMulAddInst('fcmla', 'Fcmlav', 'SimdFloatMultAccOp', fpTypes, predType = PredType.MERGE) -- 2.30.2