From 9be4edde729639979ac88bef64a2d12256086285 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 26 Aug 2022 16:05:22 +0100
Subject: [PATCH]

---
 openpower/sv/setvl.mdwn | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index dbc08e9b2..9e73d5ab3 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -148,7 +148,11 @@ from different sources is as follows:
 The reasoning here is that the opportunity to set RT equal to the
 immediate `SVi+1` is sacrificed in favour of setting from CTR.
 
-# Rc=1
+# Unusual Rc=1 behaviour
+
+Normally, the return result from an instruction is in `RT`. With
+it being possible for `RT=0` to mean that `CTR` mode is to be read,
+some different semantics are needed.
 
 CR Field 0, when `Rc=1`, may be set even if `RT=0`. The reason is that
 overflow may occur: `VL`, if set either from an immediate or from `CTR`,
-- 
2.30.2