From 9c023bf0bdfdcf26de6013f2a3692ac32511aa3e Mon Sep 17 00:00:00 2001 From: Yufeng Zhang Date: Thu, 27 Jun 2013 12:30:11 +0000 Subject: [PATCH] aarch64.c (aarch64_add_offset): Change to pass 'mode' to aarch64_plus_immediate and gen_rtx_PLUS. gcc/ * config/aarch64/aarch64.c (aarch64_add_offset): Change to pass 'mode' to aarch64_plus_immediate and gen_rtx_PLUS. From-SVN: r200466 --- gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.c | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d1d1113bfc5..5398537904e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-06-27 Yufeng Zhang + + * config/aarch64/aarch64.c (aarch64_add_offset): Change to pass + 'mode' to aarch64_plus_immediate and gen_rtx_PLUS. + 2013-06-27 Andreas Krebbel * config/s390/s390.c: Rename UNSPEC_CCU_TO_INT to diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 527b00dbcaa..81c6fd9f57d 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -804,7 +804,7 @@ aarch64_force_temporary (rtx x, rtx value) static rtx aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT offset) { - if (!aarch64_plus_immediate (GEN_INT (offset), DImode)) + if (!aarch64_plus_immediate (GEN_INT (offset), mode)) { rtx high; /* Load the full offset into a register. This @@ -812,7 +812,7 @@ aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT off high = GEN_INT (offset); offset = 0; high = aarch64_force_temporary (temp, high); - reg = aarch64_force_temporary (temp, gen_rtx_PLUS (Pmode, high, reg)); + reg = aarch64_force_temporary (temp, gen_rtx_PLUS (mode, high, reg)); } return plus_constant (mode, reg, offset); } -- 2.30.2