From 9c4e1c6a8fc47f44011f1f75e9493a1bc2de520d Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Fri, 30 Aug 2019 10:27:07 -0700 Subject: [PATCH] Format `-pwires` --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 38ca77862..0195248a0 100644 --- a/README.md +++ b/README.md @@ -330,7 +330,7 @@ Verilog Attributes and non-standard features - The ``parameter`` and ``localparam`` attributes are used to mark wires that represent module parameters or localparams (when the HDL front-end - is run in -pwires mode). + is run in ``-pwires`` mode). - The ``clkbuf_driver`` attribute can be set on an output port of a blackbox module to mark it as a clock buffer output, and thus prevent ``clkbufmap`` -- 2.30.2