From 9c64cb80d29bb779a99f5a32b0974e8f92e8c902 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 9 May 2014 15:56:08 +1000 Subject: [PATCH] nvc0: enable support for maxwell boards Signed-off-by: Ben Skeggs Reviewed-by: Ilia Mirkin --- .../drivers/nouveau/nvc0/nvc0_context.c | 3 +- .../drivers/nouveau/nvc0/nvc0_screen.c | 41 ++++++++++++------- .../drivers/nouveau/nvc0/nvc0_surface.c | 14 +++++++ src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c | 6 ++- .../drivers/nouveau/nvc0/nvc0_vbo_translate.c | 3 +- .../winsys/nouveau/drm/nouveau_drm_winsys.c | 1 + 6 files changed, 49 insertions(+), 19 deletions(-) diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c index 0e13556631a..83c8c34fa5b 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.c @@ -329,7 +329,8 @@ nvc0_create(struct pipe_screen *pscreen, void *priv) flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR; - BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->poly_cache); + if (screen->poly_cache) + BCTX_REFN_bo(nvc0->bufctx_3d, SCREEN, flags, screen->poly_cache); if (screen->compute) BCTX_REFN_bo(nvc0->bufctx_cp, CP_SCREEN, flags, screen->tls); diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c index ccf2374d474..cccfe2bba23 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c @@ -435,8 +435,10 @@ nvc0_magic_3d_init(struct nouveau_pushbuf *push, uint16_t obj_class) BEGIN_NVC0(push, SUBC_3D(0x0de8), 1); PUSH_DATA (push, 1); - BEGIN_NVC0(push, SUBC_3D(0x12ac), 1); - PUSH_DATA (push, 0); + if (obj_class < GM107_3D_CLASS) { + BEGIN_NVC0(push, SUBC_3D(0x12ac), 1); + PUSH_DATA (push, 0); + } BEGIN_NVC0(push, SUBC_3D(0x0218), 1); PUSH_DATA (push, 0x10); BEGIN_NVC0(push, SUBC_3D(0x10fc), 1); @@ -464,12 +466,15 @@ nvc0_magic_3d_init(struct nouveau_pushbuf *push, uint16_t obj_class) PUSH_DATA (push, 1); BEGIN_NVC0(push, SUBC_3D(0x19c0), 1); PUSH_DATA (push, 1); - BEGIN_NVC0(push, SUBC_3D(0x075c), 1); - PUSH_DATA (push, 3); - if (obj_class >= NVE4_3D_CLASS) { - BEGIN_NVC0(push, SUBC_3D(0x07fc), 1); - PUSH_DATA (push, 1); + if (obj_class < GM107_3D_CLASS) { + BEGIN_NVC0(push, SUBC_3D(0x075c), 1); + PUSH_DATA (push, 3); + + if (obj_class >= NVE4_3D_CLASS) { + BEGIN_NVC0(push, SUBC_3D(0x07fc), 1); + PUSH_DATA (push, 1); + } } /* TODO: find out what software methods 0x1528, 0x1280 and (on nve4) 0x02dc @@ -518,6 +523,8 @@ nvc0_screen_init_compute(struct nvc0_screen *screen) case 0xf0: case 0x100: return nve4_screen_compute_setup(screen, screen->base.pushbuf); + case 0x110: + return 0; default: return -1; } @@ -579,6 +586,7 @@ nvc0_screen_create(struct nouveau_device *dev) case 0xe0: case 0xf0: case 0x100: + case 0x110: break; default: return NULL; @@ -635,6 +643,7 @@ nvc0_screen_create(struct nouveau_device *dev) switch (dev->chipset & ~0xf) { + case 0x110: case 0x100: case 0xf0: obj_class = NVF0_P2MF_CLASS; @@ -858,15 +867,17 @@ nvc0_screen_create(struct nouveau_device *dev) BEGIN_NVC0(push, NVC0_3D(LOCAL_BASE), 1); PUSH_DATA (push, 0); - ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, NULL, - &screen->poly_cache); - if (ret) - goto fail; + if (screen->eng3d->oclass < GM107_3D_CLASS) { + ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, NULL, + &screen->poly_cache); + if (ret) + goto fail; - BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3); - PUSH_DATAh(push, screen->poly_cache->offset); - PUSH_DATA (push, screen->poly_cache->offset); - PUSH_DATA (push, 3); + BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3); + PUSH_DATAh(push, screen->poly_cache->offset); + PUSH_DATA (push, screen->poly_cache->offset); + PUSH_DATA (push, 3); + } ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, NULL, &screen->txc); diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c index 066b63b05d1..d11dbb2df6a 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_surface.c @@ -543,9 +543,23 @@ nvc0_blitter_make_vp(struct nvc0_blitter *blit) 0x03f01c46, 0x0a7e0080, /* export b96 o[0x80] $r0:$r1:$r2 */ 0x00001de7, 0x80000000, /* exit */ }; + static const uint32_t code_gm107[] = + { + 0xfc0007e0, 0x001f8000, /* sched 0x7e0 0x7e0 0x7e0 */ + 0x0807ff04, 0xefd8ff80, /* ld b64 $r4 a[0x80] 0x0 */ + 0x0907ff00, 0xefd97f80, /* ld b96 $r0 a[0x90] 0x0 */ + 0x0707ff04, 0xeff0ff80, /* st b64 a[0x70] $r4 0x0 */ + 0xfc0007e0, 0x00000000, /* sched 0x7e0 0x7e0 0x0 */ + 0x0807ff00, 0xeff17f80, /* st b96 a[0x80] $r0 0x0 */ + 0x0007000f, 0xe3000000, /* exit */ + }; blit->vp.type = PIPE_SHADER_VERTEX; blit->vp.translated = TRUE; + if (blit->screen->base.class_3d >= GM107_3D_CLASS) { + blit->vp.code = (uint32_t *)code_gm107; /* const_cast */ + blit->vp.code_size = sizeof(code_gm107); + } else if (blit->screen->base.class_3d >= NVE4_3D_CLASS) { blit->vp.code = (uint32_t *)code_nve4; /* const_cast */ blit->vp.code_size = sizeof(code_nve4); diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c index 5a65226bea4..c58d6daddf1 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c @@ -771,7 +771,8 @@ nvc0_draw_stream_output(struct nvc0_context *nvc0, PUSH_SPACE(push, 2); IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0); nvc0_query_fifo_wait(push, so->pq); - IMMED_NVC0(push, NVC0_3D(VERTEX_ARRAY_FLUSH), 0); + if (nvc0->screen->eng3d->oclass < GM107_3D_CLASS) + IMMED_NVC0(push, NVC0_3D(VERTEX_ARRAY_FLUSH), 0); NOUVEAU_DRV_STAT(&nvc0->screen->base, gpu_serialize_count, 1); } @@ -859,7 +860,8 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) nvc0->base.vbo_dirty = TRUE; if (nvc0->base.vbo_dirty) { - IMMED_NVC0(push, NVC0_3D(VERTEX_ARRAY_FLUSH), 0); + if (nvc0->screen->eng3d->oclass < GM107_3D_CLASS) + IMMED_NVC0(push, NVC0_3D(VERTEX_ARRAY_FLUSH), 0); nvc0->base.vbo_dirty = FALSE; } diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c index 952828a75fc..fc578f2d547 100644 --- a/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_vbo_translate.c @@ -488,7 +488,8 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info) if (unlikely(ctx.need_vertex_id)) nvc0_push_upload_vertex_ids(&ctx, nvc0, info); - IMMED_NVC0(ctx.push, NVC0_3D(VERTEX_ARRAY_FLUSH), 0); + if (nvc0->screen->eng3d->oclass < GM107_3D_CLASS) + IMMED_NVC0(ctx.push, NVC0_3D(VERTEX_ARRAY_FLUSH), 0); BEGIN_NVC0(ctx.push, NVC0_3D(VERTEX_BEGIN_GL), 1); PUSH_DATA (ctx.push, prim); switch (index_size) { diff --git a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c index a077c48c206..1dfdaacb620 100644 --- a/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c +++ b/src/gallium/winsys/nouveau/drm/nouveau_drm_winsys.c @@ -96,6 +96,7 @@ nouveau_drm_screen_create(int fd) case 0xe0: case 0xf0: case 0x100: + case 0x110: init = nvc0_screen_create; break; default: -- 2.30.2