From 9c7c2916e250ff59bae23608f6cbcb6ac60bd843 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 28 Mar 2020 18:00:05 +0000 Subject: [PATCH] add stringldst --- openpower/isa/stringldst.mdwn | 78 +++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 openpower/isa/stringldst.mdwn diff --git a/openpower/isa/stringldst.mdwn b/openpower/isa/stringldst.mdwn new file mode 100644 index 000000000..734476670 --- /dev/null +++ b/openpower/isa/stringldst.mdwn @@ -0,0 +1,78 @@ +# Load String Word Immediate + +lswi RT,RA,NB + + if RA = 0 then EA <- 0 + else EA <- (RA) + if NB = 0 then n <- 32 + else n <- NB + r <- RT - 1 + i <- 32 + do while n > 0 + if i = 32 then + r <- r + 1 (mod 32) + GPR(r) <- 0 + GPR(r)[i:i+7] <- MEM(EA, 1) + i <- i + 8 + if i = 64 then i <- 32 + EA <- EA + 1 + n <- n - 1 + +# Load String Word Indexed + +lswx RT,RA,RB + + if RA = 0 then b <- 0 + else b <- (RA) + EA <- b + (RB) + n <- XER 57:63 + r <- RT - 1 + i <- 32 + RT <- undefined + do while n > 0 + + if i = 32 then + r <- r + 1 (mod 32) + GPR(r) <- 0 + GPR(r)[i:i+7] <- MEM(EA, 1) + i <- i + 8 + if i = 64 then i <- 32 + EA <- EA + 1 + n <- n - 1 + +# Store String Word Immediate + +stswi RS,RA,NB + + if RA = 0 then EA <- 0 + else EA <- (RA) + if NB = 0 then n <- 32 + else n <- NB + r <- RS - 1 + i <- 32 + do while n > 0 + if i = 32 then r <- (r + 1) % 32 + MEM(EA, 1) <- GPR(r)[i:i+7] + i <- i + 8 + if i = 64 then i <- 32 + EA <- EA + 1 + n <- n - 1 + +# Store String Word Indexed + +stswx RS,RA,RB + + if RA = 0 then b <- 0 + else b <- (RA) + EA <- b + (RB) + n <- XER57:63 + r <- RS - 1 + i <- 32 + do while n > 0 + if i = 32 then r <- (r + 1) % 32 + MEM(EA, 1) <- GPR(r)[i:i+7] + i <- i + 8 + if i = 64 then i <- 32 + EA <- EA + 1 + n <- n - 1 + -- 2.30.2