From 9cc92a36ed6e61f930a367557dc8e92dcdda5a79 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 8 Apr 2003 12:47:08 +0000 Subject: [PATCH] * as.c (perform_an_assembly_pass): If using cgen, call gas_cgen_begin. * cgen.c (gas_cgen_begin): New function. If flag_signed_overflow_ok is set call cgen_set_signed_overflow_ok otherwise call cgen_clear_signed_overflow_ok. * cgen.h: Prototype gas_cgen_begin. * testsuite/gas/m32r/m32r.exp: Run signed-relocs test. * testsuite/gas/m32r/signed-relocs.s: New file: Test signed relocs. * testsuite/gas/m32r/signed-relocs.d: New file: Expected results --- gas/ChangeLog | 9 +++ gas/as.c | 7 +++ gas/cgen.c | 12 ++++ gas/cgen.h | 3 + gas/testsuite/ChangeLog | 4 ++ gas/testsuite/gas/m32r/m32r.exp | 1 + gas/testsuite/gas/m32r/signed-relocs.d | 77 +++++++++++++++++++++++++ gas/testsuite/gas/m32r/signed-relocs.s | 80 ++++++++++++++++++++++++++ 8 files changed, 193 insertions(+) create mode 100644 gas/testsuite/gas/m32r/signed-relocs.d create mode 100644 gas/testsuite/gas/m32r/signed-relocs.s diff --git a/gas/ChangeLog b/gas/ChangeLog index f958f69f1a5..9918fc55779 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2003-04-08 Nick Clifton + + * as.c (perform_an_assembly_pass): If using cgen, call + gas_cgen_begin. + * cgen.c (gas_cgen_begin): New function. If + flag_signed_overflow_ok is set call cgen_set_signed_overflow_ok + otherwise call cgen_clear_signed_overflow_ok. + * cgen.h: Prototype gas_cgen_begin. + 2003-04-07 Thiemo Seufer * write.c (write_relocs): Remove unused variable. diff --git a/gas/as.c b/gas/as.c index 43f413f5e12..23ed9f7825a 100644 --- a/gas/as.c +++ b/gas/as.c @@ -65,6 +65,10 @@ static void parse_args PARAMS ((int *, char ***)); static void dump_statistics PARAMS ((void)); static void perform_an_assembly_pass PARAMS ((int argc, char **argv)); static int macro_expr PARAMS ((const char *, int, sb *, int *)); +#ifdef USING_CGEN +/* Perform any cgen specific initialisation for gas. */ +extern void gas_cgen_begin PARAMS ((void)); +#endif /* True if a listing is wanted. */ int listing; @@ -1064,6 +1068,9 @@ perform_an_assembly_pass (argc, argv) and sections already created, in BFD_ASSEMBLER mode. */ md_begin (); +#ifdef USING_CGEN + gas_cgen_begin (); +#endif #ifdef obj_begin obj_begin (); #endif diff --git a/gas/cgen.c b/gas/cgen.c index 76e6826b1ea..e0740f57952 100644 --- a/gas/cgen.c +++ b/gas/cgen.c @@ -716,3 +716,15 @@ gas_cgen_tc_gen_reloc (section, fixP) reloc->address = fixP->fx_frag->fr_address + fixP->fx_where; return reloc; } + +/* Perform any cgen specific initialisation. + Called after gas_cgen_cpu_desc has been created. */ + +void +gas_cgen_begin () +{ + if (flag_signed_overflow_ok) + cgen_set_signed_overflow_ok (gas_cgen_cpu_desc); + else + cgen_clear_signed_overflow_ok (gas_cgen_cpu_desc); +} diff --git a/gas/cgen.h b/gas/cgen.h index 9d814b785c9..d892915c8ff 100644 --- a/gas/cgen.h +++ b/gas/cgen.h @@ -98,4 +98,7 @@ md_cgen_record_fixup_exp PARAMS ((fragS *, int, const CGEN_INSN *, int, extern void gas_cgen_md_operand PARAMS ((expressionS *)); +/* Perform any cgen specific initialisation for gas. */ +extern void gas_cgen_begin PARAMS ((void)); + #endif /* GAS_CGEN_H */ diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index dc696c4e497..d68df69aaea 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2003-04-08 Nick Clifton + * gas/m32r/m32r.exp: Run signed-relocs test. + * gas/m32r/signed-relocs.s: New file: Test signed relocs. + * gas/m32r/signed-relocs.d: New file: Expected results + * gas/ia64/dependency-1.s: New file: Test read before write dependency. * gas/ia64/dependency-1.d: New file: Expected assembly results. * gas/ia64/ia64.exp: Run the new test. diff --git a/gas/testsuite/gas/m32r/m32r.exp b/gas/testsuite/gas/m32r/m32r.exp index 28c23642fac..0ac272b1358 100644 --- a/gas/testsuite/gas/m32r/m32r.exp +++ b/gas/testsuite/gas/m32r/m32r.exp @@ -5,4 +5,5 @@ if [istarget m32r*-*-*] { run_dump_test "relax-1" run_dump_test "uppercase" run_dump_test "fslot" + run_dump_test "signed-relocs" } diff --git a/gas/testsuite/gas/m32r/signed-relocs.d b/gas/testsuite/gas/m32r/signed-relocs.d new file mode 100644 index 00000000000..79d5a1ec619 --- /dev/null +++ b/gas/testsuite/gas/m32r/signed-relocs.d @@ -0,0 +1,77 @@ +#as: -J +#objdump: -dr +#name: Signed relocs + +.*: +file format .* + +Disassembly of section .text: + +0+0000 : + 0: d0 c0 87 65 seth r0,#0x8765 + 4: 80 a0 43 21 add3 r0,r0,#17185 + 8: d0 c0 87 65 seth r0,#0x8765 + c: 80 a0 43 21 add3 r0,r0,#17185 + 10: d0 c0 12 35 seth r0,#0x1235 + 14: 80 a0 ff ff add3 r0,r0,#-1 + 18: d0 c0 12 35 seth r0,#0x1235 + 1c: 80 a0 ff ff add3 r0,r0,#-1 + 20: d0 c0 87 65 seth r0,#0x8765 + 24: 80 e0 43 21 or3 r0,r0,#0x4321 + 28: d0 c0 87 65 seth r0,#0x8765 + 2c: 80 e0 43 21 or3 r0,r0,#0x4321 + 30: d0 c0 12 34 seth r0,#0x1234 + 34: 80 e0 ff ff or3 r0,r0,#0xffff + 38: d0 c0 12 34 seth r0,#0x1234 + 3c: 80 e0 ff ff or3 r0,r0,#0xffff + 40: d0 c0 87 65 seth r0,#0x8765 + 44: a0 c0 43 20 ld r0,@\(17184,r0\) + 48: d0 c0 87 65 seth r0,#0x8765 + 4c: a0 a0 43 20 ldh r0,@\(17184,r0\) + 50: d0 c0 87 65 seth r0,#0x8765 + 54: a0 b0 43 20 lduh r0,@\(17184,r0\) + 58: d0 c0 87 65 seth r0,#0x8765 + 5c: a0 80 43 20 ldb r0,@\(17184,r0\) + 60: d0 c0 87 65 seth r0,#0x8765 + 64: a0 90 43 20 ldub r0,@\(17184,r0\) + 68: d0 c0 12 35 seth r0,#0x1235 + 6c: a0 c0 ff f0 ld r0,@\(-16,r0\) + 70: d0 c0 12 35 seth r0,#0x1235 + 74: a0 a0 ff f0 ldh r0,@\(-16,r0\) + 78: d0 c0 12 35 seth r0,#0x1235 + 7c: a0 b0 ff f0 lduh r0,@\(-16,r0\) + 80: d0 c0 12 35 seth r0,#0x1235 + 84: a0 80 ff f0 ldb r0,@\(-16,r0\) + 88: d0 c0 12 35 seth r0,#0x1235 + 8c: a0 90 ff f0 ldub r0,@\(-16,r0\) + 90: d0 c0 87 65 seth r0,#0x8765 + 94: a0 c0 43 20 ld r0,@\(17184,r0\) + 98: d0 c0 87 65 seth r0,#0x8765 + 9c: a0 a0 43 20 ldh r0,@\(17184,r0\) + a0: d0 c0 87 65 seth r0,#0x8765 + a4: a0 b0 43 20 lduh r0,@\(17184,r0\) + a8: d0 c0 87 65 seth r0,#0x8765 + ac: a0 80 43 20 ldb r0,@\(17184,r0\) + b0: d0 c0 87 65 seth r0,#0x8765 + b4: a0 90 43 20 ldub r0,@\(17184,r0\) + b8: d0 c0 12 35 seth r0,#0x1235 + bc: a0 c0 ff f0 ld r0,@\(-16,r0\) + c0: d0 c0 87 65 seth r0,#0x8765 + c4: a0 40 43 20 st r0,@\(17184,r0\) + c8: d0 c0 87 65 seth r0,#0x8765 + cc: a0 20 43 20 sth r0,@\(17184,r0\) + d0: d0 c0 87 65 seth r0,#0x8765 + d4: a0 00 43 20 stb r0,@\(17184,r0\) + d8: d0 c0 12 35 seth r0,#0x1235 + dc: a0 40 ff f0 st r0,@\(-16,r0\) + e0: d0 c0 12 35 seth r0,#0x1235 + e4: a0 20 ff f0 sth r0,@\(-16,r0\) + e8: d0 c0 12 35 seth r0,#0x1235 + ec: a0 00 ff f0 stb r0,@\(-16,r0\) + f0: d0 c0 87 65 seth r0,#0x8765 + f4: a0 40 43 20 st r0,@\(17184,r0\) + f8: d0 c0 87 65 seth r0,#0x8765 + fc: a0 20 43 20 sth r0,@\(17184,r0\) + 100: d0 c0 87 65 seth r0,#0x8765 + 104: a0 00 43 20 stb r0,@\(17184,r0\) + 108: d0 c0 12 35 seth r0,#0x1235 + 10c: a0 40 ff f0 st r0,@\(-16,r0\) diff --git a/gas/testsuite/gas/m32r/signed-relocs.s b/gas/testsuite/gas/m32r/signed-relocs.s new file mode 100644 index 00000000000..3327dd381b1 --- /dev/null +++ b/gas/testsuite/gas/m32r/signed-relocs.s @@ -0,0 +1,80 @@ +; check: not case sensitive for special operand modifier +; check: shigh, high, low + .text +relocs: + seth r0, #shigh(0x87654321) + add3 r0, r0, #low(0x87654321) + seth r0, #SHIGH(0x87654321) + add3 r0, r0, #LOW(0x87654321) + seth r0, #shigh(0x1234ffff) + add3 r0, r0, #low(0x1234ffff) + seth r0, #SHIGH(0x1234ffff) + add3 r0, r0, #LOW(0x1234ffff) + + seth r0, #high(0x87654321) + or3 r0, r0, #low(0x87654321) + seth r0, #HIGH(0x87654321) + or3 r0, r0, #LOW(0x87654321) + seth r0, #high(0x1234ffff) + or3 r0, r0, #low(0x1234ffff) + seth r0, #HIGH(0x1234ffff) + or3 r0, r0, #LOW(0x1234ffff) + + seth r0, #shigh(0x87654320) + ld r0, @(#low(0x87654320),r0) + seth r0, #shigh(0x87654320) + ldh r0, @(#low(0x87654320),r0) + seth r0, #shigh(0x87654320) + lduh r0, @(#low(0x87654320),r0) + seth r0, #shigh(0x87654320) + ldb r0, @(#low(0x87654320),r0) + seth r0, #shigh(0x87654320) + ldub r0, @(#low(0x87654320),r0) + + seth r0, #shigh(0x1234fff0) + ld r0, @(#low(0x1234fff0),r0) + seth r0, #shigh(0x1234fff0) + ldh r0, @(#low(0x1234fff0),r0) + seth r0, #shigh(0x1234fff0) + lduh r0, @(#low(0x1234fff0),r0) + seth r0, #shigh(0x1234fff0) + ldb r0, @(#low(0x1234fff0),r0) + seth r0, #shigh(0x1234fff0) + ldub r0, @(#low(0x1234fff0),r0) + + seth r0, #SHIGH(0x87654320) + ld r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x87654320) + ldh r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x87654320) + lduh r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x87654320) + ldb r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x87654320) + ldub r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x1234fff0) + ld r0, @(#LOW(0x1234fff0),r0) + + seth r0, #shigh(0x87654320) + st r0, @(#low(0x87654320),r0) + seth r0, #shigh(0x87654320) + sth r0, @(#low(0x87654320),r0) + seth r0, #shigh(0x87654320) + stb r0, @(#low(0x87654320),r0) + + seth r0, #shigh(0x1234fff0) + st r0, @(#low(0x1234fff0),r0) + seth r0, #shigh(0x1234fff0) + sth r0, @(#low(0x1234fff0),r0) + seth r0, #shigh(0x1234fff0) + stb r0, @(#low(0x1234fff0),r0) + + seth r0, #SHIGH(0x87654320) + st r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x87654320) + sth r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x87654320) + stb r0, @(#LOW(0x87654320),r0) + seth r0, #SHIGH(0x1234fff0) + st r0, @(#LOW(0x1234fff0),r0) + -- 2.30.2