From 9cf74e975b872b854853e2a121eab90ce6aa87e1 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 14 May 2023 16:44:24 +0100 Subject: [PATCH] classify LD/ST-Immediate-Update as EXTRA3. this allows continuous range on registers up to 128 --- openpower/isatables/LDSTRM-2P-1S2D.csv | 14 +++++++------- openpower/isatables/LDSTRM-2P-2S1D.csv | 12 ++++++------ src/openpower/sv/sv_analysis.py | 14 ++++++-------- 3 files changed, 19 insertions(+), 21 deletions(-) diff --git a/openpower/isatables/LDSTRM-2P-1S2D.csv b/openpower/isatables/LDSTRM-2P-1S2D.csv index a4dd92eb..ef9989af 100644 --- a/openpower/isatables/LDSTRM-2P-1S2D.csv +++ b/openpower/isatables/LDSTRM-2P-1S2D.csv @@ -1,8 +1,8 @@ insn,mode,CONDITIONS,Ptype,Etype,SM,0,1,2,3,in1,in2,in3,out,CR in,CR out,out2 -lwzu,LDST_IMM,,2P,EXTRA2,EN,d:RT,d:RA,s:RA,0,RA_OR_ZERO,0,0,RT,0,0,RA -lbzu,LDST_IMM,,2P,EXTRA2,EN,d:RT,d:RA,s:RA,0,RA_OR_ZERO,0,0,RT,0,0,RA -lhzu,LDST_IMM,,2P,EXTRA2,EN,d:RT,d:RA,s:RA,0,RA_OR_ZERO,0,0,RT,0,0,RA -lhau,LDST_IMM,,2P,EXTRA2,EN,d:RT,d:RA,s:RA,0,RA_OR_ZERO,0,0,RT,0,0,RA -lfsu,LDST_IMM,,2P,EXTRA2,EN,d:FRT,d:RA,s:RA,0,RA,0,0,FRT,0,0,RA -lfdu,LDST_IMM,,2P,EXTRA2,EN,d:FRT,d:RA,s:RA,0,RA,0,0,FRT,0,0,RA -ldu,LDST_IMM,,2P,EXTRA2,EN,d:RT,d:RA,s:RA,0,RA_OR_ZERO,0,0,RT,0,0,RA +lwzu,LDST_IMM,,2P,EXTRA3,EN,d:RT,d:RA;s:RA,0,0,RA_OR_ZERO,0,0,RT,0,0,RA +lbzu,LDST_IMM,,2P,EXTRA3,EN,d:RT,d:RA;s:RA,0,0,RA_OR_ZERO,0,0,RT,0,0,RA +lhzu,LDST_IMM,,2P,EXTRA3,EN,d:RT,d:RA;s:RA,0,0,RA_OR_ZERO,0,0,RT,0,0,RA +lhau,LDST_IMM,,2P,EXTRA3,EN,d:RT,d:RA;s:RA,0,0,RA_OR_ZERO,0,0,RT,0,0,RA +lfsu,LDST_IMM,,2P,EXTRA3,EN,d:FRT,d:RA;s:RA,0,0,RA,0,0,FRT,0,0,RA +lfdu,LDST_IMM,,2P,EXTRA3,EN,d:FRT,d:RA;s:RA,0,0,RA,0,0,FRT,0,0,RA +ldu,LDST_IMM,,2P,EXTRA3,EN,d:RT,d:RA;s:RA,0,0,RA_OR_ZERO,0,0,RT,0,0,RA diff --git a/openpower/isatables/LDSTRM-2P-2S1D.csv b/openpower/isatables/LDSTRM-2P-2S1D.csv index 784bba67..d850f492 100644 --- a/openpower/isatables/LDSTRM-2P-2S1D.csv +++ b/openpower/isatables/LDSTRM-2P-2S1D.csv @@ -20,12 +20,12 @@ lbzcix,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0 lfiwax,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,FRT,0,0,0 ldcix,LDST_IDX,,2P,EXTRA2,EN,d:RT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,0 lfiwzx,LDST_IDX,,2P,EXTRA2,EN,d:FRT,s:RA,s:RB,0,RA_OR_ZERO,RB,0,FRT,0,0,0 -stwu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA -stbu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA -sthu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA -stfsu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:FRS,s:RA,0,RA,0,FRS,0,0,0,RA -stfdu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:FRS,s:RA,0,RA,0,FRS,0,0,0,RA -stdu,LDST_IMM,,2P,EXTRA2,EN,d:RA,s:RS,s:RA,0,RA_OR_ZERO,0,RS,0,0,0,RA +stwu,LDST_IMM,,2P,EXTRA3,EN,d:RA;s:RA,s:RS,0,0,RA_OR_ZERO,0,RS,0,0,0,RA +stbu,LDST_IMM,,2P,EXTRA3,EN,d:RA;s:RA,s:RS,0,0,RA_OR_ZERO,0,RS,0,0,0,RA +sthu,LDST_IMM,,2P,EXTRA3,EN,d:RA;s:RA,s:RS,0,0,RA_OR_ZERO,0,RS,0,0,0,RA +stfsu,LDST_IMM,,2P,EXTRA3,EN,d:RA;s:RA,s:FRS,0,0,RA,0,FRS,0,0,0,RA +stfdu,LDST_IMM,,2P,EXTRA3,EN,d:RA;s:RA,s:FRS,0,0,RA,0,FRS,0,0,0,RA +stdu,LDST_IMM,,2P,EXTRA3,EN,d:RA;s:RA,s:RS,0,0,RA_OR_ZERO,0,RS,0,0,0,RA ldux,LDST_IDX,,2P,EXTRA2,EN,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA lwzux,LDST_IDX,,2P,EXTRA2,EN,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA lbzux,LDST_IDX,,2P,EXTRA2,EN,d:RT,d:RA,s:RB,0,RA_OR_ZERO,RB,0,RT,0,0,RA diff --git a/src/openpower/sv/sv_analysis.py b/src/openpower/sv/sv_analysis.py index 5b39295e..072742c6 100644 --- a/src/openpower/sv/sv_analysis.py +++ b/src/openpower/sv/sv_analysis.py @@ -430,10 +430,9 @@ def extra_classifier(insn_name, value, name, res, regs): res['1'] = 's:RA' # RA: Rsrc1_EXTRA3 elif value == 'LDSTRM-2P-1S2D': - res['Etype'] = 'EXTRA2' # RM EXTRA2 type - res['0'] = dRT # RT: Rdest_EXTRA3 - res['1'] = 'd:RA' # RA: Rdest2_EXTRA2 - res['2'] = 's:RA' # RA: Rsrc1_EXTRA2 + res['Etype'] = 'EXTRA3' # RM EXTRA2 type + res['0'] = dRT # RT: Rdest_EXTRA3 + res['1'] = 'd:RA;s:RA' # RA: Rdest2_EXTRA3 elif value == 'LDSTRM-2P-2S': # stw, std, sth, stb @@ -443,10 +442,9 @@ def extra_classifier(insn_name, value, name, res, regs): elif value == 'LDSTRM-2P-2S1D': if 'st' in insn_name and 'x' not in insn_name: # stwu/stbu etc - res['Etype'] = 'EXTRA2' # RM EXTRA2 type - res['0'] = 'd:RA' # RA: Rdest1_EXTRA2 - res['1'] = sRS # RS: Rdsrc1_EXTRA2 - res['2'] = 's:RA' # RA: Rsrc2_EXTRA2 + res['Etype'] = 'EXTRA3' # RM EXTRA2 type + res['0'] = 'd:RA;s:RA' # RA: Rdest_EXTRA3 / Rsrc_EXTRA3 + res['1'] = sRS # RS: Rdsrc1_EXTRA3 elif 'st' in insn_name and 'x' in insn_name: # stwux res['Etype'] = 'EXTRA2' # RM EXTRA2 type res['0'] = 'd:RA' # RA: Rdest1_EXTRA2 -- 2.30.2