From 9d5019a1968ce2d54d054df223be16ca832d913e Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Wed, 8 Feb 2017 02:54:17 +0000 Subject: [PATCH] aarch64.md (popcount2): New pattern. 2016-02-07 Andrew Pinski gcc * config/aarch64/aarch64.md (popcount2): New pattern. gcc/testsuite * gcc.target/aarch64/popcount.c : New Testcase. From-SVN: r245267 --- gcc/ChangeLog | 4 +++ gcc/config/aarch64/aarch64.md | 33 +++++++++++++++++++++++ gcc/testsuite/ChangeLog | 4 +++ gcc/testsuite/gcc.target/aarch64/popcnt.c | 23 ++++++++++++++++ 4 files changed, 64 insertions(+) create mode 100644 gcc/testsuite/gcc.target/aarch64/popcnt.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ead1661df3b..527143ac944 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2017-02-07 Andrew Pinski + + * config/aarch64/aarch64.md (popcount2): New pattern. + 2017-02-07 Andrew Pinski * config/aarch64/aarch64-cores.def (thunderx): Disable LSE. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 7550c3e7c2b..5adc5edb8dd 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3779,6 +3779,39 @@ } ) +;; Pop count be done via the "CNT" instruction in AdvSIMD. +;; +;; MOV v.1d, x0 +;; CNT v1.8b, v.8b +;; ADDV b2, v1.8b +;; MOV w0, v2.b[0] + +(define_expand "popcount2" + [(match_operand:GPI 0 "register_operand") + (match_operand:GPI 1 "register_operand")] + "TARGET_SIMD" +{ + rtx v = gen_reg_rtx (V8QImode); + rtx v1 = gen_reg_rtx (V8QImode); + rtx r = gen_reg_rtx (QImode); + rtx in = operands[1]; + rtx out = operands[0]; + if(mode == SImode) + { + rtx tmp; + tmp = gen_reg_rtx (DImode); + /* If we have SImode, zero extend to DImode, pop count does + not change if we have extra zeros. */ + emit_insn (gen_zero_extendsidi2 (tmp, in)); + in = tmp; + } + emit_move_insn (v, gen_lowpart (V8QImode, in)); + emit_insn (gen_popcountv8qi2 (v1, v)); + emit_insn (gen_reduc_plus_scal_v8qi (r, v1)); + emit_insn (gen_zero_extendqi2 (out, r)); + DONE; +}) + (define_insn "clrsb2" [(set (match_operand:GPI 0 "register_operand" "=r") (clrsb:GPI (match_operand:GPI 1 "register_operand" "r")))] diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7d793de238f..81b25807dd0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-02-07 Andrew Pinski + + * gcc.target/aarch64/popcount.c : New Testcase. + 2017-02-07 Jakub Jelinek PR rtl-optimization/79386 diff --git a/gcc/testsuite/gcc.target/aarch64/popcnt.c b/gcc/testsuite/gcc.target/aarch64/popcnt.c new file mode 100644 index 00000000000..7e957966d8e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/popcnt.c @@ -0,0 +1,23 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (int x) +{ + return __builtin_popcount (x); +} + +long +foo1 (long x) +{ + return __builtin_popcountl (x); +} + +long long +foo2 (long long x) +{ + return __builtin_popcountll (x); +} + +/* { dg-final { scan-assembler-not "popcount" } } */ +/* { dg-final { scan-assembler-times "cnt\t" 3 } } */ -- 2.30.2