From 9d57d483cbcced5051d0dd4d48bbe750b5c15592 Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Wed, 13 Jun 2012 15:46:27 -0700 Subject: [PATCH] gallium: Add TGSI_OPCODE_F2U to gallivm backend. Note: for the moment TGSI_OPCODE_F2U is implemented using lp_build_itrunc() (the same function used to implement TGSI_OPCODE_F2I). In the long run, we should create an lp_build_utrunc() function to do the proper conversion. But this should allow us to limp along with mostly correct behaviour for now. --- src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c index e0a51809219..cbc59459d44 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c @@ -984,6 +984,18 @@ f2i_emit_cpu( emit_data->args[0]); } +/* TGSI_OPCODE_F2U (CPU Only) */ +static void +f2u_emit_cpu( + const struct lp_build_tgsi_action * action, + struct lp_build_tgsi_context * bld_base, + struct lp_build_emit_data * emit_data) +{ + /* FIXME: implement and use lp_build_utrunc() */ + emit_data->output[emit_data->chan] = lp_build_itrunc(&bld_base->base, + emit_data->args[0]); +} + /* TGSI_OPCODE_FLR (CPU Only) */ static void @@ -1561,6 +1573,7 @@ lp_set_default_actions_cpu( bld_base->op_actions[TGSI_OPCODE_EX2].emit = ex2_emit_cpu; bld_base->op_actions[TGSI_OPCODE_EXP].emit = exp_emit_cpu; bld_base->op_actions[TGSI_OPCODE_F2I].emit = f2i_emit_cpu; + bld_base->op_actions[TGSI_OPCODE_F2U].emit = f2u_emit_cpu; bld_base->op_actions[TGSI_OPCODE_FLR].emit = flr_emit_cpu; bld_base->op_actions[TGSI_OPCODE_I2F].emit = i2f_emit_cpu; -- 2.30.2