From 9e016ec99320172b4771c0d10f0891bcd23ebb6c Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 14 Sep 2022 13:53:39 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index aa70c4319..377cfd3b5 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -212,6 +212,16 @@ The primary options are: truncates VL to that exact point. Useful for implementing algorithms such as `strcpy` in around 14 high-performance Vector instructions, the option exists to include or exclude the failing element. +* Predicate-result: a strategic mode that effectively turns all and any + operations into a type of `cmp`. An `Rc=1 BO test` is performed and if + failing the result is **not** written to the regfile. The `Rc=1` + Vector of co-results **is** always written (subject to predication). + Termed "predicate-result" because the combination of producing then + testing a result is as if the test was in a follow-up predicated + copy/mv operation, it reduces regfile pressure and instruction count. + Also useful on saturated or other overflowing operations, the overflowing + elements may be excluded from outputting to the regfile then + post-analysed outside of critical hot-loops. **SVP64Single** -- 2.30.2