From 9e2b77f98363dae57e6a35d7d6ccbef1b6dd1b3a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 23 Apr 2021 23:05:58 +0100 Subject: [PATCH] error in setting fast regs test values --- src/soc/simple/test/test_core.py | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/soc/simple/test/test_core.py b/src/soc/simple/test/test_core.py index e3c47eac..ff1ce52b 100644 --- a/src/soc/simple/test/test_core.py +++ b/src/soc/simple/test/test_core.py @@ -119,9 +119,13 @@ def setup_regs(pdecode2, core, test): else: yield from set_mmu_spr(sprname, i, val, core) else: - yield fregs.regs[fast].reg.eq(val) print("setting fast reg %d (%s) to %x" % (fast, sprname, val)) + if fregs.unary: + rval = core.regs.int.regs[fast].reg + else: + rval = core.regs.int.memory._array[fast] + yield rval.eq(val) # allow changes to settle before reporting on XER yield Settle() -- 2.30.2