From 9e872a5865c66ed0a518dd1c6c54e72f3afa71f1 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 21 Feb 2011 16:24:41 -0800 Subject: [PATCH] i965: Fix VB packet reuse when offset for the new buffer isn't stride aligned. Fixes regression in scissor-stencil-clear and 5 other tests. --- src/mesa/drivers/dri/i965/brw_draw_upload.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 17af046b503..b15c05a7ad1 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -470,7 +470,7 @@ static void brw_prepare_vertices(struct brw_context *brw) d = brw->vb.buffers[i].offset - brw->vb.current_buffers[i].offset; if (delta == 0) delta = d / brw->vb.current_buffers[i].stride; - else if (delta * brw->vb.current_buffers[i].stride != d) + if (delta * brw->vb.current_buffers[i].stride != d) break; } -- 2.30.2