From 9eb402af6c5b68d9a05dbd104d7e7014775ecd0c Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 10 May 2021 17:31:46 +0100 Subject: [PATCH] --- conferences/ep2021.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 conferences/ep2021.mdwn diff --git a/conferences/ep2021.mdwn b/conferences/ep2021.mdwn new file mode 100644 index 000000000..99c7c04e4 --- /dev/null +++ b/conferences/ep2021.mdwn @@ -0,0 +1,16 @@ +# Proposal + +The Libre-SOC Project aims to bring to market a mass-volume System-on-a-Chip suitable for use in smartphones netbooks tablets and chromebooks, which is end-user programmable right to the bedrock. No spying backdoors, no treacherous DRM. Libre to the core (literally). + +The Libre-SOC Project aims to bring to market a mass-volume System-on-a-Chip suitable for use in smartphones netbooks tablets and chromebooks, which is end-user programmable right to the bedrock. No spying backdoors, no treacherous DRM. + +Python and standard Libre Project Management is used throughout: + +* nmigen, a python-based HDL, is a fundamental and critical strategic choice in creating the hardware. +* An IEEE754 FP hardware library has been developed using nmigen/python, as are hundreds of thousands of unit tests +* An OpenPOWER ISA simulator is written in python, and is actually a PLY compiler based on the GardenSnake example +* Several thousand unit tests for the HDL and simulator are written in python +* coriolis2, the VLSI ASIC layout toolcjain, is a mixed c++ python application +* Even the Standard Cell Library being used, called FlexLib, by Chips4Makers, is in python. + +To say that python is critical to the project would be a massive understatement. This talk will give a brief overview of the above areas and give a glimpse into why python was chosen for each. -- 2.30.2