From 9ecf84e6a5616e30a03b4813b696607b2aa12d47 Mon Sep 17 00:00:00 2001 From: Kwok Cheung Yeung Date: Fri, 15 Nov 2019 12:54:40 +0000 Subject: [PATCH] [amdgcn] Fix handling of VCC_CONDITIONAL_REG Classify vcc_lo and vcc_hi into the VCC_CONDITIONAL_REG class, and spill them into SGPRs if necessary. 2019-11-15 Kwok Cheung Yeung gcc/ * config/gcn/gcn.c (gcn_regno_reg_class): Return VCC_CONDITIONAL_REG register class for VCC_LO and VCC_HI. (gcn_spill_class): Use SGPR_REGS to spill registers in VCC_CONDITIONAL_REG. From-SVN: r278290 --- gcc/ChangeLog | 7 +++++++ gcc/config/gcn/gcn.c | 6 +++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5eb21e7e4a8..d44f5a3fce0 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2019-11-15 Kwok Cheung Yeung + + * config/gcn/gcn.c (gcn_regno_reg_class): Return VCC_CONDITIONAL_REG + register class for VCC_LO and VCC_HI. + (gcn_spill_class): Use SGPR_REGS to spill registers in + VCC_CONDITIONAL_REG. + 2019-11-15 Richard Biener PR tree-optimization/92324 diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c index 20534a2fbe6..f12d06d5e87 100644 --- a/gcc/config/gcn/gcn.c +++ b/gcc/config/gcn/gcn.c @@ -462,6 +462,9 @@ gcn_regno_reg_class (int regno) { case SCC_REG: return SCC_CONDITIONAL_REG; + case VCC_LO_REG: + case VCC_HI_REG: + return VCC_CONDITIONAL_REG; case VCCZ_REG: return VCCZ_CONDITIONAL_REG; case EXECZ_REG: @@ -629,7 +632,8 @@ gcn_can_split_p (machine_mode, rtx op) static reg_class_t gcn_spill_class (reg_class_t c, machine_mode /*mode */ ) { - if (reg_classes_intersect_p (ALL_CONDITIONAL_REGS, c)) + if (reg_classes_intersect_p (ALL_CONDITIONAL_REGS, c) + || c == VCC_CONDITIONAL_REG) return SGPR_REGS; else return NO_REGS; -- 2.30.2