From 9f2e5cd7b66fb5f3300afd39a542b19f70a4a1f1 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Thu, 19 Mar 2015 15:58:04 +0100 Subject: [PATCH] targets/kc705: add external reset --- targets/kc705.py | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/targets/kc705.py b/targets/kc705.py index 4390c1f0..75079483 100644 --- a/targets/kc705.py +++ b/targets/kc705.py @@ -20,6 +20,8 @@ class _CRG(Module): clk200_se = Signal() self.specials += Instance("IBUFDS", i_I=clk200.p, i_IB=clk200.n, o_O=clk200_se) + rst = platform.request("cpu_reset") + pll_locked = Signal() pll_fb = Signal() self.pll_sys = Signal() @@ -50,8 +52,8 @@ class _CRG(Module): Instance("BUFG", i_I=self.pll_sys, o_O=self.cd_sys.clk), Instance("BUFG", i_I=pll_sys4x, o_O=self.cd_sys4x.clk), Instance("BUFG", i_I=pll_clk200, o_O=self.cd_clk200.clk), - AsyncResetSynchronizer(self.cd_sys, ~pll_locked), - AsyncResetSynchronizer(self.cd_clk200, ~pll_locked), + AsyncResetSynchronizer(self.cd_sys, ~pll_locked | rst), + AsyncResetSynchronizer(self.cd_clk200, ~pll_locked | rst), ] reset_counter = Signal(4, reset=15) -- 2.30.2