From 9f46691529bbbab26c62c3d4b40ba7a7914c0776 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 22 Jul 2022 15:41:05 +0100 Subject: [PATCH] add Aurora ISA guide link --- openpower/sv/comparison_table.mdwn | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn index 5734abf42..d7ac3215f 100644 --- a/openpower/sv/comparison_table.mdwn +++ b/openpower/sv/comparison_table.mdwn @@ -8,7 +8,7 @@ | SVE2 | ~1000 {12} | Scalable HW {13} | yes | no | yes | yes | no | yes {7} | no | no | | AVX-512 {14} | ~1000s {15} | Predicated SIMD | yes | no | yes | yes | no | no | no | no | | RVV {16} | ~190 | Scalable {17} | yes | no | yes | yes {18}| no | yes | no | no | -| Aurora SX {19} | ~250 | Scalable {20} | yes | no | yes | no | no | no | no | no | +| Aurora SX {19} | ~200 {20} | Scalable {21} | yes | no | yes | no | no | no | no | no | * {1}: plus EXT001 24-bit prefixing. See [[sv/svp64]] * {2}: A 2-Dimensional Scalable Vector ISA with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]] @@ -31,4 +31,5 @@ * {17}: Like the original Cray RVV is a truly scalable Vector ISA (Cray setvl instruction). * {18}: like SVP64 it is up to the hardware implementor to choose whether to support 128-bit elements. * {19}: [NEC SX Aurora](https://ftp.libre-soc.org/NEC_SX_Aurora_TSUBASA_VectorEngine-as-manual-v1.2.pdf) is based on the original Cray Vectors -* {20}: Like the original Cray Vectors the ISA is independent of the underlying hardware. +* {20}: [Aurora ISA guide)(https://sxauroratsubasa.sakura.ne.jp/documents/guide/pdfs/Aurora_ISA_guide.pdf) Appendix-3 11.1 p508 +* {21}: Like the original Cray Vectors, the ISA Vector Length is independent of the underlying hardware, however Generation 1 has 256 elements per Vector register (3.2.4 p24, Aurora ISA guide) -- 2.30.2