From 9f7c94084080f2fca15d1c282a827bffd3f3bd9e Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Mon, 26 Feb 2018 11:36:49 +1100 Subject: [PATCH] radeonsi/nir: fix loading of doubles for tess varyings MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_shader.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 694dadcfbfe..7af0bdb99ce 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -1291,7 +1291,11 @@ static LLVMValueRef si_nir_load_tcs_varyings(struct ac_shader_abi *abi, LLVMValueRef value[4]; for (unsigned i = 0; i < num_components + component; i++) { - value[i] = lds_load(bld_base, type, i, dw_addr); + unsigned offset = i; + if (llvm_type_is_64bit(ctx, type)) + offset *= 2; + + value[i] = lds_load(bld_base, type, offset, dw_addr); } return ac_build_varying_gather_values(&ctx->ac, value, num_components, component); @@ -1374,7 +1378,11 @@ LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi, */ LLVMValueRef value[4]; for (unsigned i = component; i < num_components + component; i++) { - value[i] = buffer_load(&ctx->bld_base, type, i, + unsigned offset = i; + if (llvm_type_is_64bit(ctx, type)) + offset *= 2; + + value[i] = buffer_load(&ctx->bld_base, type, offset, ctx->tess_offchip_ring, base, addr, true); } -- 2.30.2