From 9fa24632f3852eb3c506708912ab4257ea6b8ed1 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Samuel=20Iglesias=20Gons=C3=A1lvez?= Date: Mon, 6 Jun 2016 15:49:52 +0200 Subject: [PATCH] i965/nir: double/dvec2 uniforms only need to be padded to a single vec4 slot MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit max_vector_size is used in the vec4 backend to pad out the uniform components to match a size that is a multiple of a vec4. Double and dvec2 uniforms only require a single vec4 slot, not two. Signed-off-by: Samuel Iglesias Gonsálvez Signed-off-by: Iago Toral Quiroga Reviewed-by: Timothy Arceri Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp index 15a608c857a..2407bac86cc 100644 --- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp +++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp @@ -108,7 +108,8 @@ brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var, unsigned max_vector_size = 4; if (storage->type->base_type == GLSL_TYPE_DOUBLE) { vector_size *= 2; - max_vector_size *= 2; + if (vector_size > 4) + max_vector_size = 8; } for (unsigned s = 0; s < vector_count; s++) { -- 2.30.2