From 9fc10fb06cb481d7e395581be66234a9fedd26e0 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 17 Oct 2023 14:44:06 +0100
Subject: [PATCH] added english language description for lwaupx instruction in 
 the pifixedload.mdwm

---
 openpower/isa/pifixedload.mdwn | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index 748b098e..a5cbab80 100644
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -228,6 +228,15 @@ Pseudo-code:
     RT <- EXTS(MEM(EA, 4))
     RA <- (RA) + (RB)
 
+Description:
+
+    Let the effective address (EA) be the register RA.
+    The word in storage addressed by EA is loaded into RT[32:63].RT[0:31] are filled with a copy of bit 0 of the loaded word.
+
+    The sum (RA) + (RB) is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None
-- 
2.30.2